1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * Copyright (c) 2021, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 5 * Copyright (c) 2024, Linaro Ltd. 6 */ 7 8 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SAR2130P_H 9 #define __DT_BINDINGS_INTERCONNECT_QCOM_SAR2130P_H 10 11 #define MASTER_QUP_CORE_0 0 12 #define MASTER_QUP_CORE_1 1 13 #define SLAVE_QUP_CORE_0 2 14 #define SLAVE_QUP_CORE_1 3 15 16 #define MASTER_GEM_NOC_CNOC 0 17 #define MASTER_GEM_NOC_PCIE_SNOC 1 18 #define MASTER_QDSS_DAP 2 19 #define SLAVE_AHB2PHY_SOUTH 3 20 #define SLAVE_AOSS 4 21 #define SLAVE_CAMERA_CFG 5 22 #define SLAVE_CLK_CTL 6 23 #define SLAVE_CDSP_CFG 7 24 #define SLAVE_RBCPR_CX_CFG 8 25 #define SLAVE_RBCPR_MMCX_CFG 9 26 #define SLAVE_RBCPR_MXA_CFG 10 27 #define SLAVE_RBCPR_MXC_CFG 11 28 #define SLAVE_CPR_NSPCX 12 29 #define SLAVE_CRYPTO_0_CFG 13 30 #define SLAVE_CX_RDPM 14 31 #define SLAVE_DISPLAY_CFG 15 32 #define SLAVE_GFX3D_CFG 16 33 #define SLAVE_IMEM_CFG 17 34 #define SLAVE_IPC_ROUTER_CFG 18 35 #define SLAVE_LPASS 19 36 #define SLAVE_MX_RDPM 20 37 #define SLAVE_PCIE_0_CFG 21 38 #define SLAVE_PCIE_1_CFG 22 39 #define SLAVE_PDM 23 40 #define SLAVE_PIMEM_CFG 24 41 #define SLAVE_PRNG 25 42 #define SLAVE_QDSS_CFG 26 43 #define SLAVE_QSPI_0 27 44 #define SLAVE_QUP_0 28 45 #define SLAVE_QUP_1 29 46 #define SLAVE_SDCC_1 30 47 #define SLAVE_TCSR 31 48 #define SLAVE_TLMM 32 49 #define SLAVE_TME_CFG 33 50 #define SLAVE_USB3_0 34 51 #define SLAVE_VENUS_CFG 35 52 #define SLAVE_VSENSE_CTRL_CFG 36 53 #define SLAVE_WLAN_Q6_CFG 37 54 #define SLAVE_DDRSS_CFG 38 55 #define SLAVE_CNOC_MNOC_CFG 39 56 #define SLAVE_SNOC_CFG 40 57 #define SLAVE_IMEM 41 58 #define SLAVE_PIMEM 42 59 #define SLAVE_SERVICE_CNOC 43 60 #define SLAVE_PCIE_0 44 61 #define SLAVE_PCIE_1 45 62 #define SLAVE_QDSS_STM 46 63 #define SLAVE_TCU 47 64 65 #define MASTER_GPU_TCU 0 66 #define MASTER_SYS_TCU 1 67 #define MASTER_APPSS_PROC 2 68 #define MASTER_GFX3D 3 69 #define MASTER_MNOC_HF_MEM_NOC 4 70 #define MASTER_MNOC_SF_MEM_NOC 5 71 #define MASTER_COMPUTE_NOC 6 72 #define MASTER_ANOC_PCIE_GEM_NOC 7 73 #define MASTER_SNOC_GC_MEM_NOC 8 74 #define MASTER_SNOC_SF_MEM_NOC 9 75 #define MASTER_WLAN_Q6 10 76 #define SLAVE_GEM_NOC_CNOC 11 77 #define SLAVE_LLCC 12 78 #define SLAVE_MEM_NOC_PCIE_SNOC 13 79 80 #define MASTER_CNOC_LPASS_AG_NOC 0 81 #define MASTER_LPASS_PROC 1 82 #define SLAVE_LPASS_CORE_CFG 2 83 #define SLAVE_LPASS_LPI_CFG 3 84 #define SLAVE_LPASS_MPU_CFG 4 85 #define SLAVE_LPASS_TOP_CFG 5 86 #define SLAVE_LPASS_SNOC 6 87 #define SLAVE_SERVICES_LPASS_AML_NOC 7 88 #define SLAVE_SERVICE_LPASS_AG_NOC 8 89 90 #define MASTER_LLCC 0 91 #define SLAVE_EBI1 1 92 93 #define MASTER_CAMNOC_HF 0 94 #define MASTER_CAMNOC_ICP 1 95 #define MASTER_CAMNOC_SF 2 96 #define MASTER_LSR 3 97 #define MASTER_MDP 4 98 #define MASTER_CNOC_MNOC_CFG 5 99 #define MASTER_VIDEO 6 100 #define MASTER_VIDEO_CV_PROC 7 101 #define MASTER_VIDEO_PROC 8 102 #define MASTER_VIDEO_V_PROC 9 103 #define SLAVE_MNOC_HF_MEM_NOC 10 104 #define SLAVE_MNOC_SF_MEM_NOC 11 105 #define SLAVE_SERVICE_MNOC 12 106 107 #define MASTER_CDSP_NOC_CFG 0 108 #define MASTER_CDSP_PROC 1 109 #define SLAVE_CDSP_MEM_NOC 2 110 #define SLAVE_SERVICE_NSP_NOC 3 111 112 #define MASTER_PCIE_0 0 113 #define MASTER_PCIE_1 1 114 #define SLAVE_ANOC_PCIE_GEM_NOC 2 115 116 #define MASTER_GIC_AHB 0 117 #define MASTER_QDSS_BAM 1 118 #define MASTER_QSPI_0 2 119 #define MASTER_QUP_0 3 120 #define MASTER_QUP_1 4 121 #define MASTER_A2NOC_SNOC 5 122 #define MASTER_CNOC_DATAPATH 6 123 #define MASTER_LPASS_ANOC 7 124 #define MASTER_SNOC_CFG 8 125 #define MASTER_CRYPTO 9 126 #define MASTER_PIMEM 10 127 #define MASTER_GIC 11 128 #define MASTER_QDSS_ETR 12 129 #define MASTER_QDSS_ETR_1 13 130 #define MASTER_SDCC_1 14 131 #define MASTER_USB3_0 15 132 #define SLAVE_A2NOC_SNOC 16 133 #define SLAVE_SNOC_GEM_NOC_GC 17 134 #define SLAVE_SNOC_GEM_NOC_SF 18 135 #define SLAVE_SERVICE_SNOC 19 136 137 #endif 138