xref: /linux/include/dt-bindings/interconnect/qcom,msm8916.h (revision 8dd06ef34b6e2f41b29fbf5fc1663780f2524285)
1*ebb37bd0SGeorgi Djakov /* SPDX-License-Identifier: GPL-2.0 */
2*ebb37bd0SGeorgi Djakov /*
3*ebb37bd0SGeorgi Djakov  * Qualcomm interconnect IDs
4*ebb37bd0SGeorgi Djakov  *
5*ebb37bd0SGeorgi Djakov  * Copyright (c) 2019, Linaro Ltd.
6*ebb37bd0SGeorgi Djakov  * Author: Georgi Djakov <georgi.djakov@linaro.org>
7*ebb37bd0SGeorgi Djakov  */
8*ebb37bd0SGeorgi Djakov 
9*ebb37bd0SGeorgi Djakov #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8916_H
10*ebb37bd0SGeorgi Djakov #define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8916_H
11*ebb37bd0SGeorgi Djakov 
12*ebb37bd0SGeorgi Djakov #define BIMC_SNOC_SLV			0
13*ebb37bd0SGeorgi Djakov #define MASTER_JPEG			1
14*ebb37bd0SGeorgi Djakov #define MASTER_MDP_PORT0		2
15*ebb37bd0SGeorgi Djakov #define MASTER_QDSS_BAM			3
16*ebb37bd0SGeorgi Djakov #define MASTER_QDSS_ETR			4
17*ebb37bd0SGeorgi Djakov #define MASTER_SNOC_CFG			5
18*ebb37bd0SGeorgi Djakov #define MASTER_VFE			6
19*ebb37bd0SGeorgi Djakov #define MASTER_VIDEO_P0			7
20*ebb37bd0SGeorgi Djakov #define SNOC_MM_INT_0			8
21*ebb37bd0SGeorgi Djakov #define SNOC_MM_INT_1			9
22*ebb37bd0SGeorgi Djakov #define SNOC_MM_INT_2			10
23*ebb37bd0SGeorgi Djakov #define SNOC_MM_INT_BIMC		11
24*ebb37bd0SGeorgi Djakov #define PCNOC_SNOC_SLV			12
25*ebb37bd0SGeorgi Djakov #define SLAVE_APSS			13
26*ebb37bd0SGeorgi Djakov #define SLAVE_CATS_128			14
27*ebb37bd0SGeorgi Djakov #define SLAVE_OCMEM_64			15
28*ebb37bd0SGeorgi Djakov #define SLAVE_IMEM			16
29*ebb37bd0SGeorgi Djakov #define SLAVE_QDSS_STM			17
30*ebb37bd0SGeorgi Djakov #define SLAVE_SRVC_SNOC			18
31*ebb37bd0SGeorgi Djakov #define SNOC_BIMC_0_MAS			19
32*ebb37bd0SGeorgi Djakov #define SNOC_BIMC_1_MAS			20
33*ebb37bd0SGeorgi Djakov #define SNOC_INT_0			21
34*ebb37bd0SGeorgi Djakov #define SNOC_INT_1			22
35*ebb37bd0SGeorgi Djakov #define SNOC_INT_BIMC			23
36*ebb37bd0SGeorgi Djakov #define SNOC_PCNOC_MAS			24
37*ebb37bd0SGeorgi Djakov #define SNOC_QDSS_INT			25
38*ebb37bd0SGeorgi Djakov 
39*ebb37bd0SGeorgi Djakov #define BIMC_SNOC_MAS			0
40*ebb37bd0SGeorgi Djakov #define MASTER_AMPSS_M0			1
41*ebb37bd0SGeorgi Djakov #define MASTER_GRAPHICS_3D		2
42*ebb37bd0SGeorgi Djakov #define MASTER_TCU0			3
43*ebb37bd0SGeorgi Djakov #define MASTER_TCU1			4
44*ebb37bd0SGeorgi Djakov #define SLAVE_AMPSS_L2			5
45*ebb37bd0SGeorgi Djakov #define SLAVE_EBI_CH0			6
46*ebb37bd0SGeorgi Djakov #define SNOC_BIMC_0_SLV			7
47*ebb37bd0SGeorgi Djakov #define SNOC_BIMC_1_SLV			8
48*ebb37bd0SGeorgi Djakov 
49*ebb37bd0SGeorgi Djakov #define MASTER_BLSP_1			0
50*ebb37bd0SGeorgi Djakov #define MASTER_DEHR			1
51*ebb37bd0SGeorgi Djakov #define MASTER_LPASS			2
52*ebb37bd0SGeorgi Djakov #define MASTER_CRYPTO_CORE0		3
53*ebb37bd0SGeorgi Djakov #define MASTER_SDCC_1			4
54*ebb37bd0SGeorgi Djakov #define MASTER_SDCC_2			5
55*ebb37bd0SGeorgi Djakov #define MASTER_SPDM			6
56*ebb37bd0SGeorgi Djakov #define MASTER_USB_HS			7
57*ebb37bd0SGeorgi Djakov #define PCNOC_INT_0			8
58*ebb37bd0SGeorgi Djakov #define PCNOC_INT_1			9
59*ebb37bd0SGeorgi Djakov #define PCNOC_MAS_0			10
60*ebb37bd0SGeorgi Djakov #define PCNOC_MAS_1			11
61*ebb37bd0SGeorgi Djakov #define PCNOC_SLV_0			12
62*ebb37bd0SGeorgi Djakov #define PCNOC_SLV_1			13
63*ebb37bd0SGeorgi Djakov #define PCNOC_SLV_2			14
64*ebb37bd0SGeorgi Djakov #define PCNOC_SLV_3			15
65*ebb37bd0SGeorgi Djakov #define PCNOC_SLV_4			16
66*ebb37bd0SGeorgi Djakov #define PCNOC_SLV_8			17
67*ebb37bd0SGeorgi Djakov #define PCNOC_SLV_9			18
68*ebb37bd0SGeorgi Djakov #define PCNOC_SNOC_MAS			19
69*ebb37bd0SGeorgi Djakov #define SLAVE_BIMC_CFG			20
70*ebb37bd0SGeorgi Djakov #define SLAVE_BLSP_1			21
71*ebb37bd0SGeorgi Djakov #define SLAVE_BOOT_ROM			22
72*ebb37bd0SGeorgi Djakov #define SLAVE_CAMERA_CFG		23
73*ebb37bd0SGeorgi Djakov #define SLAVE_CLK_CTL			24
74*ebb37bd0SGeorgi Djakov #define SLAVE_CRYPTO_0_CFG		25
75*ebb37bd0SGeorgi Djakov #define SLAVE_DEHR_CFG			26
76*ebb37bd0SGeorgi Djakov #define SLAVE_DISPLAY_CFG		27
77*ebb37bd0SGeorgi Djakov #define SLAVE_GRAPHICS_3D_CFG		28
78*ebb37bd0SGeorgi Djakov #define SLAVE_IMEM_CFG			29
79*ebb37bd0SGeorgi Djakov #define SLAVE_LPASS			30
80*ebb37bd0SGeorgi Djakov #define SLAVE_MPM			31
81*ebb37bd0SGeorgi Djakov #define SLAVE_MSG_RAM			32
82*ebb37bd0SGeorgi Djakov #define SLAVE_MSS			33
83*ebb37bd0SGeorgi Djakov #define SLAVE_PDM			34
84*ebb37bd0SGeorgi Djakov #define SLAVE_PMIC_ARB			35
85*ebb37bd0SGeorgi Djakov #define SLAVE_PCNOC_CFG			36
86*ebb37bd0SGeorgi Djakov #define SLAVE_PRNG			37
87*ebb37bd0SGeorgi Djakov #define SLAVE_QDSS_CFG			38
88*ebb37bd0SGeorgi Djakov #define SLAVE_RBCPR_CFG			39
89*ebb37bd0SGeorgi Djakov #define SLAVE_SDCC_1			40
90*ebb37bd0SGeorgi Djakov #define SLAVE_SDCC_2			41
91*ebb37bd0SGeorgi Djakov #define SLAVE_SECURITY			42
92*ebb37bd0SGeorgi Djakov #define SLAVE_SNOC_CFG			43
93*ebb37bd0SGeorgi Djakov #define SLAVE_SPDM			44
94*ebb37bd0SGeorgi Djakov #define SLAVE_TCSR			45
95*ebb37bd0SGeorgi Djakov #define SLAVE_TLMM			46
96*ebb37bd0SGeorgi Djakov #define SLAVE_USB_HS			47
97*ebb37bd0SGeorgi Djakov #define SLAVE_VENUS_CFG			48
98*ebb37bd0SGeorgi Djakov #define SNOC_PCNOC_SLV			49
99*ebb37bd0SGeorgi Djakov 
100*ebb37bd0SGeorgi Djakov #endif
101