xref: /linux/include/dt-bindings/interconnect/qcom,msm8996.h (revision 03ab8e6297acd1bc0eedaa050e2a1635c576fd11)
1*3e9fdc6bSYassine Oudjana /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2*3e9fdc6bSYassine Oudjana /*
3*3e9fdc6bSYassine Oudjana  * Qualcomm MSM8996 interconnect IDs
4*3e9fdc6bSYassine Oudjana  *
5*3e9fdc6bSYassine Oudjana  * Copyright (c) 2021 Yassine Oudjana <y.oudjana@protonmail.com>
6*3e9fdc6bSYassine Oudjana  */
7*3e9fdc6bSYassine Oudjana 
8*3e9fdc6bSYassine Oudjana #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8996_H
9*3e9fdc6bSYassine Oudjana #define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8996_H
10*3e9fdc6bSYassine Oudjana 
11*3e9fdc6bSYassine Oudjana /* A0NOC */
12*3e9fdc6bSYassine Oudjana #define MASTER_PCIE_0			0
13*3e9fdc6bSYassine Oudjana #define MASTER_PCIE_1			1
14*3e9fdc6bSYassine Oudjana #define MASTER_PCIE_2			2
15*3e9fdc6bSYassine Oudjana 
16*3e9fdc6bSYassine Oudjana /* A1NOC */
17*3e9fdc6bSYassine Oudjana #define MASTER_CNOC_A1NOC		0
18*3e9fdc6bSYassine Oudjana #define MASTER_CRYPTO_CORE0		1
19*3e9fdc6bSYassine Oudjana #define MASTER_PNOC_A1NOC		2
20*3e9fdc6bSYassine Oudjana 
21*3e9fdc6bSYassine Oudjana /* A2NOC */
22*3e9fdc6bSYassine Oudjana #define MASTER_USB3			0
23*3e9fdc6bSYassine Oudjana #define MASTER_IPA			1
24*3e9fdc6bSYassine Oudjana #define MASTER_UFS			2
25*3e9fdc6bSYassine Oudjana 
26*3e9fdc6bSYassine Oudjana /* BIMC */
27*3e9fdc6bSYassine Oudjana #define MASTER_AMPSS_M0			0
28*3e9fdc6bSYassine Oudjana #define MASTER_GRAPHICS_3D		1
29*3e9fdc6bSYassine Oudjana #define MASTER_MNOC_BIMC		2
30*3e9fdc6bSYassine Oudjana #define MASTER_SNOC_BIMC		3
31*3e9fdc6bSYassine Oudjana #define SLAVE_EBI_CH0			4
32*3e9fdc6bSYassine Oudjana #define SLAVE_HMSS_L3			5
33*3e9fdc6bSYassine Oudjana #define SLAVE_BIMC_SNOC_0		6
34*3e9fdc6bSYassine Oudjana #define SLAVE_BIMC_SNOC_1		7
35*3e9fdc6bSYassine Oudjana 
36*3e9fdc6bSYassine Oudjana /* CNOC */
37*3e9fdc6bSYassine Oudjana #define MASTER_SNOC_CNOC		0
38*3e9fdc6bSYassine Oudjana #define MASTER_QDSS_DAP			1
39*3e9fdc6bSYassine Oudjana #define SLAVE_CNOC_A1NOC		2
40*3e9fdc6bSYassine Oudjana #define SLAVE_CLK_CTL			3
41*3e9fdc6bSYassine Oudjana #define SLAVE_TCSR			4
42*3e9fdc6bSYassine Oudjana #define SLAVE_TLMM			5
43*3e9fdc6bSYassine Oudjana #define SLAVE_CRYPTO_0_CFG		6
44*3e9fdc6bSYassine Oudjana #define SLAVE_MPM			7
45*3e9fdc6bSYassine Oudjana #define SLAVE_PIMEM_CFG			8
46*3e9fdc6bSYassine Oudjana #define SLAVE_IMEM_CFG			9
47*3e9fdc6bSYassine Oudjana #define SLAVE_MESSAGE_RAM		10
48*3e9fdc6bSYassine Oudjana #define SLAVE_BIMC_CFG			11
49*3e9fdc6bSYassine Oudjana #define SLAVE_PMIC_ARB			12
50*3e9fdc6bSYassine Oudjana #define SLAVE_PRNG			13
51*3e9fdc6bSYassine Oudjana #define SLAVE_DCC_CFG			14
52*3e9fdc6bSYassine Oudjana #define SLAVE_RBCPR_MX			15
53*3e9fdc6bSYassine Oudjana #define SLAVE_QDSS_CFG			16
54*3e9fdc6bSYassine Oudjana #define SLAVE_RBCPR_CX			17
55*3e9fdc6bSYassine Oudjana #define SLAVE_QDSS_RBCPR_APU		18
56*3e9fdc6bSYassine Oudjana #define SLAVE_CNOC_MNOC_CFG		19
57*3e9fdc6bSYassine Oudjana #define SLAVE_SNOC_CFG			20
58*3e9fdc6bSYassine Oudjana #define SLAVE_SNOC_MPU_CFG		21
59*3e9fdc6bSYassine Oudjana #define SLAVE_EBI1_PHY_CFG		22
60*3e9fdc6bSYassine Oudjana #define SLAVE_A0NOC_CFG			23
61*3e9fdc6bSYassine Oudjana #define SLAVE_PCIE_1_CFG		24
62*3e9fdc6bSYassine Oudjana #define SLAVE_PCIE_2_CFG		25
63*3e9fdc6bSYassine Oudjana #define SLAVE_PCIE_0_CFG		26
64*3e9fdc6bSYassine Oudjana #define SLAVE_PCIE20_AHB2PHY		27
65*3e9fdc6bSYassine Oudjana #define SLAVE_A0NOC_MPU_CFG		28
66*3e9fdc6bSYassine Oudjana #define SLAVE_UFS_CFG			29
67*3e9fdc6bSYassine Oudjana #define SLAVE_A1NOC_CFG			30
68*3e9fdc6bSYassine Oudjana #define SLAVE_A1NOC_MPU_CFG		31
69*3e9fdc6bSYassine Oudjana #define SLAVE_A2NOC_CFG			32
70*3e9fdc6bSYassine Oudjana #define SLAVE_A2NOC_MPU_CFG		33
71*3e9fdc6bSYassine Oudjana #define SLAVE_SSC_CFG			34
72*3e9fdc6bSYassine Oudjana #define SLAVE_A0NOC_SMMU_CFG		35
73*3e9fdc6bSYassine Oudjana #define SLAVE_A1NOC_SMMU_CFG		36
74*3e9fdc6bSYassine Oudjana #define SLAVE_A2NOC_SMMU_CFG		37
75*3e9fdc6bSYassine Oudjana #define SLAVE_LPASS_SMMU_CFG		38
76*3e9fdc6bSYassine Oudjana #define SLAVE_CNOC_MNOC_MMSS_CFG	39
77*3e9fdc6bSYassine Oudjana 
78*3e9fdc6bSYassine Oudjana /* MNOC */
79*3e9fdc6bSYassine Oudjana #define MASTER_CNOC_MNOC_CFG		0
80*3e9fdc6bSYassine Oudjana #define MASTER_CPP			1
81*3e9fdc6bSYassine Oudjana #define MASTER_JPEG			2
82*3e9fdc6bSYassine Oudjana #define MASTER_MDP_PORT0		3
83*3e9fdc6bSYassine Oudjana #define MASTER_MDP_PORT1		4
84*3e9fdc6bSYassine Oudjana #define MASTER_ROTATOR			5
85*3e9fdc6bSYassine Oudjana #define MASTER_VIDEO_P0			6
86*3e9fdc6bSYassine Oudjana #define MASTER_VFE			7
87*3e9fdc6bSYassine Oudjana #define MASTER_SNOC_VMEM		8
88*3e9fdc6bSYassine Oudjana #define MASTER_VIDEO_P0_OCMEM		9
89*3e9fdc6bSYassine Oudjana #define MASTER_CNOC_MNOC_MMSS_CFG	10
90*3e9fdc6bSYassine Oudjana #define SLAVE_MNOC_BIMC			11
91*3e9fdc6bSYassine Oudjana #define SLAVE_VMEM			12
92*3e9fdc6bSYassine Oudjana #define SLAVE_SERVICE_MNOC		13
93*3e9fdc6bSYassine Oudjana #define SLAVE_MMAGIC_CFG		14
94*3e9fdc6bSYassine Oudjana #define SLAVE_CPR_CFG			15
95*3e9fdc6bSYassine Oudjana #define SLAVE_MISC_CFG			16
96*3e9fdc6bSYassine Oudjana #define SLAVE_VENUS_THROTTLE_CFG	17
97*3e9fdc6bSYassine Oudjana #define SLAVE_VENUS_CFG			18
98*3e9fdc6bSYassine Oudjana #define SLAVE_VMEM_CFG			19
99*3e9fdc6bSYassine Oudjana #define SLAVE_DSA_CFG			20
100*3e9fdc6bSYassine Oudjana #define SLAVE_MMSS_CLK_CFG		21
101*3e9fdc6bSYassine Oudjana #define SLAVE_DSA_MPU_CFG		22
102*3e9fdc6bSYassine Oudjana #define SLAVE_MNOC_MPU_CFG		23
103*3e9fdc6bSYassine Oudjana #define SLAVE_DISPLAY_CFG		24
104*3e9fdc6bSYassine Oudjana #define SLAVE_DISPLAY_THROTTLE_CFG	25
105*3e9fdc6bSYassine Oudjana #define SLAVE_CAMERA_CFG		26
106*3e9fdc6bSYassine Oudjana #define SLAVE_CAMERA_THROTTLE_CFG	27
107*3e9fdc6bSYassine Oudjana #define SLAVE_GRAPHICS_3D_CFG		28
108*3e9fdc6bSYassine Oudjana #define SLAVE_SMMU_MDP_CFG		29
109*3e9fdc6bSYassine Oudjana #define SLAVE_SMMU_ROT_CFG		30
110*3e9fdc6bSYassine Oudjana #define SLAVE_SMMU_VENUS_CFG		31
111*3e9fdc6bSYassine Oudjana #define SLAVE_SMMU_CPP_CFG		32
112*3e9fdc6bSYassine Oudjana #define SLAVE_SMMU_JPEG_CFG		33
113*3e9fdc6bSYassine Oudjana #define SLAVE_SMMU_VFE_CFG		34
114*3e9fdc6bSYassine Oudjana 
115*3e9fdc6bSYassine Oudjana /* PNOC */
116*3e9fdc6bSYassine Oudjana #define MASTER_SNOC_PNOC		0
117*3e9fdc6bSYassine Oudjana #define MASTER_SDCC_1			1
118*3e9fdc6bSYassine Oudjana #define MASTER_SDCC_2			2
119*3e9fdc6bSYassine Oudjana #define MASTER_SDCC_4			3
120*3e9fdc6bSYassine Oudjana #define MASTER_USB_HS			4
121*3e9fdc6bSYassine Oudjana #define MASTER_BLSP_1			5
122*3e9fdc6bSYassine Oudjana #define MASTER_BLSP_2			6
123*3e9fdc6bSYassine Oudjana #define MASTER_TSIF			7
124*3e9fdc6bSYassine Oudjana #define SLAVE_PNOC_A1NOC		8
125*3e9fdc6bSYassine Oudjana #define SLAVE_USB_HS			9
126*3e9fdc6bSYassine Oudjana #define SLAVE_SDCC_2			10
127*3e9fdc6bSYassine Oudjana #define SLAVE_SDCC_4			11
128*3e9fdc6bSYassine Oudjana #define SLAVE_TSIF			12
129*3e9fdc6bSYassine Oudjana #define SLAVE_BLSP_2			13
130*3e9fdc6bSYassine Oudjana #define SLAVE_SDCC_1			14
131*3e9fdc6bSYassine Oudjana #define SLAVE_BLSP_1			15
132*3e9fdc6bSYassine Oudjana #define SLAVE_PDM			16
133*3e9fdc6bSYassine Oudjana #define SLAVE_AHB2PHY			17
134*3e9fdc6bSYassine Oudjana 
135*3e9fdc6bSYassine Oudjana /* SNOC */
136*3e9fdc6bSYassine Oudjana #define MASTER_HMSS			0
137*3e9fdc6bSYassine Oudjana #define MASTER_QDSS_BAM			1
138*3e9fdc6bSYassine Oudjana #define MASTER_SNOC_CFG			2
139*3e9fdc6bSYassine Oudjana #define MASTER_BIMC_SNOC_0		3
140*3e9fdc6bSYassine Oudjana #define MASTER_BIMC_SNOC_1		4
141*3e9fdc6bSYassine Oudjana #define MASTER_A0NOC_SNOC		5
142*3e9fdc6bSYassine Oudjana #define MASTER_A1NOC_SNOC		6
143*3e9fdc6bSYassine Oudjana #define MASTER_A2NOC_SNOC		7
144*3e9fdc6bSYassine Oudjana #define MASTER_QDSS_ETR			8
145*3e9fdc6bSYassine Oudjana #define SLAVE_A0NOC_SNOC		9
146*3e9fdc6bSYassine Oudjana #define SLAVE_A1NOC_SNOC		10
147*3e9fdc6bSYassine Oudjana #define SLAVE_A2NOC_SNOC		11
148*3e9fdc6bSYassine Oudjana #define SLAVE_HMSS			12
149*3e9fdc6bSYassine Oudjana #define SLAVE_LPASS			13
150*3e9fdc6bSYassine Oudjana #define SLAVE_USB3			14
151*3e9fdc6bSYassine Oudjana #define SLAVE_SNOC_BIMC			15
152*3e9fdc6bSYassine Oudjana #define SLAVE_SNOC_CNOC			16
153*3e9fdc6bSYassine Oudjana #define SLAVE_IMEM			17
154*3e9fdc6bSYassine Oudjana #define SLAVE_PIMEM			18
155*3e9fdc6bSYassine Oudjana #define SLAVE_SNOC_VMEM			19
156*3e9fdc6bSYassine Oudjana #define SLAVE_SNOC_PNOC			20
157*3e9fdc6bSYassine Oudjana #define SLAVE_QDSS_STM			21
158*3e9fdc6bSYassine Oudjana #define SLAVE_PCIE_0			22
159*3e9fdc6bSYassine Oudjana #define SLAVE_PCIE_1			23
160*3e9fdc6bSYassine Oudjana #define SLAVE_PCIE_2			24
161*3e9fdc6bSYassine Oudjana #define SLAVE_SERVICE_SNOC		25
162*3e9fdc6bSYassine Oudjana 
163*3e9fdc6bSYassine Oudjana #endif
164