1*d1492bbdSJishnu Prakash /* SPDX-License-Identifier: GPL-2.0-only */ 2*d1492bbdSJishnu Prakash /* 3*d1492bbdSJishnu Prakash * Copyright (c) 2020 The Linux Foundation. All rights reserved. 4*d1492bbdSJishnu Prakash */ 5*d1492bbdSJishnu Prakash 6*d1492bbdSJishnu Prakash #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H 7*d1492bbdSJishnu Prakash #define _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H 8*d1492bbdSJishnu Prakash 9*d1492bbdSJishnu Prakash #ifndef PMK8350_SID 10*d1492bbdSJishnu Prakash #define PMK8350_SID 0 11*d1492bbdSJishnu Prakash #endif 12*d1492bbdSJishnu Prakash 13*d1492bbdSJishnu Prakash /* ADC channels for PMK8350_ADC for PMIC7 */ 14*d1492bbdSJishnu Prakash #define PMK8350_ADC7_REF_GND (PMK8350_SID << 8 | 0x0) 15*d1492bbdSJishnu Prakash #define PMK8350_ADC7_1P25VREF (PMK8350_SID << 8 | 0x01) 16*d1492bbdSJishnu Prakash #define PMK8350_ADC7_VREF_VADC (PMK8350_SID << 8 | 0x02) 17*d1492bbdSJishnu Prakash #define PMK8350_ADC7_DIE_TEMP (PMK8350_SID << 8 | 0x03) 18*d1492bbdSJishnu Prakash 19*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM1 (PMK8350_SID << 8 | 0x04) 20*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM2 (PMK8350_SID << 8 | 0x05) 21*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM3 (PMK8350_SID << 8 | 0x06) 22*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM4 (PMK8350_SID << 8 | 0x07) 23*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM5 (PMK8350_SID << 8 | 0x08) 24*d1492bbdSJishnu Prakash 25*d1492bbdSJishnu Prakash /* 30k pull-up1 */ 26*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM1_30K_PU (PMK8350_SID << 8 | 0x24) 27*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM2_30K_PU (PMK8350_SID << 8 | 0x25) 28*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM3_30K_PU (PMK8350_SID << 8 | 0x26) 29*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM4_30K_PU (PMK8350_SID << 8 | 0x27) 30*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM5_30K_PU (PMK8350_SID << 8 | 0x28) 31*d1492bbdSJishnu Prakash 32*d1492bbdSJishnu Prakash /* 100k pull-up2 */ 33*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM1_100K_PU (PMK8350_SID << 8 | 0x44) 34*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM2_100K_PU (PMK8350_SID << 8 | 0x45) 35*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM3_100K_PU (PMK8350_SID << 8 | 0x46) 36*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM4_100K_PU (PMK8350_SID << 8 | 0x47) 37*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM5_100K_PU (PMK8350_SID << 8 | 0x48) 38*d1492bbdSJishnu Prakash 39*d1492bbdSJishnu Prakash /* 400k pull-up3 */ 40*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM1_400K_PU (PMK8350_SID << 8 | 0x64) 41*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM2_400K_PU (PMK8350_SID << 8 | 0x65) 42*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM3_400K_PU (PMK8350_SID << 8 | 0x66) 43*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM4_400K_PU (PMK8350_SID << 8 | 0x67) 44*d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM5_400K_PU (PMK8350_SID << 8 | 0x68) 45*d1492bbdSJishnu Prakash 46*d1492bbdSJishnu Prakash #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H */ 47