1*d1492bbdSJishnu Prakash /* SPDX-License-Identifier: GPL-2.0-only */ 2*d1492bbdSJishnu Prakash /* 3*d1492bbdSJishnu Prakash * Copyright (c) 2020, The Linux Foundation. All rights reserved. 4*d1492bbdSJishnu Prakash */ 5*d1492bbdSJishnu Prakash 6*d1492bbdSJishnu Prakash #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H 7*d1492bbdSJishnu Prakash #define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H 8*d1492bbdSJishnu Prakash 9*d1492bbdSJishnu Prakash #ifndef PM8350_SID 10*d1492bbdSJishnu Prakash #define PM8350_SID 1 11*d1492bbdSJishnu Prakash #endif 12*d1492bbdSJishnu Prakash 13*d1492bbdSJishnu Prakash /* ADC channels for PM8350_ADC for PMIC7 */ 14*d1492bbdSJishnu Prakash #define PM8350_ADC7_REF_GND (PM8350_SID << 8 | 0x0) 15*d1492bbdSJishnu Prakash #define PM8350_ADC7_1P25VREF (PM8350_SID << 8 | 0x01) 16*d1492bbdSJishnu Prakash #define PM8350_ADC7_VREF_VADC (PM8350_SID << 8 | 0x02) 17*d1492bbdSJishnu Prakash #define PM8350_ADC7_DIE_TEMP (PM8350_SID << 8 | 0x03) 18*d1492bbdSJishnu Prakash 19*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM1 (PM8350_SID << 8 | 0x04) 20*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM2 (PM8350_SID << 8 | 0x05) 21*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM3 (PM8350_SID << 8 | 0x06) 22*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM4 (PM8350_SID << 8 | 0x07) 23*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM5 (PM8350_SID << 8 | 0x08) 24*d1492bbdSJishnu Prakash #define PM8350_ADC7_GPIO1 (PM8350_SID << 8 | 0x0a) 25*d1492bbdSJishnu Prakash #define PM8350_ADC7_GPIO2 (PM8350_SID << 8 | 0x0b) 26*d1492bbdSJishnu Prakash #define PM8350_ADC7_GPIO3 (PM8350_SID << 8 | 0x0c) 27*d1492bbdSJishnu Prakash #define PM8350_ADC7_GPIO4 (PM8350_SID << 8 | 0x0d) 28*d1492bbdSJishnu Prakash 29*d1492bbdSJishnu Prakash /* 30k pull-up1 */ 30*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM1_30K_PU (PM8350_SID << 8 | 0x24) 31*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM2_30K_PU (PM8350_SID << 8 | 0x25) 32*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM3_30K_PU (PM8350_SID << 8 | 0x26) 33*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM4_30K_PU (PM8350_SID << 8 | 0x27) 34*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM5_30K_PU (PM8350_SID << 8 | 0x28) 35*d1492bbdSJishnu Prakash #define PM8350_ADC7_GPIO1_30K_PU (PM8350_SID << 8 | 0x2a) 36*d1492bbdSJishnu Prakash #define PM8350_ADC7_GPIO2_30K_PU (PM8350_SID << 8 | 0x2b) 37*d1492bbdSJishnu Prakash #define PM8350_ADC7_GPIO3_30K_PU (PM8350_SID << 8 | 0x2c) 38*d1492bbdSJishnu Prakash #define PM8350_ADC7_GPIO4_30K_PU (PM8350_SID << 8 | 0x2d) 39*d1492bbdSJishnu Prakash 40*d1492bbdSJishnu Prakash /* 100k pull-up2 */ 41*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM1_100K_PU (PM8350_SID << 8 | 0x44) 42*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM2_100K_PU (PM8350_SID << 8 | 0x45) 43*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM3_100K_PU (PM8350_SID << 8 | 0x46) 44*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM4_100K_PU (PM8350_SID << 8 | 0x47) 45*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM5_100K_PU (PM8350_SID << 8 | 0x48) 46*d1492bbdSJishnu Prakash #define PM8350_ADC7_GPIO1_100K_PU (PM8350_SID << 8 | 0x4a) 47*d1492bbdSJishnu Prakash #define PM8350_ADC7_GPIO2_100K_PU (PM8350_SID << 8 | 0x4b) 48*d1492bbdSJishnu Prakash #define PM8350_ADC7_GPIO3_100K_PU (PM8350_SID << 8 | 0x4c) 49*d1492bbdSJishnu Prakash #define PM8350_ADC7_GPIO4_100K_PU (PM8350_SID << 8 | 0x4d) 50*d1492bbdSJishnu Prakash 51*d1492bbdSJishnu Prakash /* 400k pull-up3 */ 52*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM1_400K_PU (PM8350_SID << 8 | 0x64) 53*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM2_400K_PU (PM8350_SID << 8 | 0x65) 54*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM3_400K_PU (PM8350_SID << 8 | 0x66) 55*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM4_400K_PU (PM8350_SID << 8 | 0x67) 56*d1492bbdSJishnu Prakash #define PM8350_ADC7_AMUX_THM5_400K_PU (PM8350_SID << 8 | 0x68) 57*d1492bbdSJishnu Prakash #define PM8350_ADC7_GPIO1_400K_PU (PM8350_SID << 8 | 0x6a) 58*d1492bbdSJishnu Prakash #define PM8350_ADC7_GPIO2_400K_PU (PM8350_SID << 8 | 0x6b) 59*d1492bbdSJishnu Prakash #define PM8350_ADC7_GPIO3_400K_PU (PM8350_SID << 8 | 0x6c) 60*d1492bbdSJishnu Prakash #define PM8350_ADC7_GPIO4_400K_PU (PM8350_SID << 8 | 0x6d) 61*d1492bbdSJishnu Prakash 62*d1492bbdSJishnu Prakash /* 1/3 Divider */ 63*d1492bbdSJishnu Prakash #define PM8350_ADC7_GPIO4_DIV3 (PM8350_SID << 8 | 0x8d) 64*d1492bbdSJishnu Prakash 65*d1492bbdSJishnu Prakash #define PM8350_ADC7_VPH_PWR (PM8350_SID << 8 | 0x8e) 66*d1492bbdSJishnu Prakash 67*d1492bbdSJishnu Prakash #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H */ 68