xref: /linux/include/dt-bindings/clock/sh73a0-clock.h (revision e0bf6c5ca2d3281f231c5f0c9bf145e9513644de)
1 /*
2  * Copyright 2014 Ulrich Hecht
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  */
9 
10 #ifndef __DT_BINDINGS_CLOCK_SH73A0_H__
11 #define __DT_BINDINGS_CLOCK_SH73A0_H__
12 
13 /* CPG */
14 #define SH73A0_CLK_MAIN		0
15 #define SH73A0_CLK_PLL0		1
16 #define SH73A0_CLK_PLL1		2
17 #define SH73A0_CLK_PLL2		3
18 #define SH73A0_CLK_PLL3		4
19 #define SH73A0_CLK_DSI0PHY	5
20 #define SH73A0_CLK_DSI1PHY	6
21 #define SH73A0_CLK_ZG		7
22 #define SH73A0_CLK_M3		8
23 #define SH73A0_CLK_B		9
24 #define SH73A0_CLK_M1		10
25 #define SH73A0_CLK_M2		11
26 #define SH73A0_CLK_Z		12
27 #define SH73A0_CLK_ZX		13
28 #define SH73A0_CLK_HP		14
29 
30 /* MSTP0 */
31 #define SH73A0_CLK_IIC2	1
32 
33 /* MSTP1 */
34 #define SH73A0_CLK_CEU1		29
35 #define SH73A0_CLK_CSI2_RX1	28
36 #define SH73A0_CLK_CEU0		27
37 #define SH73A0_CLK_CSI2_RX0	26
38 #define SH73A0_CLK_TMU0		25
39 #define SH73A0_CLK_DSITX0	18
40 #define SH73A0_CLK_IIC0		16
41 #define SH73A0_CLK_SGX		12
42 #define SH73A0_CLK_LCDC0	0
43 
44 /* MSTP2 */
45 #define SH73A0_CLK_SCIFA7	19
46 #define SH73A0_CLK_SY_DMAC	18
47 #define SH73A0_CLK_MP_DMAC	17
48 #define SH73A0_CLK_SCIFA5	7
49 #define SH73A0_CLK_SCIFB	6
50 #define SH73A0_CLK_SCIFA0	4
51 #define SH73A0_CLK_SCIFA1	3
52 #define SH73A0_CLK_SCIFA2	2
53 #define SH73A0_CLK_SCIFA3	1
54 #define SH73A0_CLK_SCIFA4	0
55 
56 /* MSTP3 */
57 #define SH73A0_CLK_SCIFA6	31
58 #define SH73A0_CLK_CMT1		29
59 #define SH73A0_CLK_FSI		28
60 #define SH73A0_CLK_IRDA		25
61 #define SH73A0_CLK_IIC1		23
62 #define SH73A0_CLK_USB		22
63 #define SH73A0_CLK_FLCTL	15
64 #define SH73A0_CLK_SDHI0	14
65 #define SH73A0_CLK_SDHI1	13
66 #define SH73A0_CLK_MMCIF0	12
67 #define SH73A0_CLK_SDHI2	11
68 #define SH73A0_CLK_TPU0		4
69 #define SH73A0_CLK_TPU1		3
70 #define SH73A0_CLK_TPU2		2
71 #define SH73A0_CLK_TPU3		1
72 #define SH73A0_CLK_TPU4		0
73 
74 /* MSTP4 */
75 #define SH73A0_CLK_IIC3		11
76 #define SH73A0_CLK_IIC4		10
77 #define SH73A0_CLK_KEYSC	3
78 
79 #endif
80