125458fddSBiju Das /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 225458fddSBiju Das * 325458fddSBiju Das * Copyright (C) 2024 Renesas Electronics Corp. 425458fddSBiju Das */ 525458fddSBiju Das #ifndef __DT_BINDINGS_CLOCK_RENESAS_R9A09G047_CPG_H__ 625458fddSBiju Das #define __DT_BINDINGS_CLOCK_RENESAS_R9A09G047_CPG_H__ 725458fddSBiju Das 825458fddSBiju Das #include <dt-bindings/clock/renesas-cpg-mssr.h> 925458fddSBiju Das 1025458fddSBiju Das /* Core Clock list */ 1125458fddSBiju Das #define R9A09G047_SYS_0_PCLK 0 1225458fddSBiju Das #define R9A09G047_CA55_0_CORECLK0 1 1325458fddSBiju Das #define R9A09G047_CA55_0_CORECLK1 2 1425458fddSBiju Das #define R9A09G047_CA55_0_CORECLK2 3 1525458fddSBiju Das #define R9A09G047_CA55_0_CORECLK3 4 1625458fddSBiju Das #define R9A09G047_CA55_0_PERIPHCLK 5 1725458fddSBiju Das #define R9A09G047_CM33_CLK0 6 1825458fddSBiju Das #define R9A09G047_CST_0_SWCLKTCK 7 1925458fddSBiju Das #define R9A09G047_IOTOP_0_SHCLK 8 20f21923f3SBiju Das #define R9A09G047_SPI_CLK_SPI 9 21f21923f3SBiju Das #define R9A09G047_GBETH_0_CLK_PTP_REF_I 10 22f21923f3SBiju Das #define R9A09G047_GBETH_1_CLK_PTP_REF_I 11 23*a24cd110SBiju Das #define R9A09G047_USB3_0_REF_ALT_CLK_P 12 24*a24cd110SBiju Das #define R9A09G047_USB3_0_CLKCORE 13 2525458fddSBiju Das 2625458fddSBiju Das #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G047_CPG_H__ */ 27