xref: /linux/include/dt-bindings/clock/r8a7778-clock.h (revision 75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37)
1*2874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
283054671SUlrich Hecht /*
383054671SUlrich Hecht  * Copyright (C) 2014 Ulrich Hecht
483054671SUlrich Hecht  */
583054671SUlrich Hecht 
683054671SUlrich Hecht #ifndef __DT_BINDINGS_CLOCK_R8A7778_H__
783054671SUlrich Hecht #define __DT_BINDINGS_CLOCK_R8A7778_H__
883054671SUlrich Hecht 
983054671SUlrich Hecht /* CPG */
1083054671SUlrich Hecht #define R8A7778_CLK_PLLA	0
1183054671SUlrich Hecht #define R8A7778_CLK_PLLB	1
1283054671SUlrich Hecht #define R8A7778_CLK_B		2
1383054671SUlrich Hecht #define R8A7778_CLK_OUT		3
1483054671SUlrich Hecht #define R8A7778_CLK_P		4
1583054671SUlrich Hecht #define R8A7778_CLK_S		5
1683054671SUlrich Hecht #define R8A7778_CLK_S1		6
1783054671SUlrich Hecht 
1883054671SUlrich Hecht /* MSTP0 */
1983054671SUlrich Hecht #define R8A7778_CLK_I2C0	30
2083054671SUlrich Hecht #define R8A7778_CLK_I2C1	29
2183054671SUlrich Hecht #define R8A7778_CLK_I2C2	28
2283054671SUlrich Hecht #define R8A7778_CLK_I2C3	27
2383054671SUlrich Hecht #define R8A7778_CLK_SCIF0	26
2483054671SUlrich Hecht #define R8A7778_CLK_SCIF1	25
2583054671SUlrich Hecht #define R8A7778_CLK_SCIF2	24
2683054671SUlrich Hecht #define R8A7778_CLK_SCIF3	23
2783054671SUlrich Hecht #define R8A7778_CLK_SCIF4	22
2883054671SUlrich Hecht #define R8A7778_CLK_SCIF5	21
29adbb78e1SUlrich Hecht #define R8A7778_CLK_HSCIF0	19
30adbb78e1SUlrich Hecht #define R8A7778_CLK_HSCIF1	18
3183054671SUlrich Hecht #define R8A7778_CLK_TMU0	16
3283054671SUlrich Hecht #define R8A7778_CLK_TMU1	15
3383054671SUlrich Hecht #define R8A7778_CLK_TMU2	14
3483054671SUlrich Hecht #define R8A7778_CLK_SSI0	12
3583054671SUlrich Hecht #define R8A7778_CLK_SSI1	11
3683054671SUlrich Hecht #define R8A7778_CLK_SSI2	10
3783054671SUlrich Hecht #define R8A7778_CLK_SSI3	9
3883054671SUlrich Hecht #define R8A7778_CLK_SRU		8
3983054671SUlrich Hecht #define R8A7778_CLK_HSPI	7
4083054671SUlrich Hecht 
4183054671SUlrich Hecht /* MSTP1 */
4283054671SUlrich Hecht #define R8A7778_CLK_ETHER	14
4383054671SUlrich Hecht #define R8A7778_CLK_VIN0	10
4483054671SUlrich Hecht #define R8A7778_CLK_VIN1	9
4583054671SUlrich Hecht #define R8A7778_CLK_USB		0
4683054671SUlrich Hecht 
4783054671SUlrich Hecht /* MSTP3 */
4883054671SUlrich Hecht #define R8A7778_CLK_MMC		31
4983054671SUlrich Hecht #define R8A7778_CLK_SDHI0	23
5083054671SUlrich Hecht #define R8A7778_CLK_SDHI1	22
5183054671SUlrich Hecht #define R8A7778_CLK_SDHI2	21
5283054671SUlrich Hecht #define R8A7778_CLK_SSI4	11
5383054671SUlrich Hecht #define R8A7778_CLK_SSI5	10
5483054671SUlrich Hecht #define R8A7778_CLK_SSI6	9
5583054671SUlrich Hecht #define R8A7778_CLK_SSI7	8
5683054671SUlrich Hecht #define R8A7778_CLK_SSI8	7
5783054671SUlrich Hecht 
5883054671SUlrich Hecht /* MSTP5 */
5983054671SUlrich Hecht #define R8A7778_CLK_SRU_SRC0	31
6083054671SUlrich Hecht #define R8A7778_CLK_SRU_SRC1	30
6183054671SUlrich Hecht #define R8A7778_CLK_SRU_SRC2	29
6283054671SUlrich Hecht #define R8A7778_CLK_SRU_SRC3	28
6383054671SUlrich Hecht #define R8A7778_CLK_SRU_SRC4	27
6483054671SUlrich Hecht #define R8A7778_CLK_SRU_SRC5	26
6583054671SUlrich Hecht #define R8A7778_CLK_SRU_SRC6	25
6683054671SUlrich Hecht #define R8A7778_CLK_SRU_SRC7	24
6783054671SUlrich Hecht #define R8A7778_CLK_SRU_SRC8	23
6883054671SUlrich Hecht 
6983054671SUlrich Hecht #endif /* __DT_BINDINGS_CLOCK_R8A7778_H__ */
70