1 /* 2 * Copyright (C) 2016 Cogent Embedded Inc. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 */ 9 #ifndef __DT_BINDINGS_CLOCK_R8A7745_CPG_MSSR_H__ 10 #define __DT_BINDINGS_CLOCK_R8A7745_CPG_MSSR_H__ 11 12 #include <dt-bindings/clock/renesas-cpg-mssr.h> 13 14 /* r8a7745 CPG Core Clocks */ 15 #define R8A7745_CLK_Z2 0 16 #define R8A7745_CLK_ZG 1 17 #define R8A7745_CLK_ZTR 2 18 #define R8A7745_CLK_ZTRD2 3 19 #define R8A7745_CLK_ZT 4 20 #define R8A7745_CLK_ZX 5 21 #define R8A7745_CLK_ZS 6 22 #define R8A7745_CLK_HP 7 23 #define R8A7745_CLK_B 9 24 #define R8A7745_CLK_LB 10 25 #define R8A7745_CLK_P 11 26 #define R8A7745_CLK_CL 12 27 #define R8A7745_CLK_CP 13 28 #define R8A7745_CLK_M2 14 29 #define R8A7745_CLK_ZB3 16 30 #define R8A7745_CLK_ZB3D2 17 31 #define R8A7745_CLK_DDR 18 32 #define R8A7745_CLK_SDH 19 33 #define R8A7745_CLK_SD0 20 34 #define R8A7745_CLK_SD2 21 35 #define R8A7745_CLK_SD3 22 36 #define R8A7745_CLK_MMC0 23 37 #define R8A7745_CLK_MP 24 38 #define R8A7745_CLK_QSPI 25 39 #define R8A7745_CLK_CPEX 26 40 #define R8A7745_CLK_RCAN 27 41 #define R8A7745_CLK_R 28 42 #define R8A7745_CLK_OSC 29 43 44 #endif /* __DT_BINDINGS_CLOCK_R8A7745_CPG_MSSR_H__ */ 45