xref: /linux/include/dt-bindings/clock/qcom,sm8750-videocc.h (revision d30c1683aaecb93d2ab95685dc4300a33d3cea7a)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /*
3  * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
4  */
5 
6 #ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8750_H
7 #define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8750_H
8 
9 /* VIDEO_CC clocks */
10 #define VIDEO_CC_AHB_CLK					0
11 #define VIDEO_CC_AHB_CLK_SRC					1
12 #define VIDEO_CC_MVS0_CLK					2
13 #define VIDEO_CC_MVS0_CLK_SRC					3
14 #define VIDEO_CC_MVS0_DIV_CLK_SRC				4
15 #define VIDEO_CC_MVS0_FREERUN_CLK				5
16 #define VIDEO_CC_MVS0_SHIFT_CLK					6
17 #define VIDEO_CC_MVS0C_CLK					7
18 #define VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC				8
19 #define VIDEO_CC_MVS0C_FREERUN_CLK				9
20 #define VIDEO_CC_MVS0C_SHIFT_CLK				10
21 #define VIDEO_CC_PLL0						11
22 #define VIDEO_CC_SLEEP_CLK					12
23 #define VIDEO_CC_SLEEP_CLK_SRC					13
24 #define VIDEO_CC_XO_CLK						14
25 #define VIDEO_CC_XO_CLK_SRC					15
26 
27 /* VIDEO_CC power domains */
28 #define VIDEO_CC_MVS0_GDSC					0
29 #define VIDEO_CC_MVS0C_GDSC					1
30 
31 /* VIDEO_CC resets */
32 #define VIDEO_CC_INTERFACE_BCR					0
33 #define VIDEO_CC_MVS0_BCR					1
34 #define VIDEO_CC_MVS0C_CLK_ARES					2
35 #define VIDEO_CC_MVS0C_BCR					3
36 #define VIDEO_CC_MVS0_FREERUN_CLK_ARES				4
37 #define VIDEO_CC_MVS0C_FREERUN_CLK_ARES				5
38 #define VIDEO_CC_XO_CLK_ARES					6
39 
40 #endif
41