xref: /linux/include/dt-bindings/clock/qcom,rpmcc.h (revision 132db93572821ec2fdf81e354cc40f558faf7e4f)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright 2015 Linaro Limited
4  */
5 
6 #ifndef _DT_BINDINGS_CLK_MSM_RPMCC_H
7 #define _DT_BINDINGS_CLK_MSM_RPMCC_H
8 
9 /* RPM clocks */
10 #define RPM_PXO_CLK				0
11 #define RPM_PXO_A_CLK				1
12 #define RPM_CXO_CLK				2
13 #define RPM_CXO_A_CLK				3
14 #define RPM_APPS_FABRIC_CLK			4
15 #define RPM_APPS_FABRIC_A_CLK			5
16 #define RPM_CFPB_CLK				6
17 #define RPM_CFPB_A_CLK				7
18 #define RPM_QDSS_CLK				8
19 #define RPM_QDSS_A_CLK				9
20 #define RPM_DAYTONA_FABRIC_CLK			10
21 #define RPM_DAYTONA_FABRIC_A_CLK		11
22 #define RPM_EBI1_CLK				12
23 #define RPM_EBI1_A_CLK				13
24 #define RPM_MM_FABRIC_CLK			14
25 #define RPM_MM_FABRIC_A_CLK			15
26 #define RPM_MMFPB_CLK				16
27 #define RPM_MMFPB_A_CLK				17
28 #define RPM_SYS_FABRIC_CLK			18
29 #define RPM_SYS_FABRIC_A_CLK			19
30 #define RPM_SFPB_CLK				20
31 #define RPM_SFPB_A_CLK				21
32 #define RPM_SMI_CLK				22
33 #define RPM_SMI_A_CLK				23
34 #define RPM_PLL4_CLK				24
35 #define RPM_XO_D0				25
36 #define RPM_XO_D1				26
37 #define RPM_XO_A0				27
38 #define RPM_XO_A1				28
39 #define RPM_XO_A2				29
40 #define RPM_NSS_FABRIC_0_CLK			30
41 #define RPM_NSS_FABRIC_0_A_CLK			31
42 #define RPM_NSS_FABRIC_1_CLK			32
43 #define RPM_NSS_FABRIC_1_A_CLK			33
44 
45 /* SMD RPM clocks */
46 #define RPM_SMD_XO_CLK_SRC				0
47 #define RPM_SMD_XO_A_CLK_SRC			1
48 #define RPM_SMD_PCNOC_CLK				2
49 #define RPM_SMD_PCNOC_A_CLK				3
50 #define RPM_SMD_SNOC_CLK				4
51 #define RPM_SMD_SNOC_A_CLK				5
52 #define RPM_SMD_BIMC_CLK				6
53 #define RPM_SMD_BIMC_A_CLK				7
54 #define RPM_SMD_QDSS_CLK				8
55 #define RPM_SMD_QDSS_A_CLK				9
56 #define RPM_SMD_BB_CLK1				10
57 #define RPM_SMD_BB_CLK1_A				11
58 #define RPM_SMD_BB_CLK2				12
59 #define RPM_SMD_BB_CLK2_A				13
60 #define RPM_SMD_RF_CLK1				14
61 #define RPM_SMD_RF_CLK1_A				15
62 #define RPM_SMD_RF_CLK2				16
63 #define RPM_SMD_RF_CLK2_A				17
64 #define RPM_SMD_BB_CLK1_PIN				18
65 #define RPM_SMD_BB_CLK1_A_PIN			19
66 #define RPM_SMD_BB_CLK2_PIN				20
67 #define RPM_SMD_BB_CLK2_A_PIN			21
68 #define RPM_SMD_RF_CLK1_PIN				22
69 #define RPM_SMD_RF_CLK1_A_PIN			23
70 #define RPM_SMD_RF_CLK2_PIN				24
71 #define RPM_SMD_RF_CLK2_A_PIN			25
72 #define RPM_SMD_PNOC_CLK			26
73 #define RPM_SMD_PNOC_A_CLK			27
74 #define RPM_SMD_CNOC_CLK			28
75 #define RPM_SMD_CNOC_A_CLK			29
76 #define RPM_SMD_MMSSNOC_AHB_CLK			30
77 #define RPM_SMD_MMSSNOC_AHB_A_CLK		31
78 #define RPM_SMD_GFX3D_CLK_SRC			32
79 #define RPM_SMD_GFX3D_A_CLK_SRC			33
80 #define RPM_SMD_OCMEMGX_CLK			34
81 #define RPM_SMD_OCMEMGX_A_CLK			35
82 #define RPM_SMD_CXO_D0				36
83 #define RPM_SMD_CXO_D0_A			37
84 #define RPM_SMD_CXO_D1				38
85 #define RPM_SMD_CXO_D1_A			39
86 #define RPM_SMD_CXO_A0				40
87 #define RPM_SMD_CXO_A0_A			41
88 #define RPM_SMD_CXO_A1				42
89 #define RPM_SMD_CXO_A1_A			43
90 #define RPM_SMD_CXO_A2				44
91 #define RPM_SMD_CXO_A2_A			45
92 #define RPM_SMD_DIV_CLK1			46
93 #define RPM_SMD_DIV_A_CLK1			47
94 #define RPM_SMD_DIV_CLK2			48
95 #define RPM_SMD_DIV_A_CLK2			49
96 #define RPM_SMD_DIFF_CLK			50
97 #define RPM_SMD_DIFF_A_CLK			51
98 #define RPM_SMD_CXO_D0_PIN			52
99 #define RPM_SMD_CXO_D0_A_PIN			53
100 #define RPM_SMD_CXO_D1_PIN			54
101 #define RPM_SMD_CXO_D1_A_PIN			55
102 #define RPM_SMD_CXO_A0_PIN			56
103 #define RPM_SMD_CXO_A0_A_PIN			57
104 #define RPM_SMD_CXO_A1_PIN			58
105 #define RPM_SMD_CXO_A1_A_PIN			59
106 #define RPM_SMD_CXO_A2_PIN			60
107 #define RPM_SMD_CXO_A2_A_PIN			61
108 #define RPM_SMD_AGGR1_NOC_CLK			62
109 #define RPM_SMD_AGGR1_NOC_A_CLK			63
110 #define RPM_SMD_AGGR2_NOC_CLK			64
111 #define RPM_SMD_AGGR2_NOC_A_CLK			65
112 #define RPM_SMD_MMAXI_CLK			66
113 #define RPM_SMD_MMAXI_A_CLK			67
114 #define RPM_SMD_IPA_CLK				68
115 #define RPM_SMD_IPA_A_CLK			69
116 #define RPM_SMD_CE1_CLK				70
117 #define RPM_SMD_CE1_A_CLK			71
118 #define RPM_SMD_DIV_CLK3			72
119 #define RPM_SMD_DIV_A_CLK3			73
120 #define RPM_SMD_LN_BB_CLK			74
121 #define RPM_SMD_LN_BB_A_CLK			75
122 #define RPM_SMD_BIMC_GPU_CLK			76
123 #define RPM_SMD_BIMC_GPU_A_CLK			77
124 #define RPM_SMD_QPIC_CLK			78
125 #define RPM_SMD_QPIC_CLK_A			79
126 #define RPM_SMD_LN_BB_CLK1			80
127 #define RPM_SMD_LN_BB_CLK1_A			81
128 #define RPM_SMD_LN_BB_CLK2			82
129 #define RPM_SMD_LN_BB_CLK2_A			83
130 #define RPM_SMD_LN_BB_CLK3_PIN			84
131 #define RPM_SMD_LN_BB_CLK3_A_PIN		85
132 #define RPM_SMD_RF_CLK3				86
133 #define RPM_SMD_RF_CLK3_A			87
134 #define RPM_SMD_RF_CLK3_PIN			88
135 #define RPM_SMD_RF_CLK3_A_PIN			89
136 
137 #endif
138