1*58410321SJagadeesh Kona /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*58410321SJagadeesh Kona /* 3*58410321SJagadeesh Kona * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4*58410321SJagadeesh Kona */ 5*58410321SJagadeesh Kona 6*58410321SJagadeesh Kona #ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_MAILI_H 7*58410321SJagadeesh Kona #define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_MAILI_H 8*58410321SJagadeesh Kona 9*58410321SJagadeesh Kona /* VIDEO_CC clocks */ 10*58410321SJagadeesh Kona #define VIDEO_CC_AHB_CLK 0 11*58410321SJagadeesh Kona #define VIDEO_CC_AHB_CLK_SRC 1 12*58410321SJagadeesh Kona #define VIDEO_CC_MVS0_CLK 2 13*58410321SJagadeesh Kona #define VIDEO_CC_MVS0_CLK_SRC 3 14*58410321SJagadeesh Kona #define VIDEO_CC_MVS0_FREERUN_CLK 4 15*58410321SJagadeesh Kona #define VIDEO_CC_MVS0_SHIFT_CLK 5 16*58410321SJagadeesh Kona #define VIDEO_CC_MVS0_VPP0_CLK 6 17*58410321SJagadeesh Kona #define VIDEO_CC_MVS0_VPP0_FREERUN_CLK 7 18*58410321SJagadeesh Kona #define VIDEO_CC_MVS0B_CLK 8 19*58410321SJagadeesh Kona #define VIDEO_CC_MVS0B_CLK_SRC 9 20*58410321SJagadeesh Kona #define VIDEO_CC_MVS0B_FREERUN_CLK 10 21*58410321SJagadeesh Kona #define VIDEO_CC_MVS0C_CLK 11 22*58410321SJagadeesh Kona #define VIDEO_CC_MVS0C_CLK_SRC 12 23*58410321SJagadeesh Kona #define VIDEO_CC_MVS0C_DEBUG_CLK 13 24*58410321SJagadeesh Kona #define VIDEO_CC_MVS0C_FREERUN_CLK 14 25*58410321SJagadeesh Kona #define VIDEO_CC_MVS0C_SHIFT_CLK 15 26*58410321SJagadeesh Kona #define VIDEO_CC_PLL0 16 27*58410321SJagadeesh Kona #define VIDEO_CC_PLL1 17 28*58410321SJagadeesh Kona #define VIDEO_CC_PLL2 18 29*58410321SJagadeesh Kona #define VIDEO_CC_SLEEP_CLK 19 30*58410321SJagadeesh Kona #define VIDEO_CC_TS_XO_CLK 20 31*58410321SJagadeesh Kona #define VIDEO_CC_XO_CLK 21 32*58410321SJagadeesh Kona #define VIDEO_CC_XO_CLK_SRC 22 33*58410321SJagadeesh Kona 34*58410321SJagadeesh Kona /* VIDEO_CC power domains */ 35*58410321SJagadeesh Kona #define VIDEO_CC_MVS0_GDSC 0 36*58410321SJagadeesh Kona #define VIDEO_CC_MVS0_VPP0_GDSC 1 37*58410321SJagadeesh Kona #define VIDEO_CC_MVS0C_GDSC 2 38*58410321SJagadeesh Kona 39*58410321SJagadeesh Kona /* VIDEO_CC resets */ 40*58410321SJagadeesh Kona #define VIDEO_CC_INTERFACE_BCR 0 41*58410321SJagadeesh Kona #define VIDEO_CC_MVS0_BCR 1 42*58410321SJagadeesh Kona #define VIDEO_CC_MVS0_CLK_ARES 2 43*58410321SJagadeesh Kona #define VIDEO_CC_MVS0_FREERUN_CLK_ARES 3 44*58410321SJagadeesh Kona #define VIDEO_CC_MVS0_VPP0_BCR 4 45*58410321SJagadeesh Kona #define VIDEO_CC_MVS0C_BCR 5 46*58410321SJagadeesh Kona #define VIDEO_CC_MVS0C_CLK_ARES 6 47*58410321SJagadeesh Kona #define VIDEO_CC_MVS0C_FREERUN_CLK_ARES 7 48*58410321SJagadeesh Kona #define VIDEO_CC_XO_CLK_ARES 8 49*58410321SJagadeesh Kona 50*58410321SJagadeesh Kona #endif 51