xref: /linux/include/dt-bindings/clock/mt7621-clk.h (revision 6c8c1406a6d6a3f2e61ac590f5c0994231bc6be7)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Author: Sergio Paracuellos <sergio.paracuellos@gmail.com>
4  */
5 
6 #ifndef _DT_BINDINGS_CLK_MT7621_H
7 #define _DT_BINDINGS_CLK_MT7621_H
8 
9 #define MT7621_CLK_XTAL		0
10 #define MT7621_CLK_CPU		1
11 #define MT7621_CLK_BUS		2
12 #define MT7621_CLK_50M		3
13 #define MT7621_CLK_125M		4
14 #define MT7621_CLK_150M		5
15 #define MT7621_CLK_250M		6
16 #define MT7621_CLK_270M		7
17 
18 #define MT7621_CLK_HSDMA	8
19 #define MT7621_CLK_FE		9
20 #define MT7621_CLK_SP_DIVTX	10
21 #define MT7621_CLK_TIMER	11
22 #define MT7621_CLK_PCM		12
23 #define MT7621_CLK_PIO		13
24 #define MT7621_CLK_GDMA		14
25 #define MT7621_CLK_NAND		15
26 #define MT7621_CLK_I2C		16
27 #define MT7621_CLK_I2S		17
28 #define MT7621_CLK_SPI		18
29 #define MT7621_CLK_UART1	19
30 #define MT7621_CLK_UART2	20
31 #define MT7621_CLK_UART3	21
32 #define MT7621_CLK_ETH		22
33 #define MT7621_CLK_PCIE0	23
34 #define MT7621_CLK_PCIE1	24
35 #define MT7621_CLK_PCIE2	25
36 #define MT7621_CLK_CRYPTO	26
37 #define MT7621_CLK_SHXC		27
38 
39 #define MT7621_CLK_MAX		28
40 
41 #endif /* _DT_BINDINGS_CLK_MT7621_H */
42