1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * Copyright (C) 2024 Mobileye Vision Technologies Ltd. 4 */ 5 6 #ifndef _DT_BINDINGS_CLOCK_MOBILEYE_EYEQ5_CLK_H 7 #define _DT_BINDINGS_CLOCK_MOBILEYE_EYEQ5_CLK_H 8 9 #define EQ5C_PLL_CPU 0 10 #define EQ5C_PLL_VMP 1 11 #define EQ5C_PLL_PMA 2 12 #define EQ5C_PLL_VDI 3 13 #define EQ5C_PLL_DDR0 4 14 #define EQ5C_PLL_PCI 5 15 #define EQ5C_PLL_PER 6 16 #define EQ5C_PLL_PMAC 7 17 #define EQ5C_PLL_MPC 8 18 #define EQ5C_PLL_DDR1 9 19 20 #define EQ5C_DIV_OSPI 10 21 22 /* EQ5C_PLL_CPU children */ 23 #define EQ5C_CPU_CORE0 11 24 #define EQ5C_CPU_CORE1 12 25 #define EQ5C_CPU_CORE2 13 26 #define EQ5C_CPU_CORE3 14 27 28 /* EQ5C_PLL_PER children */ 29 #define EQ5C_PER_OCC 15 30 #define EQ5C_PER_UART 16 31 #define EQ5C_PER_SPI 17 32 #define EQ5C_PER_I2C 18 33 #define EQ5C_PER_GPIO 19 34 #define EQ5C_PER_EMMC 20 35 #define EQ5C_PER_OCC_PCI 21 36 37 #define EQ6LC_PLL_DDR 0 38 #define EQ6LC_PLL_CPU 1 39 #define EQ6LC_PLL_PER 2 40 #define EQ6LC_PLL_VDI 3 41 42 #define EQ6HC_CENTRAL_PLL_CPU 0 43 #define EQ6HC_CENTRAL_CPU_OCC 1 44 45 #define EQ6HC_WEST_PLL_PER 0 46 #define EQ6HC_WEST_PER_OCC 1 47 #define EQ6HC_WEST_PER_UART 2 48 49 #define EQ6HC_SOUTH_PLL_VDI 0 50 #define EQ6HC_SOUTH_PLL_PCIE 1 51 #define EQ6HC_SOUTH_PLL_PER 2 52 #define EQ6HC_SOUTH_PLL_ISP 3 53 54 #define EQ6HC_SOUTH_DIV_EMMC 4 55 #define EQ6HC_SOUTH_DIV_OSPI_REF 5 56 #define EQ6HC_SOUTH_DIV_OSPI_SYS 6 57 #define EQ6HC_SOUTH_DIV_TSU 7 58 59 #define EQ6HC_ACC_PLL_XNN 0 60 #define EQ6HC_ACC_PLL_VMP 1 61 #define EQ6HC_ACC_PLL_PMA 2 62 #define EQ6HC_ACC_PLL_MPC 3 63 #define EQ6HC_ACC_PLL_NOC 4 64 65 #endif 66