1*ea1cca02SYassine Oudjana /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*ea1cca02SYassine Oudjana 3*ea1cca02SYassine Oudjana #ifndef _DT_BINDINGS_CLK_MT6735_INFRACFG_H 4*ea1cca02SYassine Oudjana #define _DT_BINDINGS_CLK_MT6735_INFRACFG_H 5*ea1cca02SYassine Oudjana 6*ea1cca02SYassine Oudjana #define CLK_INFRA_DBG 0 7*ea1cca02SYassine Oudjana #define CLK_INFRA_GCE 1 8*ea1cca02SYassine Oudjana #define CLK_INFRA_TRBG 2 9*ea1cca02SYassine Oudjana #define CLK_INFRA_CPUM 3 10*ea1cca02SYassine Oudjana #define CLK_INFRA_DEVAPC 4 11*ea1cca02SYassine Oudjana #define CLK_INFRA_AUDIO 5 12*ea1cca02SYassine Oudjana #define CLK_INFRA_GCPU 6 13*ea1cca02SYassine Oudjana #define CLK_INFRA_L2C_SRAM 7 14*ea1cca02SYassine Oudjana #define CLK_INFRA_M4U 8 15*ea1cca02SYassine Oudjana #define CLK_INFRA_CLDMA 9 16*ea1cca02SYassine Oudjana #define CLK_INFRA_CONNMCU_BUS 10 17*ea1cca02SYassine Oudjana #define CLK_INFRA_KP 11 18*ea1cca02SYassine Oudjana #define CLK_INFRA_APXGPT 12 19*ea1cca02SYassine Oudjana #define CLK_INFRA_SEJ 13 20*ea1cca02SYassine Oudjana #define CLK_INFRA_CCIF0_AP 14 21*ea1cca02SYassine Oudjana #define CLK_INFRA_CCIF1_AP 15 22*ea1cca02SYassine Oudjana #define CLK_INFRA_PMIC_SPI 16 23*ea1cca02SYassine Oudjana #define CLK_INFRA_PMIC_WRAP 17 24*ea1cca02SYassine Oudjana 25*ea1cca02SYassine Oudjana #endif 26