xref: /linux/include/dt-bindings/clock/lpc18xx-cgu.h (revision e5451c8f8330e03ad3cfa16048b4daf961af434f)
1*b04e0b8fSJoachim Eastwood /*
2*b04e0b8fSJoachim Eastwood  * Copyright (c) 2015 Joachim Eastwood <manabian@gmail.com>
3*b04e0b8fSJoachim Eastwood  *
4*b04e0b8fSJoachim Eastwood  * This code is released using a dual license strategy: BSD/GPL
5*b04e0b8fSJoachim Eastwood  * You can choose the licence that better fits your requirements.
6*b04e0b8fSJoachim Eastwood  *
7*b04e0b8fSJoachim Eastwood  * Released under the terms of 3-clause BSD License
8*b04e0b8fSJoachim Eastwood  * Released under the terms of GNU General Public License Version 2.0
9*b04e0b8fSJoachim Eastwood  *
10*b04e0b8fSJoachim Eastwood  */
11*b04e0b8fSJoachim Eastwood 
12*b04e0b8fSJoachim Eastwood /* LPC18xx/43xx base clock ids */
13*b04e0b8fSJoachim Eastwood #define BASE_SAFE_CLK		0
14*b04e0b8fSJoachim Eastwood #define BASE_USB0_CLK		1
15*b04e0b8fSJoachim Eastwood #define BASE_PERIPH_CLK		2
16*b04e0b8fSJoachim Eastwood #define BASE_USB1_CLK		3
17*b04e0b8fSJoachim Eastwood #define BASE_CPU_CLK		4
18*b04e0b8fSJoachim Eastwood #define BASE_SPIFI_CLK		5
19*b04e0b8fSJoachim Eastwood #define BASE_SPI_CLK		6
20*b04e0b8fSJoachim Eastwood #define BASE_PHY_RX_CLK		7
21*b04e0b8fSJoachim Eastwood #define BASE_PHY_TX_CLK		8
22*b04e0b8fSJoachim Eastwood #define BASE_APB1_CLK		9
23*b04e0b8fSJoachim Eastwood #define BASE_APB3_CLK		10
24*b04e0b8fSJoachim Eastwood #define BASE_LCD_CLK		11
25*b04e0b8fSJoachim Eastwood #define BASE_ADCHS_CLK		12
26*b04e0b8fSJoachim Eastwood #define BASE_SDIO_CLK		13
27*b04e0b8fSJoachim Eastwood #define BASE_SSP0_CLK		14
28*b04e0b8fSJoachim Eastwood #define BASE_SSP1_CLK		15
29*b04e0b8fSJoachim Eastwood #define BASE_UART0_CLK		16
30*b04e0b8fSJoachim Eastwood #define BASE_UART1_CLK		17
31*b04e0b8fSJoachim Eastwood #define BASE_UART2_CLK		18
32*b04e0b8fSJoachim Eastwood #define BASE_UART3_CLK		19
33*b04e0b8fSJoachim Eastwood #define BASE_OUT_CLK		20
34*b04e0b8fSJoachim Eastwood #define BASE_RES1_CLK		21
35*b04e0b8fSJoachim Eastwood #define BASE_RES2_CLK		22
36*b04e0b8fSJoachim Eastwood #define BASE_RES3_CLK		23
37*b04e0b8fSJoachim Eastwood #define BASE_RES4_CLK		24
38*b04e0b8fSJoachim Eastwood #define BASE_AUDIO_CLK		25
39*b04e0b8fSJoachim Eastwood #define BASE_CGU_OUT0_CLK	26
40*b04e0b8fSJoachim Eastwood #define BASE_CGU_OUT1_CLK	27
41*b04e0b8fSJoachim Eastwood #define BASE_CLK_MAX		(BASE_CGU_OUT1_CLK + 1)
42