1*172c48c7STero Kristo /* 2*172c48c7STero Kristo * Copyright 2017 Texas Instruments, Inc. 3*172c48c7STero Kristo * 4*172c48c7STero Kristo * This software is licensed under the terms of the GNU General Public 5*172c48c7STero Kristo * License version 2, as published by the Free Software Foundation, and 6*172c48c7STero Kristo * may be copied, distributed, and modified under those terms. 7*172c48c7STero Kristo * 8*172c48c7STero Kristo * This program is distributed in the hope that it will be useful, 9*172c48c7STero Kristo * but WITHOUT ANY WARRANTY; without even the implied warranty of 10*172c48c7STero Kristo * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11*172c48c7STero Kristo * GNU General Public License for more details. 12*172c48c7STero Kristo */ 13*172c48c7STero Kristo #ifndef __DT_BINDINGS_CLK_AM3_H 14*172c48c7STero Kristo #define __DT_BINDINGS_CLK_AM3_H 15*172c48c7STero Kristo 16*172c48c7STero Kristo #define AM3_CLKCTRL_OFFSET 0x0 17*172c48c7STero Kristo #define AM3_CLKCTRL_INDEX(offset) ((offset) - AM3_CLKCTRL_OFFSET) 18*172c48c7STero Kristo 19*172c48c7STero Kristo /* l4_per clocks */ 20*172c48c7STero Kristo #define AM3_L4_PER_CLKCTRL_OFFSET 0x14 21*172c48c7STero Kristo #define AM3_L4_PER_CLKCTRL_INDEX(offset) ((offset) - AM3_L4_PER_CLKCTRL_OFFSET) 22*172c48c7STero Kristo #define AM3_CPGMAC0_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x14) 23*172c48c7STero Kristo #define AM3_LCDC_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x18) 24*172c48c7STero Kristo #define AM3_USB_OTG_HS_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x1c) 25*172c48c7STero Kristo #define AM3_TPTC0_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x24) 26*172c48c7STero Kristo #define AM3_EMIF_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x28) 27*172c48c7STero Kristo #define AM3_OCMCRAM_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x2c) 28*172c48c7STero Kristo #define AM3_GPMC_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x30) 29*172c48c7STero Kristo #define AM3_MCASP0_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x34) 30*172c48c7STero Kristo #define AM3_UART6_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x38) 31*172c48c7STero Kristo #define AM3_MMC1_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x3c) 32*172c48c7STero Kristo #define AM3_ELM_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x40) 33*172c48c7STero Kristo #define AM3_I2C3_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x44) 34*172c48c7STero Kristo #define AM3_I2C2_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x48) 35*172c48c7STero Kristo #define AM3_SPI0_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x4c) 36*172c48c7STero Kristo #define AM3_SPI1_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x50) 37*172c48c7STero Kristo #define AM3_L4_LS_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x60) 38*172c48c7STero Kristo #define AM3_MCASP1_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x68) 39*172c48c7STero Kristo #define AM3_UART2_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x6c) 40*172c48c7STero Kristo #define AM3_UART3_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x70) 41*172c48c7STero Kristo #define AM3_UART4_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x74) 42*172c48c7STero Kristo #define AM3_UART5_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x78) 43*172c48c7STero Kristo #define AM3_TIMER7_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x7c) 44*172c48c7STero Kristo #define AM3_TIMER2_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x80) 45*172c48c7STero Kristo #define AM3_TIMER3_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x84) 46*172c48c7STero Kristo #define AM3_TIMER4_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x88) 47*172c48c7STero Kristo #define AM3_RNG_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x90) 48*172c48c7STero Kristo #define AM3_AES_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x94) 49*172c48c7STero Kristo #define AM3_SHAM_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xa0) 50*172c48c7STero Kristo #define AM3_GPIO2_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xac) 51*172c48c7STero Kristo #define AM3_GPIO3_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xb0) 52*172c48c7STero Kristo #define AM3_GPIO4_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xb4) 53*172c48c7STero Kristo #define AM3_TPCC_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xbc) 54*172c48c7STero Kristo #define AM3_D_CAN0_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xc0) 55*172c48c7STero Kristo #define AM3_D_CAN1_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xc4) 56*172c48c7STero Kristo #define AM3_EPWMSS1_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xcc) 57*172c48c7STero Kristo #define AM3_EPWMSS0_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xd4) 58*172c48c7STero Kristo #define AM3_EPWMSS2_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xd8) 59*172c48c7STero Kristo #define AM3_L3_INSTR_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xdc) 60*172c48c7STero Kristo #define AM3_L3_MAIN_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xe0) 61*172c48c7STero Kristo #define AM3_PRUSS_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xe8) 62*172c48c7STero Kristo #define AM3_TIMER5_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xec) 63*172c48c7STero Kristo #define AM3_TIMER6_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xf0) 64*172c48c7STero Kristo #define AM3_MMC2_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xf4) 65*172c48c7STero Kristo #define AM3_MMC3_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xf8) 66*172c48c7STero Kristo #define AM3_TPTC1_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xfc) 67*172c48c7STero Kristo #define AM3_TPTC2_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x100) 68*172c48c7STero Kristo #define AM3_SPINLOCK_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x10c) 69*172c48c7STero Kristo #define AM3_MAILBOX_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x110) 70*172c48c7STero Kristo #define AM3_L4_HS_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x120) 71*172c48c7STero Kristo #define AM3_OCPWP_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x130) 72*172c48c7STero Kristo #define AM3_CLKDIV32K_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x14c) 73*172c48c7STero Kristo 74*172c48c7STero Kristo /* l4_wkup clocks */ 75*172c48c7STero Kristo #define AM3_L4_WKUP_CLKCTRL_OFFSET 0x4 76*172c48c7STero Kristo #define AM3_L4_WKUP_CLKCTRL_INDEX(offset) ((offset) - AM3_L4_WKUP_CLKCTRL_OFFSET) 77*172c48c7STero Kristo #define AM3_CONTROL_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0x4) 78*172c48c7STero Kristo #define AM3_GPIO1_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0x8) 79*172c48c7STero Kristo #define AM3_L4_WKUP_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xc) 80*172c48c7STero Kristo #define AM3_DEBUGSS_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0x14) 81*172c48c7STero Kristo #define AM3_WKUP_M3_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xb0) 82*172c48c7STero Kristo #define AM3_UART1_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xb4) 83*172c48c7STero Kristo #define AM3_I2C1_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xb8) 84*172c48c7STero Kristo #define AM3_ADC_TSC_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xbc) 85*172c48c7STero Kristo #define AM3_SMARTREFLEX0_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xc0) 86*172c48c7STero Kristo #define AM3_TIMER1_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xc4) 87*172c48c7STero Kristo #define AM3_SMARTREFLEX1_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xc8) 88*172c48c7STero Kristo #define AM3_WD_TIMER2_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xd4) 89*172c48c7STero Kristo 90*172c48c7STero Kristo /* mpu clocks */ 91*172c48c7STero Kristo #define AM3_MPU_CLKCTRL_OFFSET 0x4 92*172c48c7STero Kristo #define AM3_MPU_CLKCTRL_INDEX(offset) ((offset) - AM3_MPU_CLKCTRL_OFFSET) 93*172c48c7STero Kristo #define AM3_MPU_CLKCTRL AM3_MPU_CLKCTRL_INDEX(0x4) 94*172c48c7STero Kristo 95*172c48c7STero Kristo /* l4_rtc clocks */ 96*172c48c7STero Kristo #define AM3_RTC_CLKCTRL AM3_CLKCTRL_INDEX(0x0) 97*172c48c7STero Kristo 98*172c48c7STero Kristo /* gfx_l3 clocks */ 99*172c48c7STero Kristo #define AM3_GFX_L3_CLKCTRL_OFFSET 0x4 100*172c48c7STero Kristo #define AM3_GFX_L3_CLKCTRL_INDEX(offset) ((offset) - AM3_GFX_L3_CLKCTRL_OFFSET) 101*172c48c7STero Kristo #define AM3_GFX_CLKCTRL AM3_GFX_L3_CLKCTRL_INDEX(0x4) 102*172c48c7STero Kristo 103*172c48c7STero Kristo /* l4_cefuse clocks */ 104*172c48c7STero Kristo #define AM3_L4_CEFUSE_CLKCTRL_OFFSET 0x20 105*172c48c7STero Kristo #define AM3_L4_CEFUSE_CLKCTRL_INDEX(offset) ((offset) - AM3_L4_CEFUSE_CLKCTRL_OFFSET) 106*172c48c7STero Kristo #define AM3_CEFUSE_CLKCTRL AM3_L4_CEFUSE_CLKCTRL_INDEX(0x20) 107*172c48c7STero Kristo 108*172c48c7STero Kristo #endif 109