1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef _DRM_GPU_SCHEDULER_H_ 25 #define _DRM_GPU_SCHEDULER_H_ 26 27 #include <drm/spsc_queue.h> 28 #include <linux/dma-fence.h> 29 30 #define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000) 31 32 struct drm_gpu_scheduler; 33 struct drm_sched_rq; 34 35 enum drm_sched_priority { 36 DRM_SCHED_PRIORITY_MIN, 37 DRM_SCHED_PRIORITY_LOW = DRM_SCHED_PRIORITY_MIN, 38 DRM_SCHED_PRIORITY_NORMAL, 39 DRM_SCHED_PRIORITY_HIGH_SW, 40 DRM_SCHED_PRIORITY_HIGH_HW, 41 DRM_SCHED_PRIORITY_KERNEL, 42 DRM_SCHED_PRIORITY_MAX, 43 DRM_SCHED_PRIORITY_INVALID = -1, 44 DRM_SCHED_PRIORITY_UNSET = -2 45 }; 46 47 /** 48 * struct drm_sched_entity - A wrapper around a job queue (typically 49 * attached to the DRM file_priv). 50 * 51 * @list: used to append this struct to the list of entities in the 52 * runqueue. 53 * @rq: runqueue on which this entity is currently scheduled. 54 * @rq_list: a list of run queues on which jobs from this entity can 55 * be scheduled 56 * @num_rq_list: number of run queues in the rq_list 57 * @rq_lock: lock to modify the runqueue to which this entity belongs. 58 * @job_queue: the list of jobs of this entity. 59 * @fence_seq: a linearly increasing seqno incremented with each 60 * new &drm_sched_fence which is part of the entity. 61 * @fence_context: a unique context for all the fences which belong 62 * to this entity. 63 * The &drm_sched_fence.scheduled uses the 64 * fence_context but &drm_sched_fence.finished uses 65 * fence_context + 1. 66 * @dependency: the dependency fence of the job which is on the top 67 * of the job queue. 68 * @cb: callback for the dependency fence above. 69 * @guilty: points to ctx's guilty. 70 * @fini_status: contains the exit status in case the process was signalled. 71 * @last_scheduled: points to the finished fence of the last scheduled job. 72 * @last_user: last group leader pushing a job into the entity. 73 * 74 * Entities will emit jobs in order to their corresponding hardware 75 * ring, and the scheduler will alternate between entities based on 76 * scheduling policy. 77 */ 78 struct drm_sched_entity { 79 struct list_head list; 80 struct drm_sched_rq *rq; 81 struct drm_sched_rq **rq_list; 82 unsigned int num_rq_list; 83 spinlock_t rq_lock; 84 85 struct spsc_queue job_queue; 86 87 atomic_t fence_seq; 88 uint64_t fence_context; 89 90 struct dma_fence *dependency; 91 struct dma_fence_cb cb; 92 atomic_t *guilty; 93 struct dma_fence *last_scheduled; 94 struct task_struct *last_user; 95 }; 96 97 /** 98 * struct drm_sched_rq - queue of entities to be scheduled. 99 * 100 * @lock: to modify the entities list. 101 * @sched: the scheduler to which this rq belongs to. 102 * @entities: list of the entities to be scheduled. 103 * @current_entity: the entity which is to be scheduled. 104 * 105 * Run queue is a set of entities scheduling command submissions for 106 * one specific ring. It implements the scheduling policy that selects 107 * the next entity to emit commands from. 108 */ 109 struct drm_sched_rq { 110 spinlock_t lock; 111 struct drm_gpu_scheduler *sched; 112 struct list_head entities; 113 struct drm_sched_entity *current_entity; 114 }; 115 116 /** 117 * struct drm_sched_fence - fences corresponding to the scheduling of a job. 118 */ 119 struct drm_sched_fence { 120 /** 121 * @scheduled: this fence is what will be signaled by the scheduler 122 * when the job is scheduled. 123 */ 124 struct dma_fence scheduled; 125 126 /** 127 * @finished: this fence is what will be signaled by the scheduler 128 * when the job is completed. 129 * 130 * When setting up an out fence for the job, you should use 131 * this, since it's available immediately upon 132 * drm_sched_job_init(), and the fence returned by the driver 133 * from run_job() won't be created until the dependencies have 134 * resolved. 135 */ 136 struct dma_fence finished; 137 138 /** 139 * @cb: the callback for the parent fence below. 140 */ 141 struct dma_fence_cb cb; 142 /** 143 * @parent: the fence returned by &drm_sched_backend_ops.run_job 144 * when scheduling the job on hardware. We signal the 145 * &drm_sched_fence.finished fence once parent is signalled. 146 */ 147 struct dma_fence *parent; 148 /** 149 * @sched: the scheduler instance to which the job having this struct 150 * belongs to. 151 */ 152 struct drm_gpu_scheduler *sched; 153 /** 154 * @lock: the lock used by the scheduled and the finished fences. 155 */ 156 spinlock_t lock; 157 /** 158 * @owner: job owner for debugging 159 */ 160 void *owner; 161 }; 162 163 struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f); 164 165 /** 166 * struct drm_sched_job - A job to be run by an entity. 167 * 168 * @queue_node: used to append this struct to the queue of jobs in an entity. 169 * @sched: the scheduler instance on which this job is scheduled. 170 * @s_fence: contains the fences for the scheduling of job. 171 * @finish_cb: the callback for the finished fence. 172 * @finish_work: schedules the function @drm_sched_job_finish once the job has 173 * finished to remove the job from the 174 * @drm_gpu_scheduler.ring_mirror_list. 175 * @node: used to append this struct to the @drm_gpu_scheduler.ring_mirror_list. 176 * @work_tdr: schedules a delayed call to @drm_sched_job_timedout after the timeout 177 * interval is over. 178 * @id: a unique id assigned to each job scheduled on the scheduler. 179 * @karma: increment on every hang caused by this job. If this exceeds the hang 180 * limit of the scheduler then the job is marked guilty and will not 181 * be scheduled further. 182 * @s_priority: the priority of the job. 183 * @entity: the entity to which this job belongs. 184 * 185 * A job is created by the driver using drm_sched_job_init(), and 186 * should call drm_sched_entity_push_job() once it wants the scheduler 187 * to schedule the job. 188 */ 189 struct drm_sched_job { 190 struct spsc_node queue_node; 191 struct drm_gpu_scheduler *sched; 192 struct drm_sched_fence *s_fence; 193 struct dma_fence_cb finish_cb; 194 struct work_struct finish_work; 195 struct list_head node; 196 struct delayed_work work_tdr; 197 uint64_t id; 198 atomic_t karma; 199 enum drm_sched_priority s_priority; 200 struct drm_sched_entity *entity; 201 }; 202 203 static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job, 204 int threshold) 205 { 206 return (s_job && atomic_inc_return(&s_job->karma) > threshold); 207 } 208 209 /** 210 * struct drm_sched_backend_ops 211 * 212 * Define the backend operations called by the scheduler, 213 * these functions should be implemented in driver side. 214 */ 215 struct drm_sched_backend_ops { 216 /** 217 * @dependency: Called when the scheduler is considering scheduling 218 * this job next, to get another struct dma_fence for this job to 219 * block on. Once it returns NULL, run_job() may be called. 220 */ 221 struct dma_fence *(*dependency)(struct drm_sched_job *sched_job, 222 struct drm_sched_entity *s_entity); 223 224 /** 225 * @run_job: Called to execute the job once all of the dependencies 226 * have been resolved. This may be called multiple times, if 227 * timedout_job() has happened and drm_sched_job_recovery() 228 * decides to try it again. 229 */ 230 struct dma_fence *(*run_job)(struct drm_sched_job *sched_job); 231 232 /** 233 * @timedout_job: Called when a job has taken too long to execute, 234 * to trigger GPU recovery. 235 */ 236 void (*timedout_job)(struct drm_sched_job *sched_job); 237 238 /** 239 * @free_job: Called once the job's finished fence has been signaled 240 * and it's time to clean it up. 241 */ 242 void (*free_job)(struct drm_sched_job *sched_job); 243 }; 244 245 /** 246 * struct drm_gpu_scheduler 247 * 248 * @ops: backend operations provided by the driver. 249 * @hw_submission_limit: the max size of the hardware queue. 250 * @timeout: the time after which a job is removed from the scheduler. 251 * @name: name of the ring for which this scheduler is being used. 252 * @sched_rq: priority wise array of run queues. 253 * @wake_up_worker: the wait queue on which the scheduler sleeps until a job 254 * is ready to be scheduled. 255 * @job_scheduled: once @drm_sched_entity_do_release is called the scheduler 256 * waits on this wait queue until all the scheduled jobs are 257 * finished. 258 * @hw_rq_count: the number of jobs currently in the hardware queue. 259 * @job_id_count: used to assign unique id to the each job. 260 * @thread: the kthread on which the scheduler which run. 261 * @ring_mirror_list: the list of jobs which are currently in the job queue. 262 * @job_list_lock: lock to protect the ring_mirror_list. 263 * @hang_limit: once the hangs by a job crosses this limit then it is marked 264 * guilty and it will be considered for scheduling further. 265 * @num_jobs: the number of jobs in queue in the scheduler 266 * 267 * One scheduler is implemented for each hardware ring. 268 */ 269 struct drm_gpu_scheduler { 270 const struct drm_sched_backend_ops *ops; 271 uint32_t hw_submission_limit; 272 long timeout; 273 const char *name; 274 struct drm_sched_rq sched_rq[DRM_SCHED_PRIORITY_MAX]; 275 wait_queue_head_t wake_up_worker; 276 wait_queue_head_t job_scheduled; 277 atomic_t hw_rq_count; 278 atomic64_t job_id_count; 279 struct task_struct *thread; 280 struct list_head ring_mirror_list; 281 spinlock_t job_list_lock; 282 int hang_limit; 283 atomic_t num_jobs; 284 }; 285 286 int drm_sched_init(struct drm_gpu_scheduler *sched, 287 const struct drm_sched_backend_ops *ops, 288 uint32_t hw_submission, unsigned hang_limit, long timeout, 289 const char *name); 290 void drm_sched_fini(struct drm_gpu_scheduler *sched); 291 292 int drm_sched_entity_init(struct drm_sched_entity *entity, 293 struct drm_sched_rq **rq_list, 294 unsigned int num_rq_list, 295 atomic_t *guilty); 296 long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout); 297 void drm_sched_entity_fini(struct drm_sched_entity *entity); 298 void drm_sched_entity_destroy(struct drm_sched_entity *entity); 299 void drm_sched_entity_push_job(struct drm_sched_job *sched_job, 300 struct drm_sched_entity *entity); 301 void drm_sched_entity_set_priority(struct drm_sched_entity *entity, 302 enum drm_sched_priority priority); 303 struct drm_sched_fence *drm_sched_fence_create( 304 struct drm_sched_entity *s_entity, void *owner); 305 void drm_sched_fence_scheduled(struct drm_sched_fence *fence); 306 void drm_sched_fence_finished(struct drm_sched_fence *fence); 307 int drm_sched_job_init(struct drm_sched_job *job, 308 struct drm_sched_entity *entity, 309 void *owner); 310 void drm_sched_hw_job_reset(struct drm_gpu_scheduler *sched, 311 struct drm_sched_job *job); 312 void drm_sched_job_recovery(struct drm_gpu_scheduler *sched); 313 bool drm_sched_dependency_optimized(struct dma_fence* fence, 314 struct drm_sched_entity *entity); 315 void drm_sched_job_kickout(struct drm_sched_job *s_job); 316 317 #endif 318