1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef _DRM_GPU_SCHEDULER_H_ 25 #define _DRM_GPU_SCHEDULER_H_ 26 27 #include <drm/spsc_queue.h> 28 #include <linux/average.h> 29 #include <linux/dma-fence.h> 30 #include <linux/completion.h> 31 #include <linux/xarray.h> 32 #include <linux/workqueue.h> 33 34 DECLARE_EWMA(drm_sched_avgtime, 6, 4); 35 36 #define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000) 37 38 /** 39 * DRM_SCHED_FENCE_DONT_PIPELINE - Prevent dependency pipelining 40 * 41 * Setting this flag on a scheduler fence prevents pipelining of jobs depending 42 * on this fence. In other words we always insert a full CPU round trip before 43 * dependent jobs are pushed to the hw queue. 44 */ 45 #define DRM_SCHED_FENCE_DONT_PIPELINE DMA_FENCE_FLAG_USER_BITS 46 47 /** 48 * DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT - A fence deadline hint has been set 49 * 50 * Because we could have a deadline hint can be set before the backing hw 51 * fence is created, we need to keep track of whether a deadline has already 52 * been set. 53 */ 54 #define DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT (DMA_FENCE_FLAG_USER_BITS + 1) 55 56 enum dma_resv_usage; 57 struct dma_resv; 58 struct drm_gem_object; 59 60 struct drm_gpu_scheduler; 61 struct drm_sched_rq; 62 63 struct drm_file; 64 65 /* These are often used as an (initial) index 66 * to an array, and as such should start at 0. 67 */ 68 enum drm_sched_priority { 69 DRM_SCHED_PRIORITY_INVALID = -1, /* Internal marker - do not use. */ 70 DRM_SCHED_PRIORITY_KERNEL, 71 DRM_SCHED_PRIORITY_HIGH, 72 DRM_SCHED_PRIORITY_NORMAL, 73 DRM_SCHED_PRIORITY_LOW, 74 75 DRM_SCHED_PRIORITY_COUNT 76 }; 77 78 struct drm_sched_entity_stats; 79 80 /** 81 * struct drm_sched_entity - A wrapper around a job queue (typically 82 * attached to the DRM file_priv). 83 * 84 * Entities will emit jobs in order to their corresponding hardware 85 * ring, and the scheduler will alternate between entities based on 86 * scheduling policy. 87 */ 88 struct drm_sched_entity { 89 /** 90 * @list: 91 * 92 * Used to append this struct to the list of entities in the runqueue 93 * @rq under &drm_sched_rq.entities. 94 * 95 * Protected by &drm_sched_rq.lock of @rq. 96 */ 97 struct list_head list; 98 99 /** 100 * @lock: 101 * 102 * Lock protecting the run-queue (@rq) to which this entity belongs, 103 * @priority and the list of schedulers (@sched_list, @num_sched_list). 104 */ 105 spinlock_t lock; 106 107 /** 108 * @rq: 109 * 110 * Runqueue on which this entity is currently scheduled. 111 * 112 * FIXME: Locking is very unclear for this. Writers are protected by 113 * @lock, but readers are generally lockless and seem to just race with 114 * not even a READ_ONCE. 115 */ 116 struct drm_sched_rq *rq; 117 118 /** 119 * @stats: Stats object reference held by the entity and jobs. 120 */ 121 struct drm_sched_entity_stats *stats; 122 123 /** 124 * @sched_list: 125 * 126 * A list of schedulers (struct drm_gpu_scheduler). Jobs from this entity can 127 * be scheduled on any scheduler on this list. 128 * 129 * This can be modified by calling drm_sched_entity_modify_sched(). 130 * Locking is entirely up to the driver, see the above function for more 131 * details. 132 * 133 * This will be set to NULL if &num_sched_list equals 1 and @rq has been 134 * set already. 135 * 136 * FIXME: This means priority changes through 137 * drm_sched_entity_set_priority() will be lost henceforth in this case. 138 */ 139 struct drm_gpu_scheduler **sched_list; 140 141 /** 142 * @num_sched_list: 143 * 144 * Number of drm_gpu_schedulers in the @sched_list. 145 */ 146 unsigned int num_sched_list; 147 148 /** 149 * @priority: 150 * 151 * Priority of the entity. This can be modified by calling 152 * drm_sched_entity_set_priority(). Protected by @lock. 153 */ 154 enum drm_sched_priority priority; 155 156 /** 157 * @job_queue: the list of jobs of this entity. 158 */ 159 struct spsc_queue job_queue; 160 161 /** 162 * @fence_seq: 163 * 164 * A linearly increasing seqno incremented with each new 165 * &drm_sched_fence which is part of the entity. 166 * 167 * FIXME: Callers of drm_sched_job_arm() need to ensure correct locking, 168 * this doesn't need to be atomic. 169 */ 170 atomic_t fence_seq; 171 172 /** 173 * @fence_context: 174 * 175 * A unique context for all the fences which belong to this entity. The 176 * &drm_sched_fence.scheduled uses the fence_context but 177 * &drm_sched_fence.finished uses fence_context + 1. 178 */ 179 uint64_t fence_context; 180 181 /** 182 * @dependency: 183 * 184 * The dependency fence of the job which is on the top of the job queue. 185 */ 186 struct dma_fence *dependency; 187 188 /** 189 * @cb: 190 * 191 * Callback for the dependency fence above. 192 */ 193 struct dma_fence_cb cb; 194 195 /** 196 * @guilty: 197 * 198 * Points to entities' guilty. 199 */ 200 atomic_t *guilty; 201 202 /** 203 * @last_scheduled: 204 * 205 * Points to the finished fence of the last scheduled job. Only written 206 * by drm_sched_entity_pop_job(). Can be accessed locklessly from 207 * drm_sched_job_arm() if the queue is empty. 208 */ 209 struct dma_fence __rcu *last_scheduled; 210 211 /** 212 * @last_user: last group leader pushing a job into the entity. 213 */ 214 struct task_struct *last_user; 215 216 /** 217 * @stopped: 218 * 219 * Marks the enity as removed from rq and destined for 220 * termination. This is set by calling drm_sched_entity_flush() and by 221 * drm_sched_fini(). 222 */ 223 bool stopped; 224 225 /** 226 * @entity_idle: 227 * 228 * Signals when entity is not in use, used to sequence entity cleanup in 229 * drm_sched_entity_fini(). 230 */ 231 struct completion entity_idle; 232 233 /** 234 * @oldest_job_waiting: 235 * 236 * Marks earliest job waiting in SW queue 237 */ 238 ktime_t oldest_job_waiting; 239 240 /** 241 * @rb_tree_node: 242 * 243 * The node used to insert this entity into time based priority queue 244 */ 245 struct rb_node rb_tree_node; 246 247 }; 248 249 /** 250 * struct drm_sched_rq - queue of entities to be scheduled. 251 * 252 * @lock: protects @entities, @rb_tree_root and @head_prio. 253 * @entities: list of the entities to be scheduled. 254 * @rb_tree_root: root of time based priority queue of entities for FIFO scheduling 255 * @head_prio: priority of the top tree element. 256 * 257 * Run queue is a set of entities scheduling command submissions for 258 * one specific ring. It implements the scheduling policy that selects 259 * the next entity to emit commands from. 260 */ 261 struct drm_sched_rq { 262 spinlock_t lock; 263 /* Following members are protected by the @lock: */ 264 struct list_head entities; 265 struct rb_root_cached rb_tree_root; 266 enum drm_sched_priority head_prio; 267 }; 268 269 /** 270 * struct drm_sched_fence - fences corresponding to the scheduling of a job. 271 */ 272 struct drm_sched_fence { 273 /** 274 * @scheduled: this fence is what will be signaled by the scheduler 275 * when the job is scheduled. 276 */ 277 struct dma_fence scheduled; 278 279 /** 280 * @finished: this fence is what will be signaled by the scheduler 281 * when the job is completed. 282 * 283 * When setting up an out fence for the job, you should use 284 * this, since it's available immediately upon 285 * drm_sched_job_init(), and the fence returned by the driver 286 * from run_job() won't be created until the dependencies have 287 * resolved. 288 */ 289 struct dma_fence finished; 290 291 /** 292 * @deadline: deadline set on &drm_sched_fence.finished which 293 * potentially needs to be propagated to &drm_sched_fence.parent 294 */ 295 ktime_t deadline; 296 297 /** 298 * @parent: the fence returned by &drm_sched_backend_ops.run_job 299 * when scheduling the job on hardware. We signal the 300 * &drm_sched_fence.finished fence once parent is signalled. 301 */ 302 struct dma_fence *parent; 303 /** 304 * @sched: the scheduler instance to which the job having this struct 305 * belongs to. 306 */ 307 struct drm_gpu_scheduler *sched; 308 /** 309 * @lock: the lock used by the scheduled and the finished fences. 310 */ 311 spinlock_t lock; 312 /** 313 * @owner: job owner for debugging 314 */ 315 void *owner; 316 317 /** 318 * @drm_client_id: 319 * 320 * The client_id of the drm_file which owns the job. 321 */ 322 uint64_t drm_client_id; 323 }; 324 325 struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f); 326 327 /** 328 * struct drm_sched_job - A job to be run by an entity. 329 * 330 * @queue_node: used to append this struct to the queue of jobs in an entity. 331 * @list: a job participates in a "pending" and "done" lists. 332 * @sched: the scheduler instance on which this job is scheduled. 333 * @s_fence: contains the fences for the scheduling of job. 334 * @finish_cb: the callback for the finished fence. 335 * @credits: the number of credits this job contributes to the scheduler 336 * @work: Helper to reschedule job kill to different context. 337 * @karma: increment on every hang caused by this job. If this exceeds the hang 338 * limit of the scheduler then the job is marked guilty and will not 339 * be scheduled further. 340 * @s_priority: the priority of the job. 341 * @entity: the entity to which this job belongs. 342 * @cb: the callback for the parent fence in s_fence. 343 * 344 * A job is created by the driver using drm_sched_job_init(), and 345 * should call drm_sched_entity_push_job() once it wants the scheduler 346 * to schedule the job. 347 */ 348 struct drm_sched_job { 349 /** 350 * @sched: 351 * 352 * The scheduler this job is or will be scheduled on. Gets set by 353 * drm_sched_job_arm(). Valid until drm_sched_backend_ops.free_job() 354 * has finished. 355 */ 356 struct drm_gpu_scheduler *sched; 357 358 struct drm_sched_fence *s_fence; 359 struct drm_sched_entity *entity; 360 361 /** 362 * @entity_stats: Stats object reference held by the job and entity. 363 */ 364 struct drm_sched_entity_stats *entity_stats; 365 366 enum drm_sched_priority s_priority; 367 u32 credits; 368 /** @last_dependency: tracks @dependencies as they signal */ 369 unsigned int last_dependency; 370 atomic_t karma; 371 372 struct spsc_node queue_node; 373 struct list_head list; 374 375 /* 376 * work is used only after finish_cb has been used and will not be 377 * accessed anymore. 378 */ 379 union { 380 struct dma_fence_cb finish_cb; 381 struct work_struct work; 382 }; 383 384 struct dma_fence_cb cb; 385 386 /** 387 * @dependencies: 388 * 389 * Contains the dependencies as struct dma_fence for this job, see 390 * drm_sched_job_add_dependency() and 391 * drm_sched_job_add_implicit_dependencies(). 392 */ 393 struct xarray dependencies; 394 }; 395 396 /** 397 * enum drm_gpu_sched_stat - the scheduler's status 398 * 399 * @DRM_GPU_SCHED_STAT_NONE: Reserved. Do not use. 400 * @DRM_GPU_SCHED_STAT_RESET: The GPU hung and successfully reset. 401 * @DRM_GPU_SCHED_STAT_ENODEV: Error: Device is not available anymore. 402 * @DRM_GPU_SCHED_STAT_NO_HANG: Contrary to scheduler's assumption, the GPU 403 * did not hang and is still running. 404 */ 405 enum drm_gpu_sched_stat { 406 DRM_GPU_SCHED_STAT_NONE, 407 DRM_GPU_SCHED_STAT_RESET, 408 DRM_GPU_SCHED_STAT_ENODEV, 409 DRM_GPU_SCHED_STAT_NO_HANG, 410 }; 411 412 /** 413 * struct drm_sched_backend_ops - Define the backend operations 414 * called by the scheduler 415 * 416 * These functions should be implemented in the driver side. 417 */ 418 struct drm_sched_backend_ops { 419 /** 420 * @prepare_job: 421 * 422 * Called when the scheduler is considering scheduling this job next, to 423 * get another struct dma_fence for this job to block on. Once it 424 * returns NULL, run_job() may be called. 425 * 426 * Can be NULL if no additional preparation to the dependencies are 427 * necessary. Skipped when jobs are killed instead of run. 428 */ 429 struct dma_fence *(*prepare_job)(struct drm_sched_job *sched_job, 430 struct drm_sched_entity *s_entity); 431 432 /** 433 * @run_job: Called to execute the job once all of the dependencies 434 * have been resolved. 435 * 436 * @sched_job: the job to run 437 * 438 * The deprecated drm_sched_resubmit_jobs() (called by &struct 439 * drm_sched_backend_ops.timedout_job) can invoke this again with the 440 * same parameters. Using this is discouraged because it violates 441 * dma_fence rules, notably dma_fence_init() has to be called on 442 * already initialized fences for a second time. Moreover, this is 443 * dangerous because attempts to allocate memory might deadlock with 444 * memory management code waiting for the reset to complete. 445 * 446 * TODO: Document what drivers should do / use instead. 447 * 448 * This method is called in a workqueue context - either from the 449 * submit_wq the driver passed through drm_sched_init(), or, if the 450 * driver passed NULL, a separate, ordered workqueue the scheduler 451 * allocated. 452 * 453 * Note that the scheduler expects to 'inherit' its own reference to 454 * this fence from the callback. It does not invoke an extra 455 * dma_fence_get() on it. Consequently, this callback must take a 456 * reference for the scheduler, and additional ones for the driver's 457 * respective needs. 458 * 459 * Return: 460 * * On success: dma_fence the driver must signal once the hardware has 461 * completed the job ("hardware fence"). 462 * * On failure: NULL or an ERR_PTR. 463 */ 464 struct dma_fence *(*run_job)(struct drm_sched_job *sched_job); 465 466 /** 467 * @timedout_job: Called when a job has taken too long to execute, 468 * to trigger GPU recovery. 469 * 470 * @sched_job: The job that has timed out 471 * 472 * Drivers typically issue a reset to recover from GPU hangs. 473 * This procedure looks very different depending on whether a firmware 474 * or a hardware scheduler is being used. 475 * 476 * For a FIRMWARE SCHEDULER, each ring has one scheduler, and each 477 * scheduler has one entity. Hence, the steps taken typically look as 478 * follows: 479 * 480 * 1. Stop the scheduler using drm_sched_stop(). This will pause the 481 * scheduler workqueues and cancel the timeout work, guaranteeing 482 * that nothing is queued while the ring is being removed. 483 * 2. Remove the ring. The firmware will make sure that the 484 * corresponding parts of the hardware are resetted, and that other 485 * rings are not impacted. 486 * 3. Kill the entity and the associated scheduler. 487 * 488 * 489 * For a HARDWARE SCHEDULER, a scheduler instance schedules jobs from 490 * one or more entities to one ring. This implies that all entities 491 * associated with the affected scheduler cannot be torn down, because 492 * this would effectively also affect innocent userspace processes which 493 * did not submit faulty jobs (for example). 494 * 495 * Consequently, the procedure to recover with a hardware scheduler 496 * should look like this: 497 * 498 * 1. Stop all schedulers impacted by the reset using drm_sched_stop(). 499 * 2. Kill the entity the faulty job stems from. 500 * 3. Issue a GPU reset on all faulty rings (driver-specific). 501 * 4. Re-submit jobs on all schedulers impacted by re-submitting them to 502 * the entities which are still alive. 503 * 5. Restart all schedulers that were stopped in step #1 using 504 * drm_sched_start(). 505 * 506 * Note that some GPUs have distinct hardware queues but need to reset 507 * the GPU globally, which requires extra synchronization between the 508 * timeout handlers of different schedulers. One way to achieve this 509 * synchronization is to create an ordered workqueue (using 510 * alloc_ordered_workqueue()) at the driver level, and pass this queue 511 * as drm_sched_init()'s @timeout_wq parameter. This will guarantee 512 * that timeout handlers are executed sequentially. 513 * 514 * Return: The scheduler's status, defined by &enum drm_gpu_sched_stat 515 * 516 */ 517 enum drm_gpu_sched_stat (*timedout_job)(struct drm_sched_job *sched_job); 518 519 /** 520 * @free_job: Called once the job's finished fence has been signaled 521 * and it's time to clean it up. 522 */ 523 void (*free_job)(struct drm_sched_job *sched_job); 524 525 /** 526 * @cancel_job: Used by the scheduler to guarantee remaining jobs' fences 527 * get signaled in drm_sched_fini(). 528 * 529 * Used by the scheduler to cancel all jobs that have not been executed 530 * with &struct drm_sched_backend_ops.run_job by the time 531 * drm_sched_fini() gets invoked. 532 * 533 * Drivers need to signal the passed job's hardware fence with an 534 * appropriate error code (e.g., -ECANCELED) in this callback. They 535 * must not free the job. 536 * 537 * The scheduler will only call this callback once it stopped calling 538 * all other callbacks forever, with the exception of &struct 539 * drm_sched_backend_ops.free_job. 540 */ 541 void (*cancel_job)(struct drm_sched_job *sched_job); 542 }; 543 544 /** 545 * struct drm_gpu_scheduler - scheduler instance-specific data 546 * 547 * @ops: backend operations provided by the driver. 548 * @credit_limit: the credit limit of this scheduler 549 * @credit_count: the current credit count of this scheduler 550 * @timeout: the time after which a job is removed from the scheduler. 551 * @name: name of the ring for which this scheduler is being used. 552 * @rq: Scheduler run queue. 553 * @job_scheduled: once drm_sched_entity_flush() is called the scheduler 554 * waits on this wait queue until all the scheduled jobs are 555 * finished. 556 * @job_id_count: used to assign unique id to the each job. 557 * @submit_wq: workqueue used to queue @work_run_job and @work_free_job 558 * @timeout_wq: workqueue used to queue @work_tdr 559 * @avg_job_us: Average job duration. 560 * @work_run_job: work which calls run_job op of each scheduler. 561 * @work_free_job: work which calls free_job op of each scheduler. 562 * @work_tdr: schedules a delayed call to @drm_sched_job_timedout after the 563 * timeout interval is over. 564 * @pending_list: the list of jobs which are currently in the job queue. 565 * @job_list_lock: lock to protect the pending_list. 566 * @hang_limit: once the hangs by a job crosses this limit then it is marked 567 * guilty and it will no longer be considered for scheduling. 568 * @score: score to help loadbalancer pick a idle sched 569 * @_score: score used when the driver doesn't provide one 570 * @ready: marks if the underlying HW is ready to work 571 * @free_guilty: A hit to time out handler to free the guilty job. 572 * @pause_submit: pause queuing of @work_run_job on @submit_wq 573 * @own_submit_wq: scheduler owns allocation of @submit_wq 574 * @dev: system &struct device 575 * 576 * One scheduler is implemented for each hardware ring. 577 */ 578 struct drm_gpu_scheduler { 579 const struct drm_sched_backend_ops *ops; 580 u32 credit_limit; 581 atomic_t credit_count; 582 long timeout; 583 const char *name; 584 struct drm_sched_rq rq; 585 wait_queue_head_t job_scheduled; 586 atomic64_t job_id_count; 587 struct workqueue_struct *submit_wq; 588 struct workqueue_struct *timeout_wq; 589 struct ewma_drm_sched_avgtime avg_job_us; 590 struct work_struct work_run_job; 591 struct work_struct work_free_job; 592 struct delayed_work work_tdr; 593 struct list_head pending_list; 594 spinlock_t job_list_lock; 595 int hang_limit; 596 atomic_t *score; 597 atomic_t _score; 598 bool ready; 599 bool free_guilty; 600 bool pause_submit; 601 bool own_submit_wq; 602 struct device *dev; 603 }; 604 605 /** 606 * struct drm_sched_init_args - parameters for initializing a DRM GPU scheduler 607 * 608 * @ops: backend operations provided by the driver 609 * @submit_wq: workqueue to use for submission. If NULL, an ordered wq is 610 * allocated and used. 611 * @credit_limit: the number of credits this scheduler can hold from all jobs 612 * @hang_limit: number of times to allow a job to hang before dropping it. 613 * This mechanism is DEPRECATED. Set it to 0. 614 * @timeout: timeout value in jiffies for submitted jobs. 615 * @timeout_wq: workqueue to use for timeout work. If NULL, the system_wq is used. 616 * @score: score atomic shared with other schedulers. May be NULL. 617 * @name: name (typically the driver's name). Used for debugging 618 * @dev: associated device. Used for debugging 619 */ 620 struct drm_sched_init_args { 621 const struct drm_sched_backend_ops *ops; 622 struct workqueue_struct *submit_wq; 623 struct workqueue_struct *timeout_wq; 624 u32 credit_limit; 625 unsigned int hang_limit; 626 long timeout; 627 atomic_t *score; 628 const char *name; 629 struct device *dev; 630 }; 631 632 /* Scheduler operations */ 633 634 int drm_sched_init(struct drm_gpu_scheduler *sched, 635 const struct drm_sched_init_args *args); 636 637 void drm_sched_fini(struct drm_gpu_scheduler *sched); 638 639 unsigned long drm_sched_suspend_timeout(struct drm_gpu_scheduler *sched); 640 void drm_sched_resume_timeout(struct drm_gpu_scheduler *sched, 641 unsigned long remaining); 642 void drm_sched_tdr_queue_imm(struct drm_gpu_scheduler *sched); 643 bool drm_sched_wqueue_ready(struct drm_gpu_scheduler *sched); 644 void drm_sched_wqueue_stop(struct drm_gpu_scheduler *sched); 645 void drm_sched_wqueue_start(struct drm_gpu_scheduler *sched); 646 void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad); 647 void drm_sched_start(struct drm_gpu_scheduler *sched, int errno); 648 void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched); 649 void drm_sched_fault(struct drm_gpu_scheduler *sched); 650 bool drm_sched_is_stopped(struct drm_gpu_scheduler *sched); 651 652 struct drm_gpu_scheduler * 653 drm_sched_pick_best(struct drm_gpu_scheduler **sched_list, 654 unsigned int num_sched_list); 655 656 /* Jobs */ 657 658 int drm_sched_job_init(struct drm_sched_job *job, 659 struct drm_sched_entity *entity, 660 u32 credits, void *owner, 661 u64 drm_client_id); 662 void drm_sched_job_arm(struct drm_sched_job *job); 663 void drm_sched_entity_push_job(struct drm_sched_job *sched_job); 664 int drm_sched_job_add_dependency(struct drm_sched_job *job, 665 struct dma_fence *fence); 666 int drm_sched_job_add_syncobj_dependency(struct drm_sched_job *job, 667 struct drm_file *file, 668 u32 handle, 669 u32 point); 670 int drm_sched_job_add_resv_dependencies(struct drm_sched_job *job, 671 struct dma_resv *resv, 672 enum dma_resv_usage usage); 673 int drm_sched_job_add_implicit_dependencies(struct drm_sched_job *job, 674 struct drm_gem_object *obj, 675 bool write); 676 bool drm_sched_job_has_dependency(struct drm_sched_job *job, 677 struct dma_fence *fence); 678 void drm_sched_job_cleanup(struct drm_sched_job *job); 679 void drm_sched_increase_karma(struct drm_sched_job *bad); 680 bool drm_sched_job_is_signaled(struct drm_sched_job *job); 681 682 static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job, 683 int threshold) 684 { 685 return s_job && atomic_inc_return(&s_job->karma) > threshold; 686 } 687 688 /* Entities */ 689 690 int drm_sched_entity_init(struct drm_sched_entity *entity, 691 enum drm_sched_priority priority, 692 struct drm_gpu_scheduler **sched_list, 693 unsigned int num_sched_list, 694 atomic_t *guilty); 695 long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout); 696 void drm_sched_entity_kill(struct drm_sched_entity *entity); 697 void drm_sched_entity_fini(struct drm_sched_entity *entity); 698 void drm_sched_entity_destroy(struct drm_sched_entity *entity); 699 void drm_sched_entity_set_priority(struct drm_sched_entity *entity, 700 enum drm_sched_priority priority); 701 int drm_sched_entity_error(struct drm_sched_entity *entity); 702 void drm_sched_entity_modify_sched(struct drm_sched_entity *entity, 703 struct drm_gpu_scheduler **sched_list, 704 unsigned int num_sched_list); 705 706 /** 707 * struct drm_sched_pending_job_iter - DRM scheduler pending job iterator state 708 * @sched: DRM scheduler associated with pending job iterator 709 */ 710 struct drm_sched_pending_job_iter { 711 struct drm_gpu_scheduler *sched; 712 }; 713 714 /* Drivers should never call this directly */ 715 static inline struct drm_sched_pending_job_iter 716 __drm_sched_pending_job_iter_begin(struct drm_gpu_scheduler *sched) 717 { 718 struct drm_sched_pending_job_iter iter = { 719 .sched = sched, 720 }; 721 722 WARN_ON(!drm_sched_is_stopped(sched)); 723 return iter; 724 } 725 726 /* Drivers should never call this directly */ 727 static inline void 728 __drm_sched_pending_job_iter_end(const struct drm_sched_pending_job_iter iter) 729 { 730 WARN_ON(!drm_sched_is_stopped(iter.sched)); 731 } 732 733 DEFINE_CLASS(drm_sched_pending_job_iter, struct drm_sched_pending_job_iter, 734 __drm_sched_pending_job_iter_end(_T), 735 __drm_sched_pending_job_iter_begin(__sched), 736 struct drm_gpu_scheduler *__sched); 737 static inline void * 738 class_drm_sched_pending_job_iter_lock_ptr(class_drm_sched_pending_job_iter_t *_T) 739 { return _T; } 740 #define class_drm_sched_pending_job_iter_is_conditional false 741 742 /** 743 * drm_sched_for_each_pending_job() - Iterator for each pending job in scheduler 744 * @__job: Current pending job being iterated over 745 * @__sched: DRM scheduler to iterate over pending jobs 746 * @__entity: DRM scheduler entity to filter jobs, NULL indicates no filter 747 * 748 * Iterator for each pending job in scheduler, filtering on an entity, and 749 * enforcing scheduler is fully stopped 750 */ 751 #define drm_sched_for_each_pending_job(__job, __sched, __entity) \ 752 scoped_guard(drm_sched_pending_job_iter, (__sched)) \ 753 list_for_each_entry((__job), &(__sched)->pending_list, list) \ 754 for_each_if(!(__entity) || (__job)->entity == (__entity)) 755 756 #endif 757