1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef _DRM_GPU_SCHEDULER_H_ 25 #define _DRM_GPU_SCHEDULER_H_ 26 27 #include <drm/spsc_queue.h> 28 #include <linux/average.h> 29 #include <linux/dma-fence.h> 30 #include <linux/completion.h> 31 #include <linux/xarray.h> 32 #include <linux/workqueue.h> 33 34 DECLARE_EWMA(drm_sched_avgtime, 6, 4); 35 36 #define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000) 37 38 /** 39 * DRM_SCHED_FENCE_DONT_PIPELINE - Prevent dependency pipelining 40 * 41 * Setting this flag on a scheduler fence prevents pipelining of jobs depending 42 * on this fence. In other words we always insert a full CPU round trip before 43 * dependent jobs are pushed to the hw queue. 44 */ 45 #define DRM_SCHED_FENCE_DONT_PIPELINE DMA_FENCE_FLAG_USER_BITS 46 47 /** 48 * DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT - A fence deadline hint has been set 49 * 50 * Because we could have a deadline hint can be set before the backing hw 51 * fence is created, we need to keep track of whether a deadline has already 52 * been set. 53 */ 54 #define DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT (DMA_FENCE_FLAG_USER_BITS + 1) 55 56 enum dma_resv_usage; 57 struct dma_resv; 58 struct drm_gem_object; 59 60 struct drm_gpu_scheduler; 61 struct drm_sched_rq; 62 63 struct drm_file; 64 65 /* These are often used as an (initial) index 66 * to an array, and as such should start at 0. 67 */ 68 enum drm_sched_priority { 69 DRM_SCHED_PRIORITY_INVALID = -1, /* Internal marker - do not use. */ 70 DRM_SCHED_PRIORITY_KERNEL, 71 DRM_SCHED_PRIORITY_HIGH, 72 DRM_SCHED_PRIORITY_NORMAL, 73 DRM_SCHED_PRIORITY_LOW, 74 75 DRM_SCHED_PRIORITY_COUNT 76 }; 77 78 struct drm_sched_entity_stats; 79 80 /** 81 * struct drm_sched_entity - A wrapper around a job queue (typically 82 * attached to the DRM file_priv). 83 * 84 * Entities will emit jobs in order to their corresponding hardware 85 * ring, and the scheduler will alternate between entities based on 86 * scheduling policy. 87 */ 88 struct drm_sched_entity { 89 /** 90 * @list: 91 * 92 * Used to append this struct to the list of entities in the runqueue 93 * @rq under &drm_sched_rq.entities. 94 * 95 * Protected by &drm_sched_rq.lock of @rq. 96 */ 97 struct list_head list; 98 99 /** 100 * @lock: 101 * 102 * Lock protecting the run-queue (@rq) to which this entity belongs, 103 * @priority and the list of schedulers (@sched_list, @num_sched_list). 104 */ 105 spinlock_t lock; 106 107 /** 108 * @rq: 109 * 110 * Runqueue on which this entity is currently scheduled. 111 * 112 * FIXME: Locking is very unclear for this. Writers are protected by 113 * @lock, but readers are generally lockless and seem to just race with 114 * not even a READ_ONCE. 115 */ 116 struct drm_sched_rq *rq; 117 118 /** 119 * @stats: Stats object reference held by the entity and jobs. 120 */ 121 struct drm_sched_entity_stats *stats; 122 123 /** 124 * @sched_list: 125 * 126 * A list of schedulers (struct drm_gpu_scheduler). Jobs from this entity can 127 * be scheduled on any scheduler on this list. 128 * 129 * This can be modified by calling drm_sched_entity_modify_sched(). 130 * Locking is entirely up to the driver, see the above function for more 131 * details. 132 * 133 * This will be set to NULL if &num_sched_list equals 1 and @rq has been 134 * set already. 135 * 136 * FIXME: This means priority changes through 137 * drm_sched_entity_set_priority() will be lost henceforth in this case. 138 */ 139 struct drm_gpu_scheduler **sched_list; 140 141 /** 142 * @num_sched_list: 143 * 144 * Number of drm_gpu_schedulers in the @sched_list. 145 */ 146 unsigned int num_sched_list; 147 148 /** 149 * @priority: 150 * 151 * Priority of the entity. This can be modified by calling 152 * drm_sched_entity_set_priority(). Protected by @lock. 153 */ 154 enum drm_sched_priority priority; 155 156 /** 157 * @job_queue: the list of jobs of this entity. 158 */ 159 struct spsc_queue job_queue; 160 161 /** 162 * @fence_seq: 163 * 164 * A linearly increasing seqno incremented with each new 165 * &drm_sched_fence which is part of the entity. 166 * 167 * FIXME: Callers of drm_sched_job_arm() need to ensure correct locking, 168 * this doesn't need to be atomic. 169 */ 170 atomic_t fence_seq; 171 172 /** 173 * @fence_context: 174 * 175 * A unique context for all the fences which belong to this entity. The 176 * &drm_sched_fence.scheduled uses the fence_context but 177 * &drm_sched_fence.finished uses fence_context + 1. 178 */ 179 uint64_t fence_context; 180 181 /** 182 * @dependency: 183 * 184 * The dependency fence of the job which is on the top of the job queue. 185 */ 186 struct dma_fence *dependency; 187 188 /** 189 * @cb: 190 * 191 * Callback for the dependency fence above. 192 */ 193 struct dma_fence_cb cb; 194 195 /** 196 * @guilty: 197 * 198 * Points to entities' guilty. 199 */ 200 atomic_t *guilty; 201 202 /** 203 * @last_scheduled: 204 * 205 * Points to the finished fence of the last scheduled job. Only written 206 * by drm_sched_entity_pop_job(). Can be accessed locklessly from 207 * drm_sched_job_arm() if the queue is empty. 208 */ 209 struct dma_fence __rcu *last_scheduled; 210 211 /** 212 * @last_user: last group leader pushing a job into the entity. 213 */ 214 struct task_struct *last_user; 215 216 /** 217 * @stopped: 218 * 219 * Marks the enity as removed from rq and destined for 220 * termination. This is set by calling drm_sched_entity_flush(). 221 */ 222 bool stopped; 223 224 /** 225 * @entity_idle: 226 * 227 * Signals when entity is not in use, used to sequence entity cleanup in 228 * drm_sched_entity_fini(). 229 */ 230 struct completion entity_idle; 231 232 /** 233 * @oldest_job_waiting: 234 * 235 * Marks earliest job waiting in SW queue 236 */ 237 ktime_t oldest_job_waiting; 238 239 /** 240 * @rb_tree_node: 241 * 242 * The node used to insert this entity into time based priority queue 243 */ 244 struct rb_node rb_tree_node; 245 246 }; 247 248 /** 249 * struct drm_sched_rq - queue of entities to be scheduled. 250 * 251 * @lock: protects @entities, @rb_tree_root and @head_prio. 252 * @entities: list of the entities to be scheduled. 253 * @rb_tree_root: root of time based priority queue of entities for FIFO scheduling 254 * @head_prio: priority of the top tree element. 255 * 256 * Run queue is a set of entities scheduling command submissions for 257 * one specific ring. It implements the scheduling policy that selects 258 * the next entity to emit commands from. 259 */ 260 struct drm_sched_rq { 261 spinlock_t lock; 262 /* Following members are protected by the @lock: */ 263 struct list_head entities; 264 struct rb_root_cached rb_tree_root; 265 enum drm_sched_priority head_prio; 266 }; 267 268 /** 269 * struct drm_sched_fence - fences corresponding to the scheduling of a job. 270 */ 271 struct drm_sched_fence { 272 /** 273 * @scheduled: this fence is what will be signaled by the scheduler 274 * when the job is scheduled. 275 */ 276 struct dma_fence scheduled; 277 278 /** 279 * @finished: this fence is what will be signaled by the scheduler 280 * when the job is completed. 281 * 282 * When setting up an out fence for the job, you should use 283 * this, since it's available immediately upon 284 * drm_sched_job_init(), and the fence returned by the driver 285 * from run_job() won't be created until the dependencies have 286 * resolved. 287 */ 288 struct dma_fence finished; 289 290 /** 291 * @deadline: deadline set on &drm_sched_fence.finished which 292 * potentially needs to be propagated to &drm_sched_fence.parent 293 */ 294 ktime_t deadline; 295 296 /** 297 * @parent: the fence returned by &drm_sched_backend_ops.run_job 298 * when scheduling the job on hardware. We signal the 299 * &drm_sched_fence.finished fence once parent is signalled. 300 */ 301 struct dma_fence *parent; 302 /** 303 * @sched: the scheduler instance to which the job having this struct 304 * belongs to. 305 */ 306 struct drm_gpu_scheduler *sched; 307 /** 308 * @lock: the lock used by the scheduled and the finished fences. 309 */ 310 spinlock_t lock; 311 /** 312 * @owner: job owner for debugging 313 */ 314 void *owner; 315 316 /** 317 * @drm_client_id: 318 * 319 * The client_id of the drm_file which owns the job. 320 */ 321 uint64_t drm_client_id; 322 }; 323 324 struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f); 325 326 /** 327 * struct drm_sched_job - A job to be run by an entity. 328 * 329 * @queue_node: used to append this struct to the queue of jobs in an entity. 330 * @list: a job participates in a "pending" and "done" lists. 331 * @sched: the scheduler instance on which this job is scheduled. 332 * @s_fence: contains the fences for the scheduling of job. 333 * @finish_cb: the callback for the finished fence. 334 * @credits: the number of credits this job contributes to the scheduler 335 * @work: Helper to reschedule job kill to different context. 336 * @karma: increment on every hang caused by this job. If this exceeds the hang 337 * limit of the scheduler then the job is marked guilty and will not 338 * be scheduled further. 339 * @s_priority: the priority of the job. 340 * @entity: the entity to which this job belongs. 341 * @cb: the callback for the parent fence in s_fence. 342 * 343 * A job is created by the driver using drm_sched_job_init(), and 344 * should call drm_sched_entity_push_job() once it wants the scheduler 345 * to schedule the job. 346 */ 347 struct drm_sched_job { 348 /** 349 * @sched: 350 * 351 * The scheduler this job is or will be scheduled on. Gets set by 352 * drm_sched_job_arm(). Valid until drm_sched_backend_ops.free_job() 353 * has finished. 354 */ 355 struct drm_gpu_scheduler *sched; 356 357 struct drm_sched_fence *s_fence; 358 struct drm_sched_entity *entity; 359 360 /** 361 * @entity_stats: Stats object reference held by the job and entity. 362 */ 363 struct drm_sched_entity_stats *entity_stats; 364 365 enum drm_sched_priority s_priority; 366 u32 credits; 367 /** @last_dependency: tracks @dependencies as they signal */ 368 unsigned int last_dependency; 369 atomic_t karma; 370 371 struct spsc_node queue_node; 372 struct list_head list; 373 374 /* 375 * work is used only after finish_cb has been used and will not be 376 * accessed anymore. 377 */ 378 union { 379 struct dma_fence_cb finish_cb; 380 struct work_struct work; 381 }; 382 383 struct dma_fence_cb cb; 384 385 /** 386 * @dependencies: 387 * 388 * Contains the dependencies as struct dma_fence for this job, see 389 * drm_sched_job_add_dependency() and 390 * drm_sched_job_add_implicit_dependencies(). 391 */ 392 struct xarray dependencies; 393 }; 394 395 /** 396 * enum drm_gpu_sched_stat - the scheduler's status 397 * 398 * @DRM_GPU_SCHED_STAT_NONE: Reserved. Do not use. 399 * @DRM_GPU_SCHED_STAT_RESET: The GPU hung and successfully reset. 400 * @DRM_GPU_SCHED_STAT_ENODEV: Error: Device is not available anymore. 401 * @DRM_GPU_SCHED_STAT_NO_HANG: Contrary to scheduler's assumption, the GPU 402 * did not hang and is still running. 403 */ 404 enum drm_gpu_sched_stat { 405 DRM_GPU_SCHED_STAT_NONE, 406 DRM_GPU_SCHED_STAT_RESET, 407 DRM_GPU_SCHED_STAT_ENODEV, 408 DRM_GPU_SCHED_STAT_NO_HANG, 409 }; 410 411 /** 412 * struct drm_sched_backend_ops - Define the backend operations 413 * called by the scheduler 414 * 415 * These functions should be implemented in the driver side. 416 */ 417 struct drm_sched_backend_ops { 418 /** 419 * @prepare_job: 420 * 421 * Called when the scheduler is considering scheduling this job next, to 422 * get another struct dma_fence for this job to block on. Once it 423 * returns NULL, run_job() may be called. 424 * 425 * Can be NULL if no additional preparation to the dependencies are 426 * necessary. Skipped when jobs are killed instead of run. 427 */ 428 struct dma_fence *(*prepare_job)(struct drm_sched_job *sched_job, 429 struct drm_sched_entity *s_entity); 430 431 /** 432 * @run_job: Called to execute the job once all of the dependencies 433 * have been resolved. 434 * 435 * @sched_job: the job to run 436 * 437 * The deprecated drm_sched_resubmit_jobs() (called by &struct 438 * drm_sched_backend_ops.timedout_job) can invoke this again with the 439 * same parameters. Using this is discouraged because it violates 440 * dma_fence rules, notably dma_fence_init() has to be called on 441 * already initialized fences for a second time. Moreover, this is 442 * dangerous because attempts to allocate memory might deadlock with 443 * memory management code waiting for the reset to complete. 444 * 445 * TODO: Document what drivers should do / use instead. 446 * 447 * This method is called in a workqueue context - either from the 448 * submit_wq the driver passed through drm_sched_init(), or, if the 449 * driver passed NULL, a separate, ordered workqueue the scheduler 450 * allocated. 451 * 452 * Note that the scheduler expects to 'inherit' its own reference to 453 * this fence from the callback. It does not invoke an extra 454 * dma_fence_get() on it. Consequently, this callback must take a 455 * reference for the scheduler, and additional ones for the driver's 456 * respective needs. 457 * 458 * Return: 459 * * On success: dma_fence the driver must signal once the hardware has 460 * completed the job ("hardware fence"). 461 * * On failure: NULL or an ERR_PTR. 462 */ 463 struct dma_fence *(*run_job)(struct drm_sched_job *sched_job); 464 465 /** 466 * @timedout_job: Called when a job has taken too long to execute, 467 * to trigger GPU recovery. 468 * 469 * @sched_job: The job that has timed out 470 * 471 * Drivers typically issue a reset to recover from GPU hangs. 472 * This procedure looks very different depending on whether a firmware 473 * or a hardware scheduler is being used. 474 * 475 * For a FIRMWARE SCHEDULER, each ring has one scheduler, and each 476 * scheduler has one entity. Hence, the steps taken typically look as 477 * follows: 478 * 479 * 1. Stop the scheduler using drm_sched_stop(). This will pause the 480 * scheduler workqueues and cancel the timeout work, guaranteeing 481 * that nothing is queued while the ring is being removed. 482 * 2. Remove the ring. The firmware will make sure that the 483 * corresponding parts of the hardware are resetted, and that other 484 * rings are not impacted. 485 * 3. Kill the entity and the associated scheduler. 486 * 487 * 488 * For a HARDWARE SCHEDULER, a scheduler instance schedules jobs from 489 * one or more entities to one ring. This implies that all entities 490 * associated with the affected scheduler cannot be torn down, because 491 * this would effectively also affect innocent userspace processes which 492 * did not submit faulty jobs (for example). 493 * 494 * Consequently, the procedure to recover with a hardware scheduler 495 * should look like this: 496 * 497 * 1. Stop all schedulers impacted by the reset using drm_sched_stop(). 498 * 2. Kill the entity the faulty job stems from. 499 * 3. Issue a GPU reset on all faulty rings (driver-specific). 500 * 4. Re-submit jobs on all schedulers impacted by re-submitting them to 501 * the entities which are still alive. 502 * 5. Restart all schedulers that were stopped in step #1 using 503 * drm_sched_start(). 504 * 505 * Note that some GPUs have distinct hardware queues but need to reset 506 * the GPU globally, which requires extra synchronization between the 507 * timeout handlers of different schedulers. One way to achieve this 508 * synchronization is to create an ordered workqueue (using 509 * alloc_ordered_workqueue()) at the driver level, and pass this queue 510 * as drm_sched_init()'s @timeout_wq parameter. This will guarantee 511 * that timeout handlers are executed sequentially. 512 * 513 * Return: The scheduler's status, defined by &enum drm_gpu_sched_stat 514 * 515 */ 516 enum drm_gpu_sched_stat (*timedout_job)(struct drm_sched_job *sched_job); 517 518 /** 519 * @free_job: Called once the job's finished fence has been signaled 520 * and it's time to clean it up. 521 */ 522 void (*free_job)(struct drm_sched_job *sched_job); 523 524 /** 525 * @cancel_job: Used by the scheduler to guarantee remaining jobs' fences 526 * get signaled in drm_sched_fini(). 527 * 528 * Used by the scheduler to cancel all jobs that have not been executed 529 * with &struct drm_sched_backend_ops.run_job by the time 530 * drm_sched_fini() gets invoked. 531 * 532 * Drivers need to signal the passed job's hardware fence with an 533 * appropriate error code (e.g., -ECANCELED) in this callback. They 534 * must not free the job. 535 * 536 * The scheduler will only call this callback once it stopped calling 537 * all other callbacks forever, with the exception of &struct 538 * drm_sched_backend_ops.free_job. 539 */ 540 void (*cancel_job)(struct drm_sched_job *sched_job); 541 }; 542 543 /** 544 * struct drm_gpu_scheduler - scheduler instance-specific data 545 * 546 * @ops: backend operations provided by the driver. 547 * @credit_limit: the credit limit of this scheduler 548 * @credit_count: the current credit count of this scheduler 549 * @timeout: the time after which a job is removed from the scheduler. 550 * @name: name of the ring for which this scheduler is being used. 551 * @rq: Scheduler run queue. 552 * @job_scheduled: once drm_sched_entity_flush() is called the scheduler 553 * waits on this wait queue until all the scheduled jobs are 554 * finished. 555 * @job_id_count: used to assign unique id to the each job. 556 * @submit_wq: workqueue used to queue @work_run_job and @work_free_job 557 * @timeout_wq: workqueue used to queue @work_tdr 558 * @avg_job_us: Average job duration. 559 * @work_run_job: work which calls run_job op of each scheduler. 560 * @work_free_job: work which calls free_job op of each scheduler. 561 * @work_tdr: schedules a delayed call to @drm_sched_job_timedout after the 562 * timeout interval is over. 563 * @pending_list: the list of jobs which are currently in the job queue. 564 * @job_list_lock: lock to protect the pending_list. 565 * @hang_limit: once the hangs by a job crosses this limit then it is marked 566 * guilty and it will no longer be considered for scheduling. 567 * @score: score to help loadbalancer pick a idle sched 568 * @_score: score used when the driver doesn't provide one 569 * @ready: marks if the underlying HW is ready to work 570 * @free_guilty: A hit to time out handler to free the guilty job. 571 * @pause_submit: pause queuing of @work_run_job on @submit_wq 572 * @own_submit_wq: scheduler owns allocation of @submit_wq 573 * @dev: system &struct device 574 * 575 * One scheduler is implemented for each hardware ring. 576 */ 577 struct drm_gpu_scheduler { 578 const struct drm_sched_backend_ops *ops; 579 u32 credit_limit; 580 atomic_t credit_count; 581 long timeout; 582 const char *name; 583 struct drm_sched_rq rq; 584 wait_queue_head_t job_scheduled; 585 atomic64_t job_id_count; 586 struct workqueue_struct *submit_wq; 587 struct workqueue_struct *timeout_wq; 588 struct ewma_drm_sched_avgtime avg_job_us; 589 struct work_struct work_run_job; 590 struct work_struct work_free_job; 591 struct delayed_work work_tdr; 592 struct list_head pending_list; 593 spinlock_t job_list_lock; 594 int hang_limit; 595 atomic_t *score; 596 atomic_t _score; 597 bool ready; 598 bool free_guilty; 599 bool pause_submit; 600 bool own_submit_wq; 601 struct device *dev; 602 }; 603 604 /** 605 * struct drm_sched_init_args - parameters for initializing a DRM GPU scheduler 606 * 607 * @ops: backend operations provided by the driver 608 * @submit_wq: workqueue to use for submission. If NULL, an ordered wq is 609 * allocated and used. 610 * @credit_limit: the number of credits this scheduler can hold from all jobs 611 * @hang_limit: number of times to allow a job to hang before dropping it. 612 * This mechanism is DEPRECATED. Set it to 0. 613 * @timeout: timeout value in jiffies for submitted jobs. 614 * @timeout_wq: workqueue to use for timeout work. If NULL, the system_wq is used. 615 * @score: score atomic shared with other schedulers. May be NULL. 616 * @name: name (typically the driver's name). Used for debugging 617 * @dev: associated device. Used for debugging 618 */ 619 struct drm_sched_init_args { 620 const struct drm_sched_backend_ops *ops; 621 struct workqueue_struct *submit_wq; 622 struct workqueue_struct *timeout_wq; 623 u32 credit_limit; 624 unsigned int hang_limit; 625 long timeout; 626 atomic_t *score; 627 const char *name; 628 struct device *dev; 629 }; 630 631 /* Scheduler operations */ 632 633 int drm_sched_init(struct drm_gpu_scheduler *sched, 634 const struct drm_sched_init_args *args); 635 636 void drm_sched_fini(struct drm_gpu_scheduler *sched); 637 638 unsigned long drm_sched_suspend_timeout(struct drm_gpu_scheduler *sched); 639 void drm_sched_resume_timeout(struct drm_gpu_scheduler *sched, 640 unsigned long remaining); 641 void drm_sched_tdr_queue_imm(struct drm_gpu_scheduler *sched); 642 bool drm_sched_wqueue_ready(struct drm_gpu_scheduler *sched); 643 void drm_sched_wqueue_stop(struct drm_gpu_scheduler *sched); 644 void drm_sched_wqueue_start(struct drm_gpu_scheduler *sched); 645 void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad); 646 void drm_sched_start(struct drm_gpu_scheduler *sched, int errno); 647 void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched); 648 void drm_sched_fault(struct drm_gpu_scheduler *sched); 649 bool drm_sched_is_stopped(struct drm_gpu_scheduler *sched); 650 651 struct drm_gpu_scheduler * 652 drm_sched_pick_best(struct drm_gpu_scheduler **sched_list, 653 unsigned int num_sched_list); 654 655 /* Jobs */ 656 657 int drm_sched_job_init(struct drm_sched_job *job, 658 struct drm_sched_entity *entity, 659 u32 credits, void *owner, 660 u64 drm_client_id); 661 void drm_sched_job_arm(struct drm_sched_job *job); 662 void drm_sched_entity_push_job(struct drm_sched_job *sched_job); 663 int drm_sched_job_add_dependency(struct drm_sched_job *job, 664 struct dma_fence *fence); 665 int drm_sched_job_add_syncobj_dependency(struct drm_sched_job *job, 666 struct drm_file *file, 667 u32 handle, 668 u32 point); 669 int drm_sched_job_add_resv_dependencies(struct drm_sched_job *job, 670 struct dma_resv *resv, 671 enum dma_resv_usage usage); 672 int drm_sched_job_add_implicit_dependencies(struct drm_sched_job *job, 673 struct drm_gem_object *obj, 674 bool write); 675 bool drm_sched_job_has_dependency(struct drm_sched_job *job, 676 struct dma_fence *fence); 677 void drm_sched_job_cleanup(struct drm_sched_job *job); 678 void drm_sched_increase_karma(struct drm_sched_job *bad); 679 bool drm_sched_job_is_signaled(struct drm_sched_job *job); 680 681 static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job, 682 int threshold) 683 { 684 return s_job && atomic_inc_return(&s_job->karma) > threshold; 685 } 686 687 /* Entities */ 688 689 int drm_sched_entity_init(struct drm_sched_entity *entity, 690 enum drm_sched_priority priority, 691 struct drm_gpu_scheduler **sched_list, 692 unsigned int num_sched_list, 693 atomic_t *guilty); 694 long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout); 695 void drm_sched_entity_kill(struct drm_sched_entity *entity); 696 void drm_sched_entity_fini(struct drm_sched_entity *entity); 697 void drm_sched_entity_destroy(struct drm_sched_entity *entity); 698 void drm_sched_entity_set_priority(struct drm_sched_entity *entity, 699 enum drm_sched_priority priority); 700 int drm_sched_entity_error(struct drm_sched_entity *entity); 701 void drm_sched_entity_modify_sched(struct drm_sched_entity *entity, 702 struct drm_gpu_scheduler **sched_list, 703 unsigned int num_sched_list); 704 705 /** 706 * struct drm_sched_pending_job_iter - DRM scheduler pending job iterator state 707 * @sched: DRM scheduler associated with pending job iterator 708 */ 709 struct drm_sched_pending_job_iter { 710 struct drm_gpu_scheduler *sched; 711 }; 712 713 /* Drivers should never call this directly */ 714 static inline struct drm_sched_pending_job_iter 715 __drm_sched_pending_job_iter_begin(struct drm_gpu_scheduler *sched) 716 { 717 struct drm_sched_pending_job_iter iter = { 718 .sched = sched, 719 }; 720 721 WARN_ON(!drm_sched_is_stopped(sched)); 722 return iter; 723 } 724 725 /* Drivers should never call this directly */ 726 static inline void 727 __drm_sched_pending_job_iter_end(const struct drm_sched_pending_job_iter iter) 728 { 729 WARN_ON(!drm_sched_is_stopped(iter.sched)); 730 } 731 732 DEFINE_CLASS(drm_sched_pending_job_iter, struct drm_sched_pending_job_iter, 733 __drm_sched_pending_job_iter_end(_T), 734 __drm_sched_pending_job_iter_begin(__sched), 735 struct drm_gpu_scheduler *__sched); 736 static inline void * 737 class_drm_sched_pending_job_iter_lock_ptr(class_drm_sched_pending_job_iter_t *_T) 738 { return _T; } 739 #define class_drm_sched_pending_job_iter_is_conditional false 740 741 /** 742 * drm_sched_for_each_pending_job() - Iterator for each pending job in scheduler 743 * @__job: Current pending job being iterated over 744 * @__sched: DRM scheduler to iterate over pending jobs 745 * @__entity: DRM scheduler entity to filter jobs, NULL indicates no filter 746 * 747 * Iterator for each pending job in scheduler, filtering on an entity, and 748 * enforcing scheduler is fully stopped 749 */ 750 #define drm_sched_for_each_pending_job(__job, __sched, __entity) \ 751 scoped_guard(drm_sched_pending_job_iter, (__sched)) \ 752 list_for_each_entry((__job), &(__sched)->pending_list, list) \ 753 for_each_if(!(__entity) || (__job)->entity == (__entity)) 754 755 #endif 756