1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef _DRM_GPU_SCHEDULER_H_ 25 #define _DRM_GPU_SCHEDULER_H_ 26 27 #include <drm/spsc_queue.h> 28 #include <linux/average.h> 29 #include <linux/dma-fence.h> 30 #include <linux/completion.h> 31 #include <linux/xarray.h> 32 #include <linux/workqueue.h> 33 34 DECLARE_EWMA(drm_sched_avgtime, 6, 4); 35 36 #define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000) 37 38 /** 39 * DRM_SCHED_FENCE_DONT_PIPELINE - Prevent dependency pipelining 40 * 41 * Setting this flag on a scheduler fence prevents pipelining of jobs depending 42 * on this fence. In other words we always insert a full CPU round trip before 43 * dependent jobs are pushed to the hw queue. 44 */ 45 #define DRM_SCHED_FENCE_DONT_PIPELINE DMA_FENCE_FLAG_USER_BITS 46 47 /** 48 * DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT - A fence deadline hint has been set 49 * 50 * Because we could have a deadline hint can be set before the backing hw 51 * fence is created, we need to keep track of whether a deadline has already 52 * been set. 53 */ 54 #define DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT (DMA_FENCE_FLAG_USER_BITS + 1) 55 56 enum dma_resv_usage; 57 struct dma_resv; 58 struct drm_gem_object; 59 60 struct drm_gpu_scheduler; 61 struct drm_sched_rq; 62 63 struct drm_file; 64 65 /* These are often used as an (initial) index 66 * to an array, and as such should start at 0. 67 */ 68 enum drm_sched_priority { 69 DRM_SCHED_PRIORITY_INVALID = -1, /* Internal marker - do not use. */ 70 DRM_SCHED_PRIORITY_KERNEL, 71 DRM_SCHED_PRIORITY_HIGH, 72 DRM_SCHED_PRIORITY_NORMAL, 73 DRM_SCHED_PRIORITY_LOW, 74 75 DRM_SCHED_PRIORITY_COUNT 76 }; 77 78 struct drm_sched_entity_stats; 79 80 /** 81 * struct drm_sched_entity - A wrapper around a job queue (typically 82 * attached to the DRM file_priv). 83 * 84 * Entities will emit jobs in order to their corresponding hardware 85 * ring, and the scheduler will alternate between entities based on 86 * scheduling policy. 87 */ 88 struct drm_sched_entity { 89 /** 90 * @list: 91 * 92 * Used to append this struct to the list of entities in the runqueue 93 * @rq under &drm_sched_rq.entities. 94 * 95 * Protected by &drm_sched_rq.lock of @rq. 96 */ 97 struct list_head list; 98 99 /** 100 * @lock: 101 * 102 * Lock protecting the run-queue (@rq) to which this entity belongs, 103 * @priority, the list of schedulers (@sched_list, @num_sched_list) and 104 * the @rr_ts field. 105 */ 106 spinlock_t lock; 107 108 /** 109 * @rq: 110 * 111 * Runqueue on which this entity is currently scheduled. 112 * 113 * FIXME: Locking is very unclear for this. Writers are protected by 114 * @lock, but readers are generally lockless and seem to just race with 115 * not even a READ_ONCE. 116 */ 117 struct drm_sched_rq *rq; 118 119 /** 120 * @stats: Stats object reference held by the entity and jobs. 121 */ 122 struct drm_sched_entity_stats *stats; 123 124 /** 125 * @sched_list: 126 * 127 * A list of schedulers (struct drm_gpu_scheduler). Jobs from this entity can 128 * be scheduled on any scheduler on this list. 129 * 130 * This can be modified by calling drm_sched_entity_modify_sched(). 131 * Locking is entirely up to the driver, see the above function for more 132 * details. 133 * 134 * This will be set to NULL if &num_sched_list equals 1 and @rq has been 135 * set already. 136 * 137 * FIXME: This means priority changes through 138 * drm_sched_entity_set_priority() will be lost henceforth in this case. 139 */ 140 struct drm_gpu_scheduler **sched_list; 141 142 /** 143 * @num_sched_list: 144 * 145 * Number of drm_gpu_schedulers in the @sched_list. 146 */ 147 unsigned int num_sched_list; 148 149 /** 150 * @priority: 151 * 152 * Priority of the entity. This can be modified by calling 153 * drm_sched_entity_set_priority(). Protected by @lock. 154 */ 155 enum drm_sched_priority priority; 156 157 /** 158 * @rq_priority: Run-queue priority 159 */ 160 enum drm_sched_priority rq_priority; 161 162 /** 163 * @rr_ts: 164 * 165 * Fake timestamp of the last popped job from the entity. 166 */ 167 ktime_t rr_ts; 168 169 /** 170 * @job_queue: the list of jobs of this entity. 171 */ 172 struct spsc_queue job_queue; 173 174 /** 175 * @fence_seq: 176 * 177 * A linearly increasing seqno incremented with each new 178 * &drm_sched_fence which is part of the entity. 179 * 180 * FIXME: Callers of drm_sched_job_arm() need to ensure correct locking, 181 * this doesn't need to be atomic. 182 */ 183 atomic_t fence_seq; 184 185 /** 186 * @fence_context: 187 * 188 * A unique context for all the fences which belong to this entity. The 189 * &drm_sched_fence.scheduled uses the fence_context but 190 * &drm_sched_fence.finished uses fence_context + 1. 191 */ 192 uint64_t fence_context; 193 194 /** 195 * @dependency: 196 * 197 * The dependency fence of the job which is on the top of the job queue. 198 */ 199 struct dma_fence *dependency; 200 201 /** 202 * @cb: 203 * 204 * Callback for the dependency fence above. 205 */ 206 struct dma_fence_cb cb; 207 208 /** 209 * @guilty: 210 * 211 * Points to entities' guilty. 212 */ 213 atomic_t *guilty; 214 215 /** 216 * @last_scheduled: 217 * 218 * Points to the finished fence of the last scheduled job. Only written 219 * by drm_sched_entity_pop_job(). Can be accessed locklessly from 220 * drm_sched_job_arm() if the queue is empty. 221 */ 222 struct dma_fence __rcu *last_scheduled; 223 224 /** 225 * @last_user: last group leader pushing a job into the entity. 226 */ 227 struct task_struct *last_user; 228 229 /** 230 * @stopped: 231 * 232 * Marks the enity as removed from rq and destined for 233 * termination. This is set by calling drm_sched_entity_flush() and by 234 * drm_sched_fini(). 235 */ 236 bool stopped; 237 238 /** 239 * @entity_idle: 240 * 241 * Signals when entity is not in use, used to sequence entity cleanup in 242 * drm_sched_entity_fini(). 243 */ 244 struct completion entity_idle; 245 246 /** 247 * @oldest_job_waiting: 248 * 249 * Marks earliest job waiting in SW queue 250 */ 251 ktime_t oldest_job_waiting; 252 253 /** 254 * @rb_tree_node: 255 * 256 * The node used to insert this entity into time based priority queue 257 */ 258 struct rb_node rb_tree_node; 259 260 }; 261 262 /** 263 * struct drm_sched_rq - queue of entities to be scheduled. 264 * 265 * @sched: the scheduler to which this rq belongs to. 266 * @lock: protects @entities, @rb_tree_root, @rr_ts and @head_prio. 267 * @rr_ts: monotonically incrementing fake timestamp for RR mode. 268 * @entities: list of the entities to be scheduled. 269 * @rb_tree_root: root of time based priority queue of entities for FIFO scheduling 270 * @head_prio: priority of the top tree element. 271 * 272 * Run queue is a set of entities scheduling command submissions for 273 * one specific ring. It implements the scheduling policy that selects 274 * the next entity to emit commands from. 275 */ 276 struct drm_sched_rq { 277 struct drm_gpu_scheduler *sched; 278 279 spinlock_t lock; 280 /* Following members are protected by the @lock: */ 281 ktime_t rr_ts; 282 struct list_head entities; 283 struct rb_root_cached rb_tree_root; 284 enum drm_sched_priority head_prio; 285 }; 286 287 /** 288 * struct drm_sched_fence - fences corresponding to the scheduling of a job. 289 */ 290 struct drm_sched_fence { 291 /** 292 * @scheduled: this fence is what will be signaled by the scheduler 293 * when the job is scheduled. 294 */ 295 struct dma_fence scheduled; 296 297 /** 298 * @finished: this fence is what will be signaled by the scheduler 299 * when the job is completed. 300 * 301 * When setting up an out fence for the job, you should use 302 * this, since it's available immediately upon 303 * drm_sched_job_init(), and the fence returned by the driver 304 * from run_job() won't be created until the dependencies have 305 * resolved. 306 */ 307 struct dma_fence finished; 308 309 /** 310 * @deadline: deadline set on &drm_sched_fence.finished which 311 * potentially needs to be propagated to &drm_sched_fence.parent 312 */ 313 ktime_t deadline; 314 315 /** 316 * @parent: the fence returned by &drm_sched_backend_ops.run_job 317 * when scheduling the job on hardware. We signal the 318 * &drm_sched_fence.finished fence once parent is signalled. 319 */ 320 struct dma_fence *parent; 321 /** 322 * @sched: the scheduler instance to which the job having this struct 323 * belongs to. 324 */ 325 struct drm_gpu_scheduler *sched; 326 /** 327 * @lock: the lock used by the scheduled and the finished fences. 328 */ 329 spinlock_t lock; 330 /** 331 * @owner: job owner for debugging 332 */ 333 void *owner; 334 335 /** 336 * @drm_client_id: 337 * 338 * The client_id of the drm_file which owns the job. 339 */ 340 uint64_t drm_client_id; 341 }; 342 343 struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f); 344 345 /** 346 * struct drm_sched_job - A job to be run by an entity. 347 * 348 * @queue_node: used to append this struct to the queue of jobs in an entity. 349 * @list: a job participates in a "pending" and "done" lists. 350 * @sched: the scheduler instance on which this job is scheduled. 351 * @s_fence: contains the fences for the scheduling of job. 352 * @finish_cb: the callback for the finished fence. 353 * @credits: the number of credits this job contributes to the scheduler 354 * @work: Helper to reschedule job kill to different context. 355 * @karma: increment on every hang caused by this job. If this exceeds the hang 356 * limit of the scheduler then the job is marked guilty and will not 357 * be scheduled further. 358 * @s_priority: the priority of the job. 359 * @entity: the entity to which this job belongs. 360 * @cb: the callback for the parent fence in s_fence. 361 * 362 * A job is created by the driver using drm_sched_job_init(), and 363 * should call drm_sched_entity_push_job() once it wants the scheduler 364 * to schedule the job. 365 */ 366 struct drm_sched_job { 367 /** 368 * @submit_ts: 369 * 370 * When the job was pushed into the entity queue. 371 */ 372 ktime_t submit_ts; 373 374 /** 375 * @sched: 376 * 377 * The scheduler this job is or will be scheduled on. Gets set by 378 * drm_sched_job_arm(). Valid until drm_sched_backend_ops.free_job() 379 * has finished. 380 */ 381 struct drm_gpu_scheduler *sched; 382 383 struct drm_sched_fence *s_fence; 384 struct drm_sched_entity *entity; 385 386 /** 387 * @entity_stats: Stats object reference held by the job and entity. 388 */ 389 struct drm_sched_entity_stats *entity_stats; 390 391 enum drm_sched_priority s_priority; 392 u32 credits; 393 /** @last_dependency: tracks @dependencies as they signal */ 394 unsigned int last_dependency; 395 atomic_t karma; 396 397 struct spsc_node queue_node; 398 struct list_head list; 399 400 /* 401 * work is used only after finish_cb has been used and will not be 402 * accessed anymore. 403 */ 404 union { 405 struct dma_fence_cb finish_cb; 406 struct work_struct work; 407 }; 408 409 struct dma_fence_cb cb; 410 411 /** 412 * @dependencies: 413 * 414 * Contains the dependencies as struct dma_fence for this job, see 415 * drm_sched_job_add_dependency() and 416 * drm_sched_job_add_implicit_dependencies(). 417 */ 418 struct xarray dependencies; 419 }; 420 421 /** 422 * enum drm_gpu_sched_stat - the scheduler's status 423 * 424 * @DRM_GPU_SCHED_STAT_NONE: Reserved. Do not use. 425 * @DRM_GPU_SCHED_STAT_RESET: The GPU hung and successfully reset. 426 * @DRM_GPU_SCHED_STAT_ENODEV: Error: Device is not available anymore. 427 * @DRM_GPU_SCHED_STAT_NO_HANG: Contrary to scheduler's assumption, the GPU 428 * did not hang and is still running. 429 */ 430 enum drm_gpu_sched_stat { 431 DRM_GPU_SCHED_STAT_NONE, 432 DRM_GPU_SCHED_STAT_RESET, 433 DRM_GPU_SCHED_STAT_ENODEV, 434 DRM_GPU_SCHED_STAT_NO_HANG, 435 }; 436 437 /** 438 * struct drm_sched_backend_ops - Define the backend operations 439 * called by the scheduler 440 * 441 * These functions should be implemented in the driver side. 442 */ 443 struct drm_sched_backend_ops { 444 /** 445 * @prepare_job: 446 * 447 * Called when the scheduler is considering scheduling this job next, to 448 * get another struct dma_fence for this job to block on. Once it 449 * returns NULL, run_job() may be called. 450 * 451 * Can be NULL if no additional preparation to the dependencies are 452 * necessary. Skipped when jobs are killed instead of run. 453 */ 454 struct dma_fence *(*prepare_job)(struct drm_sched_job *sched_job, 455 struct drm_sched_entity *s_entity); 456 457 /** 458 * @run_job: Called to execute the job once all of the dependencies 459 * have been resolved. 460 * 461 * @sched_job: the job to run 462 * 463 * The deprecated drm_sched_resubmit_jobs() (called by &struct 464 * drm_sched_backend_ops.timedout_job) can invoke this again with the 465 * same parameters. Using this is discouraged because it violates 466 * dma_fence rules, notably dma_fence_init() has to be called on 467 * already initialized fences for a second time. Moreover, this is 468 * dangerous because attempts to allocate memory might deadlock with 469 * memory management code waiting for the reset to complete. 470 * 471 * TODO: Document what drivers should do / use instead. 472 * 473 * This method is called in a workqueue context - either from the 474 * submit_wq the driver passed through drm_sched_init(), or, if the 475 * driver passed NULL, a separate, ordered workqueue the scheduler 476 * allocated. 477 * 478 * Note that the scheduler expects to 'inherit' its own reference to 479 * this fence from the callback. It does not invoke an extra 480 * dma_fence_get() on it. Consequently, this callback must take a 481 * reference for the scheduler, and additional ones for the driver's 482 * respective needs. 483 * 484 * Return: 485 * * On success: dma_fence the driver must signal once the hardware has 486 * completed the job ("hardware fence"). 487 * * On failure: NULL or an ERR_PTR. 488 */ 489 struct dma_fence *(*run_job)(struct drm_sched_job *sched_job); 490 491 /** 492 * @timedout_job: Called when a job has taken too long to execute, 493 * to trigger GPU recovery. 494 * 495 * @sched_job: The job that has timed out 496 * 497 * Drivers typically issue a reset to recover from GPU hangs. 498 * This procedure looks very different depending on whether a firmware 499 * or a hardware scheduler is being used. 500 * 501 * For a FIRMWARE SCHEDULER, each ring has one scheduler, and each 502 * scheduler has one entity. Hence, the steps taken typically look as 503 * follows: 504 * 505 * 1. Stop the scheduler using drm_sched_stop(). This will pause the 506 * scheduler workqueues and cancel the timeout work, guaranteeing 507 * that nothing is queued while the ring is being removed. 508 * 2. Remove the ring. The firmware will make sure that the 509 * corresponding parts of the hardware are resetted, and that other 510 * rings are not impacted. 511 * 3. Kill the entity and the associated scheduler. 512 * 513 * 514 * For a HARDWARE SCHEDULER, a scheduler instance schedules jobs from 515 * one or more entities to one ring. This implies that all entities 516 * associated with the affected scheduler cannot be torn down, because 517 * this would effectively also affect innocent userspace processes which 518 * did not submit faulty jobs (for example). 519 * 520 * Consequently, the procedure to recover with a hardware scheduler 521 * should look like this: 522 * 523 * 1. Stop all schedulers impacted by the reset using drm_sched_stop(). 524 * 2. Kill the entity the faulty job stems from. 525 * 3. Issue a GPU reset on all faulty rings (driver-specific). 526 * 4. Re-submit jobs on all schedulers impacted by re-submitting them to 527 * the entities which are still alive. 528 * 5. Restart all schedulers that were stopped in step #1 using 529 * drm_sched_start(). 530 * 531 * Note that some GPUs have distinct hardware queues but need to reset 532 * the GPU globally, which requires extra synchronization between the 533 * timeout handlers of different schedulers. One way to achieve this 534 * synchronization is to create an ordered workqueue (using 535 * alloc_ordered_workqueue()) at the driver level, and pass this queue 536 * as drm_sched_init()'s @timeout_wq parameter. This will guarantee 537 * that timeout handlers are executed sequentially. 538 * 539 * Return: The scheduler's status, defined by &enum drm_gpu_sched_stat 540 * 541 */ 542 enum drm_gpu_sched_stat (*timedout_job)(struct drm_sched_job *sched_job); 543 544 /** 545 * @free_job: Called once the job's finished fence has been signaled 546 * and it's time to clean it up. 547 */ 548 void (*free_job)(struct drm_sched_job *sched_job); 549 550 /** 551 * @cancel_job: Used by the scheduler to guarantee remaining jobs' fences 552 * get signaled in drm_sched_fini(). 553 * 554 * Used by the scheduler to cancel all jobs that have not been executed 555 * with &struct drm_sched_backend_ops.run_job by the time 556 * drm_sched_fini() gets invoked. 557 * 558 * Drivers need to signal the passed job's hardware fence with an 559 * appropriate error code (e.g., -ECANCELED) in this callback. They 560 * must not free the job. 561 * 562 * The scheduler will only call this callback once it stopped calling 563 * all other callbacks forever, with the exception of &struct 564 * drm_sched_backend_ops.free_job. 565 */ 566 void (*cancel_job)(struct drm_sched_job *sched_job); 567 }; 568 569 /** 570 * struct drm_gpu_scheduler - scheduler instance-specific data 571 * 572 * @ops: backend operations provided by the driver. 573 * @credit_limit: the credit limit of this scheduler 574 * @credit_count: the current credit count of this scheduler 575 * @timeout: the time after which a job is removed from the scheduler. 576 * @name: name of the ring for which this scheduler is being used. 577 * @num_user_rqs: Number of run-queues. This is at most 578 * DRM_SCHED_PRIORITY_COUNT, as there's usually one run-queue per 579 * priority, but could be less. 580 * @num_rqs: Equal to @num_user_rqs for FIFO and RR and 1 for the FAIR policy. 581 * @sched_rq: An allocated array of run-queues of size @num_rqs; 582 * @job_scheduled: once drm_sched_entity_flush() is called the scheduler 583 * waits on this wait queue until all the scheduled jobs are 584 * finished. 585 * @job_id_count: used to assign unique id to the each job. 586 * @submit_wq: workqueue used to queue @work_run_job and @work_free_job 587 * @timeout_wq: workqueue used to queue @work_tdr 588 * @avg_job_us: Average job duration. 589 * @work_run_job: work which calls run_job op of each scheduler. 590 * @work_free_job: work which calls free_job op of each scheduler. 591 * @work_tdr: schedules a delayed call to @drm_sched_job_timedout after the 592 * timeout interval is over. 593 * @pending_list: the list of jobs which are currently in the job queue. 594 * @job_list_lock: lock to protect the pending_list. 595 * @hang_limit: once the hangs by a job crosses this limit then it is marked 596 * guilty and it will no longer be considered for scheduling. 597 * @score: score to help loadbalancer pick a idle sched 598 * @_score: score used when the driver doesn't provide one 599 * @ready: marks if the underlying HW is ready to work 600 * @free_guilty: A hit to time out handler to free the guilty job. 601 * @pause_submit: pause queuing of @work_run_job on @submit_wq 602 * @own_submit_wq: scheduler owns allocation of @submit_wq 603 * @dev: system &struct device 604 * 605 * One scheduler is implemented for each hardware ring. 606 */ 607 struct drm_gpu_scheduler { 608 const struct drm_sched_backend_ops *ops; 609 u32 credit_limit; 610 atomic_t credit_count; 611 long timeout; 612 const char *name; 613 u32 num_rqs; 614 u32 num_user_rqs; 615 struct drm_sched_rq **sched_rq; 616 wait_queue_head_t job_scheduled; 617 atomic64_t job_id_count; 618 struct workqueue_struct *submit_wq; 619 struct workqueue_struct *timeout_wq; 620 struct ewma_drm_sched_avgtime avg_job_us; 621 struct work_struct work_run_job; 622 struct work_struct work_free_job; 623 struct delayed_work work_tdr; 624 struct list_head pending_list; 625 spinlock_t job_list_lock; 626 int hang_limit; 627 atomic_t *score; 628 atomic_t _score; 629 bool ready; 630 bool free_guilty; 631 bool pause_submit; 632 bool own_submit_wq; 633 struct device *dev; 634 }; 635 636 /** 637 * struct drm_sched_init_args - parameters for initializing a DRM GPU scheduler 638 * 639 * @ops: backend operations provided by the driver 640 * @submit_wq: workqueue to use for submission. If NULL, an ordered wq is 641 * allocated and used. 642 * @num_rqs: Number of run-queues. This may be at most DRM_SCHED_PRIORITY_COUNT, 643 * as there's usually one run-queue per priority, but may be less. 644 * @credit_limit: the number of credits this scheduler can hold from all jobs 645 * @hang_limit: number of times to allow a job to hang before dropping it. 646 * This mechanism is DEPRECATED. Set it to 0. 647 * @timeout: timeout value in jiffies for submitted jobs. 648 * @timeout_wq: workqueue to use for timeout work. If NULL, the system_wq is used. 649 * @score: score atomic shared with other schedulers. May be NULL. 650 * @name: name (typically the driver's name). Used for debugging 651 * @dev: associated device. Used for debugging 652 */ 653 struct drm_sched_init_args { 654 const struct drm_sched_backend_ops *ops; 655 struct workqueue_struct *submit_wq; 656 struct workqueue_struct *timeout_wq; 657 u32 num_rqs; 658 u32 credit_limit; 659 unsigned int hang_limit; 660 long timeout; 661 atomic_t *score; 662 const char *name; 663 struct device *dev; 664 }; 665 666 /* Scheduler operations */ 667 668 int drm_sched_init(struct drm_gpu_scheduler *sched, 669 const struct drm_sched_init_args *args); 670 671 void drm_sched_fini(struct drm_gpu_scheduler *sched); 672 673 unsigned long drm_sched_suspend_timeout(struct drm_gpu_scheduler *sched); 674 void drm_sched_resume_timeout(struct drm_gpu_scheduler *sched, 675 unsigned long remaining); 676 void drm_sched_tdr_queue_imm(struct drm_gpu_scheduler *sched); 677 bool drm_sched_wqueue_ready(struct drm_gpu_scheduler *sched); 678 void drm_sched_wqueue_stop(struct drm_gpu_scheduler *sched); 679 void drm_sched_wqueue_start(struct drm_gpu_scheduler *sched); 680 void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad); 681 void drm_sched_start(struct drm_gpu_scheduler *sched, int errno); 682 void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched); 683 void drm_sched_fault(struct drm_gpu_scheduler *sched); 684 bool drm_sched_is_stopped(struct drm_gpu_scheduler *sched); 685 686 struct drm_gpu_scheduler * 687 drm_sched_pick_best(struct drm_gpu_scheduler **sched_list, 688 unsigned int num_sched_list); 689 690 /* Jobs */ 691 692 int drm_sched_job_init(struct drm_sched_job *job, 693 struct drm_sched_entity *entity, 694 u32 credits, void *owner, 695 u64 drm_client_id); 696 void drm_sched_job_arm(struct drm_sched_job *job); 697 void drm_sched_entity_push_job(struct drm_sched_job *sched_job); 698 int drm_sched_job_add_dependency(struct drm_sched_job *job, 699 struct dma_fence *fence); 700 int drm_sched_job_add_syncobj_dependency(struct drm_sched_job *job, 701 struct drm_file *file, 702 u32 handle, 703 u32 point); 704 int drm_sched_job_add_resv_dependencies(struct drm_sched_job *job, 705 struct dma_resv *resv, 706 enum dma_resv_usage usage); 707 int drm_sched_job_add_implicit_dependencies(struct drm_sched_job *job, 708 struct drm_gem_object *obj, 709 bool write); 710 bool drm_sched_job_has_dependency(struct drm_sched_job *job, 711 struct dma_fence *fence); 712 void drm_sched_job_cleanup(struct drm_sched_job *job); 713 void drm_sched_increase_karma(struct drm_sched_job *bad); 714 bool drm_sched_job_is_signaled(struct drm_sched_job *job); 715 716 static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job, 717 int threshold) 718 { 719 return s_job && atomic_inc_return(&s_job->karma) > threshold; 720 } 721 722 /* Entities */ 723 724 int drm_sched_entity_init(struct drm_sched_entity *entity, 725 enum drm_sched_priority priority, 726 struct drm_gpu_scheduler **sched_list, 727 unsigned int num_sched_list, 728 atomic_t *guilty); 729 long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout); 730 void drm_sched_entity_kill(struct drm_sched_entity *entity); 731 void drm_sched_entity_fini(struct drm_sched_entity *entity); 732 void drm_sched_entity_destroy(struct drm_sched_entity *entity); 733 void drm_sched_entity_set_priority(struct drm_sched_entity *entity, 734 enum drm_sched_priority priority); 735 int drm_sched_entity_error(struct drm_sched_entity *entity); 736 void drm_sched_entity_modify_sched(struct drm_sched_entity *entity, 737 struct drm_gpu_scheduler **sched_list, 738 unsigned int num_sched_list); 739 740 /** 741 * struct drm_sched_pending_job_iter - DRM scheduler pending job iterator state 742 * @sched: DRM scheduler associated with pending job iterator 743 */ 744 struct drm_sched_pending_job_iter { 745 struct drm_gpu_scheduler *sched; 746 }; 747 748 /* Drivers should never call this directly */ 749 static inline struct drm_sched_pending_job_iter 750 __drm_sched_pending_job_iter_begin(struct drm_gpu_scheduler *sched) 751 { 752 struct drm_sched_pending_job_iter iter = { 753 .sched = sched, 754 }; 755 756 WARN_ON(!drm_sched_is_stopped(sched)); 757 return iter; 758 } 759 760 /* Drivers should never call this directly */ 761 static inline void 762 __drm_sched_pending_job_iter_end(const struct drm_sched_pending_job_iter iter) 763 { 764 WARN_ON(!drm_sched_is_stopped(iter.sched)); 765 } 766 767 DEFINE_CLASS(drm_sched_pending_job_iter, struct drm_sched_pending_job_iter, 768 __drm_sched_pending_job_iter_end(_T), 769 __drm_sched_pending_job_iter_begin(__sched), 770 struct drm_gpu_scheduler *__sched); 771 static inline void * 772 class_drm_sched_pending_job_iter_lock_ptr(class_drm_sched_pending_job_iter_t *_T) 773 { return _T; } 774 #define class_drm_sched_pending_job_iter_is_conditional false 775 776 /** 777 * drm_sched_for_each_pending_job() - Iterator for each pending job in scheduler 778 * @__job: Current pending job being iterated over 779 * @__sched: DRM scheduler to iterate over pending jobs 780 * @__entity: DRM scheduler entity to filter jobs, NULL indicates no filter 781 * 782 * Iterator for each pending job in scheduler, filtering on an entity, and 783 * enforcing scheduler is fully stopped 784 */ 785 #define drm_sched_for_each_pending_job(__job, __sched, __entity) \ 786 scoped_guard(drm_sched_pending_job_iter, (__sched)) \ 787 list_for_each_entry((__job), &(__sched)->pending_list, list) \ 788 for_each_if(!(__entity) || (__job)->entity == (__entity)) 789 790 #endif 791