1 /* 2 * Copyright © 2007-2008 Intel Corporation 3 * Jesse Barnes <jesse.barnes@intel.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 #ifndef __DRM_EDID_H__ 24 #define __DRM_EDID_H__ 25 26 #include <linux/types.h> 27 #include <linux/hdmi.h> 28 #include <drm/drm_mode.h> 29 30 struct drm_device; 31 struct drm_edid; 32 struct i2c_adapter; 33 34 #define EDID_LENGTH 128 35 #define DDC_ADDR 0x50 36 #define DDC_ADDR2 0x52 /* E-DDC 1.2 - where DisplayID can hide */ 37 38 #define CEA_EXT 0x02 39 #define VTB_EXT 0x10 40 #define DI_EXT 0x40 41 #define LS_EXT 0x50 42 #define MI_EXT 0x60 43 #define DISPLAYID_EXT 0x70 44 45 struct est_timings { 46 u8 t1; 47 u8 t2; 48 u8 mfg_rsvd; 49 } __attribute__((packed)); 50 51 /* 00=16:10, 01=4:3, 10=5:4, 11=16:9 */ 52 #define EDID_TIMING_ASPECT_SHIFT 6 53 #define EDID_TIMING_ASPECT_MASK (0x3 << EDID_TIMING_ASPECT_SHIFT) 54 55 /* need to add 60 */ 56 #define EDID_TIMING_VFREQ_SHIFT 0 57 #define EDID_TIMING_VFREQ_MASK (0x3f << EDID_TIMING_VFREQ_SHIFT) 58 59 struct std_timing { 60 u8 hsize; /* need to multiply by 8 then add 248 */ 61 u8 vfreq_aspect; 62 } __attribute__((packed)); 63 64 #define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) 65 #define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) 66 #define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) 67 #define DRM_EDID_PT_STEREO (1 << 5) 68 #define DRM_EDID_PT_INTERLACED (1 << 7) 69 70 /* If detailed data is pixel timing */ 71 struct detailed_pixel_timing { 72 u8 hactive_lo; 73 u8 hblank_lo; 74 u8 hactive_hblank_hi; 75 u8 vactive_lo; 76 u8 vblank_lo; 77 u8 vactive_vblank_hi; 78 u8 hsync_offset_lo; 79 u8 hsync_pulse_width_lo; 80 u8 vsync_offset_pulse_width_lo; 81 u8 hsync_vsync_offset_pulse_width_hi; 82 u8 width_mm_lo; 83 u8 height_mm_lo; 84 u8 width_height_mm_hi; 85 u8 hborder; 86 u8 vborder; 87 u8 misc; 88 } __attribute__((packed)); 89 90 /* If it's not pixel timing, it'll be one of the below */ 91 struct detailed_data_string { 92 u8 str[13]; 93 } __attribute__((packed)); 94 95 #define DRM_EDID_RANGE_OFFSET_MIN_VFREQ (1 << 0) /* 1.4 */ 96 #define DRM_EDID_RANGE_OFFSET_MAX_VFREQ (1 << 1) /* 1.4 */ 97 #define DRM_EDID_RANGE_OFFSET_MIN_HFREQ (1 << 2) /* 1.4 */ 98 #define DRM_EDID_RANGE_OFFSET_MAX_HFREQ (1 << 3) /* 1.4 */ 99 100 #define DRM_EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00 /* 1.3 */ 101 #define DRM_EDID_RANGE_LIMITS_ONLY_FLAG 0x01 /* 1.4 */ 102 #define DRM_EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02 /* 1.3 */ 103 #define DRM_EDID_CVT_SUPPORT_FLAG 0x04 /* 1.4 */ 104 105 #define DRM_EDID_CVT_FLAGS_STANDARD_BLANKING (1 << 3) 106 #define DRM_EDID_CVT_FLAGS_REDUCED_BLANKING (1 << 4) 107 108 struct detailed_data_monitor_range { 109 u8 min_vfreq; 110 u8 max_vfreq; 111 u8 min_hfreq_khz; 112 u8 max_hfreq_khz; 113 u8 pixel_clock_mhz; /* need to multiply by 10 */ 114 u8 flags; 115 union { 116 struct { 117 u8 reserved; 118 u8 hfreq_start_khz; /* need to multiply by 2 */ 119 u8 c; /* need to divide by 2 */ 120 __le16 m; 121 u8 k; 122 u8 j; /* need to divide by 2 */ 123 } __attribute__((packed)) gtf2; 124 struct { 125 u8 version; 126 u8 data1; /* high 6 bits: extra clock resolution */ 127 u8 data2; /* plus low 2 of above: max hactive */ 128 u8 supported_aspects; 129 u8 flags; /* preferred aspect and blanking support */ 130 u8 supported_scalings; 131 u8 preferred_refresh; 132 } __attribute__((packed)) cvt; 133 } __attribute__((packed)) formula; 134 } __attribute__((packed)); 135 136 struct detailed_data_wpindex { 137 u8 white_yx_lo; /* Lower 2 bits each */ 138 u8 white_x_hi; 139 u8 white_y_hi; 140 u8 gamma; /* need to divide by 100 then add 1 */ 141 } __attribute__((packed)); 142 143 struct detailed_data_color_point { 144 u8 windex1; 145 u8 wpindex1[3]; 146 u8 windex2; 147 u8 wpindex2[3]; 148 } __attribute__((packed)); 149 150 struct cvt_timing { 151 u8 code[3]; 152 } __attribute__((packed)); 153 154 struct detailed_non_pixel { 155 u8 pad1; 156 u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name 157 fb=color point data, fa=standard timing data, 158 f9=undefined, f8=mfg. reserved */ 159 u8 pad2; 160 union { 161 struct detailed_data_string str; 162 struct detailed_data_monitor_range range; 163 struct detailed_data_wpindex color; 164 struct std_timing timings[6]; 165 struct cvt_timing cvt[4]; 166 } __attribute__((packed)) data; 167 } __attribute__((packed)); 168 169 #define EDID_DETAIL_EST_TIMINGS 0xf7 170 #define EDID_DETAIL_CVT_3BYTE 0xf8 171 #define EDID_DETAIL_COLOR_MGMT_DATA 0xf9 172 #define EDID_DETAIL_STD_MODES 0xfa 173 #define EDID_DETAIL_MONITOR_CPDATA 0xfb 174 #define EDID_DETAIL_MONITOR_NAME 0xfc 175 #define EDID_DETAIL_MONITOR_RANGE 0xfd 176 #define EDID_DETAIL_MONITOR_STRING 0xfe 177 #define EDID_DETAIL_MONITOR_SERIAL 0xff 178 179 struct detailed_timing { 180 __le16 pixel_clock; /* need to multiply by 10 KHz */ 181 union { 182 struct detailed_pixel_timing pixel_data; 183 struct detailed_non_pixel other_data; 184 } __attribute__((packed)) data; 185 } __attribute__((packed)); 186 187 #define DRM_EDID_INPUT_SERRATION_VSYNC (1 << 0) 188 #define DRM_EDID_INPUT_SYNC_ON_GREEN (1 << 1) 189 #define DRM_EDID_INPUT_COMPOSITE_SYNC (1 << 2) 190 #define DRM_EDID_INPUT_SEPARATE_SYNCS (1 << 3) 191 #define DRM_EDID_INPUT_BLANK_TO_BLACK (1 << 4) 192 #define DRM_EDID_INPUT_VIDEO_LEVEL (3 << 5) 193 #define DRM_EDID_INPUT_DIGITAL (1 << 7) 194 #define DRM_EDID_DIGITAL_DEPTH_MASK (7 << 4) /* 1.4 */ 195 #define DRM_EDID_DIGITAL_DEPTH_UNDEF (0 << 4) /* 1.4 */ 196 #define DRM_EDID_DIGITAL_DEPTH_6 (1 << 4) /* 1.4 */ 197 #define DRM_EDID_DIGITAL_DEPTH_8 (2 << 4) /* 1.4 */ 198 #define DRM_EDID_DIGITAL_DEPTH_10 (3 << 4) /* 1.4 */ 199 #define DRM_EDID_DIGITAL_DEPTH_12 (4 << 4) /* 1.4 */ 200 #define DRM_EDID_DIGITAL_DEPTH_14 (5 << 4) /* 1.4 */ 201 #define DRM_EDID_DIGITAL_DEPTH_16 (6 << 4) /* 1.4 */ 202 #define DRM_EDID_DIGITAL_DEPTH_RSVD (7 << 4) /* 1.4 */ 203 #define DRM_EDID_DIGITAL_TYPE_MASK (7 << 0) /* 1.4 */ 204 #define DRM_EDID_DIGITAL_TYPE_UNDEF (0 << 0) /* 1.4 */ 205 #define DRM_EDID_DIGITAL_TYPE_DVI (1 << 0) /* 1.4 */ 206 #define DRM_EDID_DIGITAL_TYPE_HDMI_A (2 << 0) /* 1.4 */ 207 #define DRM_EDID_DIGITAL_TYPE_HDMI_B (3 << 0) /* 1.4 */ 208 #define DRM_EDID_DIGITAL_TYPE_MDDI (4 << 0) /* 1.4 */ 209 #define DRM_EDID_DIGITAL_TYPE_DP (5 << 0) /* 1.4 */ 210 #define DRM_EDID_DIGITAL_DFP_1_X (1 << 0) /* 1.3 */ 211 212 #define DRM_EDID_FEATURE_DEFAULT_GTF (1 << 0) /* 1.2 */ 213 #define DRM_EDID_FEATURE_CONTINUOUS_FREQ (1 << 0) /* 1.4 */ 214 #define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 1) 215 #define DRM_EDID_FEATURE_STANDARD_COLOR (1 << 2) 216 /* If analog */ 217 #define DRM_EDID_FEATURE_DISPLAY_TYPE (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */ 218 /* If digital */ 219 #define DRM_EDID_FEATURE_COLOR_MASK (3 << 3) 220 #define DRM_EDID_FEATURE_RGB (0 << 3) 221 #define DRM_EDID_FEATURE_RGB_YCRCB444 (1 << 3) 222 #define DRM_EDID_FEATURE_RGB_YCRCB422 (2 << 3) 223 #define DRM_EDID_FEATURE_RGB_YCRCB (3 << 3) /* both 4:4:4 and 4:2:2 */ 224 225 #define DRM_EDID_FEATURE_PM_ACTIVE_OFF (1 << 5) 226 #define DRM_EDID_FEATURE_PM_SUSPEND (1 << 6) 227 #define DRM_EDID_FEATURE_PM_STANDBY (1 << 7) 228 229 #define DRM_EDID_HDMI_DC_48 (1 << 6) 230 #define DRM_EDID_HDMI_DC_36 (1 << 5) 231 #define DRM_EDID_HDMI_DC_30 (1 << 4) 232 #define DRM_EDID_HDMI_DC_Y444 (1 << 3) 233 234 /* YCBCR 420 deep color modes */ 235 #define DRM_EDID_YCBCR420_DC_48 (1 << 2) 236 #define DRM_EDID_YCBCR420_DC_36 (1 << 1) 237 #define DRM_EDID_YCBCR420_DC_30 (1 << 0) 238 #define DRM_EDID_YCBCR420_DC_MASK (DRM_EDID_YCBCR420_DC_48 | \ 239 DRM_EDID_YCBCR420_DC_36 | \ 240 DRM_EDID_YCBCR420_DC_30) 241 242 /* HDMI 2.1 additional fields */ 243 #define DRM_EDID_MAX_FRL_RATE_MASK 0xf0 244 #define DRM_EDID_FAPA_START_LOCATION (1 << 0) 245 #define DRM_EDID_ALLM (1 << 1) 246 #define DRM_EDID_FVA (1 << 2) 247 248 /* Deep Color specific */ 249 #define DRM_EDID_DC_30BIT_420 (1 << 0) 250 #define DRM_EDID_DC_36BIT_420 (1 << 1) 251 #define DRM_EDID_DC_48BIT_420 (1 << 2) 252 253 /* VRR specific */ 254 #define DRM_EDID_CNMVRR (1 << 3) 255 #define DRM_EDID_CINEMA_VRR (1 << 4) 256 #define DRM_EDID_MDELTA (1 << 5) 257 #define DRM_EDID_VRR_MAX_UPPER_MASK 0xc0 258 #define DRM_EDID_VRR_MAX_LOWER_MASK 0xff 259 #define DRM_EDID_VRR_MIN_MASK 0x3f 260 261 /* DSC specific */ 262 #define DRM_EDID_DSC_10BPC (1 << 0) 263 #define DRM_EDID_DSC_12BPC (1 << 1) 264 #define DRM_EDID_DSC_16BPC (1 << 2) 265 #define DRM_EDID_DSC_ALL_BPP (1 << 3) 266 #define DRM_EDID_DSC_NATIVE_420 (1 << 6) 267 #define DRM_EDID_DSC_1P2 (1 << 7) 268 #define DRM_EDID_DSC_MAX_FRL_RATE_MASK 0xf0 269 #define DRM_EDID_DSC_MAX_SLICES 0xf 270 #define DRM_EDID_DSC_TOTAL_CHUNK_KBYTES 0x3f 271 272 struct edid { 273 u8 header[8]; 274 /* Vendor & product info */ 275 u8 mfg_id[2]; 276 u8 prod_code[2]; 277 u32 serial; /* FIXME: byte order */ 278 u8 mfg_week; 279 u8 mfg_year; 280 /* EDID version */ 281 u8 version; 282 u8 revision; 283 /* Display info: */ 284 u8 input; 285 u8 width_cm; 286 u8 height_cm; 287 u8 gamma; 288 u8 features; 289 /* Color characteristics */ 290 u8 red_green_lo; 291 u8 blue_white_lo; 292 u8 red_x; 293 u8 red_y; 294 u8 green_x; 295 u8 green_y; 296 u8 blue_x; 297 u8 blue_y; 298 u8 white_x; 299 u8 white_y; 300 /* Est. timings and mfg rsvd timings*/ 301 struct est_timings established_timings; 302 /* Standard timings 1-8*/ 303 struct std_timing standard_timings[8]; 304 /* Detailing timings 1-4 */ 305 struct detailed_timing detailed_timings[4]; 306 /* Number of 128 byte ext. blocks */ 307 u8 extensions; 308 /* Checksum */ 309 u8 checksum; 310 } __attribute__((packed)); 311 312 #define EDID_PRODUCT_ID(e) ((e)->prod_code[0] | ((e)->prod_code[1] << 8)) 313 314 /* Short Audio Descriptor */ 315 struct cea_sad { 316 u8 format; 317 u8 channels; /* max number of channels - 1 */ 318 u8 freq; 319 u8 byte2; /* meaning depends on format */ 320 }; 321 322 struct drm_encoder; 323 struct drm_connector; 324 struct drm_connector_state; 325 struct drm_display_mode; 326 327 int drm_edid_to_sad(const struct edid *edid, struct cea_sad **sads); 328 int drm_edid_to_speaker_allocation(const struct edid *edid, u8 **sadb); 329 int drm_av_sync_delay(struct drm_connector *connector, 330 const struct drm_display_mode *mode); 331 332 bool drm_edid_are_equal(const struct edid *edid1, const struct edid *edid2); 333 334 int 335 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, 336 const struct drm_connector *connector, 337 const struct drm_display_mode *mode); 338 int 339 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame, 340 const struct drm_connector *connector, 341 const struct drm_display_mode *mode); 342 343 void 344 drm_hdmi_avi_infoframe_quant_range(struct hdmi_avi_infoframe *frame, 345 const struct drm_connector *connector, 346 const struct drm_display_mode *mode, 347 enum hdmi_quantization_range rgb_quant_range); 348 349 /** 350 * drm_edid_decode_mfg_id - Decode the manufacturer ID 351 * @mfg_id: The manufacturer ID 352 * @vend: A 4-byte buffer to store the 3-letter vendor string plus a '\0' 353 * termination 354 */ 355 static inline const char *drm_edid_decode_mfg_id(u16 mfg_id, char vend[4]) 356 { 357 vend[0] = '@' + ((mfg_id >> 10) & 0x1f); 358 vend[1] = '@' + ((mfg_id >> 5) & 0x1f); 359 vend[2] = '@' + ((mfg_id >> 0) & 0x1f); 360 vend[3] = '\0'; 361 362 return vend; 363 } 364 365 /** 366 * drm_edid_encode_panel_id - Encode an ID for matching against drm_edid_get_panel_id() 367 * @vend_chr_0: First character of the vendor string. 368 * @vend_chr_1: Second character of the vendor string. 369 * @vend_chr_2: Third character of the vendor string. 370 * @product_id: The 16-bit product ID. 371 * 372 * This is a macro so that it can be calculated at compile time and used 373 * as an initializer. 374 * 375 * For instance: 376 * drm_edid_encode_panel_id('B', 'O', 'E', 0x2d08) => 0x09e52d08 377 * 378 * Return: a 32-bit ID per panel. 379 */ 380 #define drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, product_id) \ 381 ((((u32)(vend_chr_0) - '@') & 0x1f) << 26 | \ 382 (((u32)(vend_chr_1) - '@') & 0x1f) << 21 | \ 383 (((u32)(vend_chr_2) - '@') & 0x1f) << 16 | \ 384 ((product_id) & 0xffff)) 385 386 /** 387 * drm_edid_decode_panel_id - Decode a panel ID from drm_edid_encode_panel_id() 388 * @panel_id: The panel ID to decode. 389 * @vend: A 4-byte buffer to store the 3-letter vendor string plus a '\0' 390 * termination 391 * @product_id: The product ID will be returned here. 392 * 393 * For instance, after: 394 * drm_edid_decode_panel_id(0x09e52d08, vend, &product_id) 395 * These will be true: 396 * vend[0] = 'B' 397 * vend[1] = 'O' 398 * vend[2] = 'E' 399 * vend[3] = '\0' 400 * product_id = 0x2d08 401 */ 402 static inline void drm_edid_decode_panel_id(u32 panel_id, char vend[4], u16 *product_id) 403 { 404 *product_id = (u16)(panel_id & 0xffff); 405 drm_edid_decode_mfg_id(panel_id >> 16, vend); 406 } 407 408 bool drm_probe_ddc(struct i2c_adapter *adapter); 409 struct edid *drm_do_get_edid(struct drm_connector *connector, 410 int (*get_edid_block)(void *data, u8 *buf, unsigned int block, 411 size_t len), 412 void *data); 413 struct edid *drm_get_edid(struct drm_connector *connector, 414 struct i2c_adapter *adapter); 415 u32 drm_edid_get_panel_id(struct i2c_adapter *adapter); 416 struct edid *drm_get_edid_switcheroo(struct drm_connector *connector, 417 struct i2c_adapter *adapter); 418 struct edid *drm_edid_duplicate(const struct edid *edid); 419 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid); 420 int drm_edid_override_connector_update(struct drm_connector *connector); 421 422 u8 drm_match_cea_mode(const struct drm_display_mode *to_match); 423 bool drm_detect_hdmi_monitor(const struct edid *edid); 424 bool drm_detect_monitor_audio(const struct edid *edid); 425 enum hdmi_quantization_range 426 drm_default_rgb_quant_range(const struct drm_display_mode *mode); 427 int drm_add_modes_noedid(struct drm_connector *connector, 428 int hdisplay, int vdisplay); 429 void drm_set_preferred_mode(struct drm_connector *connector, 430 int hpref, int vpref); 431 432 int drm_edid_header_is_valid(const void *edid); 433 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid, 434 bool *edid_corrupt); 435 bool drm_edid_is_valid(struct edid *edid); 436 void drm_edid_get_monitor_name(const struct edid *edid, char *name, 437 int buflen); 438 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, 439 int hsize, int vsize, int fresh, 440 bool rb); 441 struct drm_display_mode * 442 drm_display_mode_from_cea_vic(struct drm_device *dev, 443 u8 video_code); 444 445 /* Interface based on struct drm_edid */ 446 const struct drm_edid *drm_edid_alloc(const void *edid, size_t size); 447 const struct drm_edid *drm_edid_dup(const struct drm_edid *drm_edid); 448 void drm_edid_free(const struct drm_edid *drm_edid); 449 bool drm_edid_valid(const struct drm_edid *drm_edid); 450 const struct edid *drm_edid_raw(const struct drm_edid *drm_edid); 451 const struct drm_edid *drm_edid_read(struct drm_connector *connector); 452 const struct drm_edid *drm_edid_read_ddc(struct drm_connector *connector, 453 struct i2c_adapter *adapter); 454 const struct drm_edid *drm_edid_read_custom(struct drm_connector *connector, 455 int (*read_block)(void *context, u8 *buf, unsigned int block, size_t len), 456 void *context); 457 const struct drm_edid *drm_edid_read_switcheroo(struct drm_connector *connector, 458 struct i2c_adapter *adapter); 459 int drm_edid_connector_update(struct drm_connector *connector, 460 const struct drm_edid *edid); 461 int drm_edid_connector_add_modes(struct drm_connector *connector); 462 bool drm_edid_is_digital(const struct drm_edid *drm_edid); 463 464 const u8 *drm_find_edid_extension(const struct drm_edid *drm_edid, 465 int ext_id, int *ext_index); 466 467 #endif /* __DRM_EDID_H__ */ 468