xref: /linux/include/drm/drm_cache.h (revision 4e0ae876f77bc01a7e77724dea57b4b82bd53244)
1 /**************************************************************************
2  *
3  * Copyright 2009 Red Hat Inc.
4  * All Rights Reserved.
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6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
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10  * distribute, sub license, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * The above copyright notice and this permission notice (including the
15  * next paragraph) shall be included in all copies or substantial portions
16  * of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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28 /*
29  * Authors:
30  * Dave Airlie <airlied@redhat.com>
31  */
32 
33 #ifndef _DRM_CACHE_H_
34 #define _DRM_CACHE_H_
35 
36 #include <linux/scatterlist.h>
37 
38 void drm_clflush_pages(struct page *pages[], unsigned long num_pages);
39 void drm_clflush_sg(struct sg_table *st);
40 void drm_clflush_virt_range(void *addr, unsigned long length);
41 u64 drm_get_max_iomem(void);
42 
43 
44 static inline bool drm_arch_can_wc_memory(void)
45 {
46 #if defined(CONFIG_PPC) && !defined(CONFIG_NOT_COHERENT_CACHE)
47 	return false;
48 #elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_LOONGSON3)
49 	return false;
50 #elif defined(CONFIG_ARM) || defined(CONFIG_ARM64)
51 	/*
52 	 * The DRM driver stack is designed to work with cache coherent devices
53 	 * only, but permits an optimization to be enabled in some cases, where
54 	 * for some buffers, both the CPU and the GPU use uncached mappings,
55 	 * removing the need for DMA snooping and allocation in the CPU caches.
56 	 *
57 	 * The use of uncached GPU mappings relies on the correct implementation
58 	 * of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU
59 	 * will use cached mappings nonetheless. On x86 platforms, this does not
60 	 * seem to matter, as uncached CPU mappings will snoop the caches in any
61 	 * case. However, on ARM and arm64, enabling this optimization on a
62 	 * platform where NoSnoop is ignored results in loss of coherency, which
63 	 * breaks correct operation of the device. Since we have no way of
64 	 * detecting whether NoSnoop works or not, just disable this
65 	 * optimization entirely for ARM and arm64.
66 	 */
67 	return false;
68 #else
69 	return true;
70 #endif
71 }
72 
73 #endif
74