1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Copyright(c) 2020 Intel Corporation. All rights reserved. */ 3 4 #ifndef __CXL_CXL_PCI_H__ 5 #define __CXL_CXL_PCI_H__ 6 7 /* Register Block Identifier (RBI) */ 8 enum cxl_regloc_type { 9 CXL_REGLOC_RBI_EMPTY = 0, 10 CXL_REGLOC_RBI_COMPONENT, 11 CXL_REGLOC_RBI_VIRT, 12 CXL_REGLOC_RBI_MEMDEV, 13 CXL_REGLOC_RBI_PMU, 14 CXL_REGLOC_RBI_TYPES 15 }; 16 17 struct cxl_register_map; 18 struct pci_dev; 19 20 int cxl_pci_setup_regs(struct pci_dev *pdev, enum cxl_regloc_type type, 21 struct cxl_register_map *map); 22 #endif 23