1*bc1ce713SSean Anderson /* SPDX-License-Identifier: GPL-2.0+ */ 2*bc1ce713SSean Anderson /* 3*bc1ce713SSean Anderson * Copyright (C) 2021 Sean Anderson <sean.anderson@seco.com> 4*bc1ce713SSean Anderson */ 5*bc1ce713SSean Anderson 6*bc1ce713SSean Anderson #ifndef XILINX_TIMER_H 7*bc1ce713SSean Anderson #define XILINX_TIMER_H 8*bc1ce713SSean Anderson 9*bc1ce713SSean Anderson #include <linux/compiler.h> 10*bc1ce713SSean Anderson 11*bc1ce713SSean Anderson #define TCSR0 0x00 12*bc1ce713SSean Anderson #define TLR0 0x04 13*bc1ce713SSean Anderson #define TCR0 0x08 14*bc1ce713SSean Anderson #define TCSR1 0x10 15*bc1ce713SSean Anderson #define TLR1 0x14 16*bc1ce713SSean Anderson #define TCR1 0x18 17*bc1ce713SSean Anderson 18*bc1ce713SSean Anderson #define TCSR_MDT BIT(0) 19*bc1ce713SSean Anderson #define TCSR_UDT BIT(1) 20*bc1ce713SSean Anderson #define TCSR_GENT BIT(2) 21*bc1ce713SSean Anderson #define TCSR_CAPT BIT(3) 22*bc1ce713SSean Anderson #define TCSR_ARHT BIT(4) 23*bc1ce713SSean Anderson #define TCSR_LOAD BIT(5) 24*bc1ce713SSean Anderson #define TCSR_ENIT BIT(6) 25*bc1ce713SSean Anderson #define TCSR_ENT BIT(7) 26*bc1ce713SSean Anderson #define TCSR_TINT BIT(8) 27*bc1ce713SSean Anderson #define TCSR_PWMA BIT(9) 28*bc1ce713SSean Anderson #define TCSR_ENALL BIT(10) 29*bc1ce713SSean Anderson #define TCSR_CASC BIT(11) 30*bc1ce713SSean Anderson 31*bc1ce713SSean Anderson struct clk; 32*bc1ce713SSean Anderson struct device_node; 33*bc1ce713SSean Anderson struct regmap; 34*bc1ce713SSean Anderson 35*bc1ce713SSean Anderson /** 36*bc1ce713SSean Anderson * struct xilinx_timer_priv - Private data for Xilinx AXI timer drivers 37*bc1ce713SSean Anderson * @map: Regmap of the device, possibly with an offset 38*bc1ce713SSean Anderson * @clk: Parent clock 39*bc1ce713SSean Anderson * @max: Maximum value of the counters 40*bc1ce713SSean Anderson */ 41*bc1ce713SSean Anderson struct xilinx_timer_priv { 42*bc1ce713SSean Anderson struct regmap *map; 43*bc1ce713SSean Anderson struct clk *clk; 44*bc1ce713SSean Anderson u32 max; 45*bc1ce713SSean Anderson }; 46*bc1ce713SSean Anderson 47*bc1ce713SSean Anderson /** 48*bc1ce713SSean Anderson * xilinx_timer_tlr_cycles() - Calculate the TLR for a period specified 49*bc1ce713SSean Anderson * in clock cycles 50*bc1ce713SSean Anderson * @priv: The timer's private data 51*bc1ce713SSean Anderson * @tcsr: The value of the TCSR register for this counter 52*bc1ce713SSean Anderson * @cycles: The number of cycles in this period 53*bc1ce713SSean Anderson * 54*bc1ce713SSean Anderson * Callers of this function MUST ensure that @cycles is representable as 55*bc1ce713SSean Anderson * a TLR. 56*bc1ce713SSean Anderson * 57*bc1ce713SSean Anderson * Return: The calculated value for TLR 58*bc1ce713SSean Anderson */ 59*bc1ce713SSean Anderson u32 xilinx_timer_tlr_cycles(struct xilinx_timer_priv *priv, u32 tcsr, 60*bc1ce713SSean Anderson u64 cycles); 61*bc1ce713SSean Anderson 62*bc1ce713SSean Anderson /** 63*bc1ce713SSean Anderson * xilinx_timer_get_period() - Get the current period of a counter 64*bc1ce713SSean Anderson * @priv: The timer's private data 65*bc1ce713SSean Anderson * @tlr: The value of TLR for this counter 66*bc1ce713SSean Anderson * @tcsr: The value of TCSR for this counter 67*bc1ce713SSean Anderson * 68*bc1ce713SSean Anderson * Return: The period, in ns 69*bc1ce713SSean Anderson */ 70*bc1ce713SSean Anderson unsigned int xilinx_timer_get_period(struct xilinx_timer_priv *priv, 71*bc1ce713SSean Anderson u32 tlr, u32 tcsr); 72*bc1ce713SSean Anderson 73*bc1ce713SSean Anderson #endif /* XILINX_TIMER_H */ 74