1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __GENERIC_IO_H 3 #define __GENERIC_IO_H 4 5 #include <linux/linkage.h> 6 #include <asm/byteorder.h> 7 8 /* 9 * These are the "generic" interfaces for doing new-style 10 * memory-mapped or PIO accesses. Architectures may do 11 * their own arch-optimized versions, these just act as 12 * wrappers around the old-style IO register access functions: 13 * read[bwl]/write[bwl]/in[bwl]/out[bwl] 14 * 15 * Don't include this directly, include it from <asm/io.h>. 16 */ 17 18 /* 19 * Read/write from/to an (offsettable) iomem cookie. It might be a PIO 20 * access or a MMIO access, these functions don't care. The info is 21 * encoded in the hardware mapping set up by the mapping functions 22 * (or the cookie itself, depending on implementation and hw). 23 * 24 * The generic routines just encode the PIO/MMIO as part of the 25 * cookie, and coldly assume that the MMIO IO mappings are not 26 * in the low address range. Architectures for which this is not 27 * true can't use this generic implementation. 28 */ 29 extern unsigned int ioread8(const void __iomem *); 30 extern unsigned int ioread16(const void __iomem *); 31 extern unsigned int ioread16be(const void __iomem *); 32 extern unsigned int ioread32(const void __iomem *); 33 extern unsigned int ioread32be(const void __iomem *); 34 35 extern u64 __ioread64_lo_hi(const void __iomem *addr); 36 extern u64 __ioread64_hi_lo(const void __iomem *addr); 37 extern u64 __ioread64be_lo_hi(const void __iomem *addr); 38 extern u64 __ioread64be_hi_lo(const void __iomem *addr); 39 40 extern void iowrite8(u8, void __iomem *); 41 extern void iowrite16(u16, void __iomem *); 42 extern void iowrite16be(u16, void __iomem *); 43 extern void iowrite32(u32, void __iomem *); 44 extern void iowrite32be(u32, void __iomem *); 45 46 extern void __iowrite64_lo_hi(u64 val, void __iomem *addr); 47 extern void __iowrite64_hi_lo(u64 val, void __iomem *addr); 48 extern void __iowrite64be_lo_hi(u64 val, void __iomem *addr); 49 extern void __iowrite64be_hi_lo(u64 val, void __iomem *addr); 50 51 /* 52 * "string" versions of the above. Note that they 53 * use native byte ordering for the accesses (on 54 * the assumption that IO and memory agree on a 55 * byte order, and CPU byteorder is irrelevant). 56 * 57 * They do _not_ update the port address. If you 58 * want MMIO that copies stuff laid out in MMIO 59 * memory across multiple ports, use "memcpy_toio()" 60 * and friends. 61 */ 62 extern void ioread8_rep(const void __iomem *port, void *buf, unsigned long count); 63 extern void ioread16_rep(const void __iomem *port, void *buf, unsigned long count); 64 extern void ioread32_rep(const void __iomem *port, void *buf, unsigned long count); 65 66 extern void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count); 67 extern void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count); 68 extern void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count); 69 70 #ifdef CONFIG_HAS_IOPORT_MAP 71 /* Create a virtual mapping cookie for an IO port range */ 72 extern void __iomem *ioport_map(unsigned long port, unsigned int nr); 73 extern void ioport_unmap(void __iomem *); 74 #endif 75 76 #ifndef ioremap_wc 77 #define ioremap_wc ioremap 78 #endif 79 80 #ifndef ioremap_wt 81 #define ioremap_wt ioremap 82 #endif 83 84 #ifndef ioremap_np 85 /* See the comment in asm-generic/io.h about ioremap_np(). */ 86 #define ioremap_np ioremap_np 87 static inline void __iomem *ioremap_np(phys_addr_t offset, size_t size) 88 { 89 return NULL; 90 } 91 #endif 92 93 #include <asm-generic/pci_iomap.h> 94 95 #endif 96