1 /* Generic I/O port emulation, based on MN10300 code 2 * 3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. 4 * Written by David Howells (dhowells@redhat.com) 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public Licence 8 * as published by the Free Software Foundation; either version 9 * 2 of the Licence, or (at your option) any later version. 10 */ 11 #ifndef __ASM_GENERIC_IO_H 12 #define __ASM_GENERIC_IO_H 13 14 #include <asm/page.h> /* I/O is all done through memory accesses */ 15 #include <asm/cacheflush.h> 16 #include <linux/types.h> 17 18 #ifdef CONFIG_GENERIC_IOMAP 19 #include <asm-generic/iomap.h> 20 #endif 21 22 #include <asm-generic/pci_iomap.h> 23 24 #ifndef mmiowb 25 #define mmiowb() do {} while (0) 26 #endif 27 28 /*****************************************************************************/ 29 /* 30 * readX/writeX() are used to access memory mapped devices. On some 31 * architectures the memory mapped IO stuff needs to be accessed 32 * differently. On the simple architectures, we just read/write the 33 * memory location directly. 34 */ 35 #ifndef __raw_readb 36 static inline u8 __raw_readb(const volatile void __iomem *addr) 37 { 38 return *(const volatile u8 __force *) addr; 39 } 40 #endif 41 42 #ifndef __raw_readw 43 static inline u16 __raw_readw(const volatile void __iomem *addr) 44 { 45 return *(const volatile u16 __force *) addr; 46 } 47 #endif 48 49 #ifndef __raw_readl 50 static inline u32 __raw_readl(const volatile void __iomem *addr) 51 { 52 return *(const volatile u32 __force *) addr; 53 } 54 #endif 55 56 #define readb __raw_readb 57 #define readw(addr) __le16_to_cpu(__raw_readw(addr)) 58 #define readl(addr) __le32_to_cpu(__raw_readl(addr)) 59 60 #ifndef __raw_writeb 61 static inline void __raw_writeb(u8 b, volatile void __iomem *addr) 62 { 63 *(volatile u8 __force *) addr = b; 64 } 65 #endif 66 67 #ifndef __raw_writew 68 static inline void __raw_writew(u16 b, volatile void __iomem *addr) 69 { 70 *(volatile u16 __force *) addr = b; 71 } 72 #endif 73 74 #ifndef __raw_writel 75 static inline void __raw_writel(u32 b, volatile void __iomem *addr) 76 { 77 *(volatile u32 __force *) addr = b; 78 } 79 #endif 80 81 #define writeb __raw_writeb 82 #define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr) 83 #define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr) 84 85 #ifdef CONFIG_64BIT 86 #ifndef __raw_readq 87 static inline u64 __raw_readq(const volatile void __iomem *addr) 88 { 89 return *(const volatile u64 __force *) addr; 90 } 91 #endif 92 93 #define readq(addr) __le64_to_cpu(__raw_readq(addr)) 94 95 #ifndef __raw_writeq 96 static inline void __raw_writeq(u64 b, volatile void __iomem *addr) 97 { 98 *(volatile u64 __force *) addr = b; 99 } 100 #endif 101 102 #define writeq(b, addr) __raw_writeq(__cpu_to_le64(b), addr) 103 #endif /* CONFIG_64BIT */ 104 105 #ifndef PCI_IOBASE 106 #define PCI_IOBASE ((void __iomem *) 0) 107 #endif 108 109 /*****************************************************************************/ 110 /* 111 * traditional input/output functions 112 */ 113 114 static inline u8 inb(unsigned long addr) 115 { 116 return readb(addr + PCI_IOBASE); 117 } 118 119 static inline u16 inw(unsigned long addr) 120 { 121 return readw(addr + PCI_IOBASE); 122 } 123 124 static inline u32 inl(unsigned long addr) 125 { 126 return readl(addr + PCI_IOBASE); 127 } 128 129 static inline void outb(u8 b, unsigned long addr) 130 { 131 writeb(b, addr + PCI_IOBASE); 132 } 133 134 static inline void outw(u16 b, unsigned long addr) 135 { 136 writew(b, addr + PCI_IOBASE); 137 } 138 139 static inline void outl(u32 b, unsigned long addr) 140 { 141 writel(b, addr + PCI_IOBASE); 142 } 143 144 #define inb_p(addr) inb(addr) 145 #define inw_p(addr) inw(addr) 146 #define inl_p(addr) inl(addr) 147 #define outb_p(x, addr) outb((x), (addr)) 148 #define outw_p(x, addr) outw((x), (addr)) 149 #define outl_p(x, addr) outl((x), (addr)) 150 151 #ifndef insb 152 static inline void insb(unsigned long addr, void *buffer, int count) 153 { 154 if (count) { 155 u8 *buf = buffer; 156 do { 157 u8 x = __raw_readb(addr + PCI_IOBASE); 158 *buf++ = x; 159 } while (--count); 160 } 161 } 162 #endif 163 164 #ifndef insw 165 static inline void insw(unsigned long addr, void *buffer, int count) 166 { 167 if (count) { 168 u16 *buf = buffer; 169 do { 170 u16 x = __raw_readw(addr + PCI_IOBASE); 171 *buf++ = x; 172 } while (--count); 173 } 174 } 175 #endif 176 177 #ifndef insl 178 static inline void insl(unsigned long addr, void *buffer, int count) 179 { 180 if (count) { 181 u32 *buf = buffer; 182 do { 183 u32 x = __raw_readl(addr + PCI_IOBASE); 184 *buf++ = x; 185 } while (--count); 186 } 187 } 188 #endif 189 190 #ifndef outsb 191 static inline void outsb(unsigned long addr, const void *buffer, int count) 192 { 193 if (count) { 194 const u8 *buf = buffer; 195 do { 196 __raw_writeb(*buf++, addr + PCI_IOBASE); 197 } while (--count); 198 } 199 } 200 #endif 201 202 #ifndef outsw 203 static inline void outsw(unsigned long addr, const void *buffer, int count) 204 { 205 if (count) { 206 const u16 *buf = buffer; 207 do { 208 __raw_writew(*buf++, addr + PCI_IOBASE); 209 } while (--count); 210 } 211 } 212 #endif 213 214 #ifndef outsl 215 static inline void outsl(unsigned long addr, const void *buffer, int count) 216 { 217 if (count) { 218 const u32 *buf = buffer; 219 do { 220 __raw_writel(*buf++, addr + PCI_IOBASE); 221 } while (--count); 222 } 223 } 224 #endif 225 226 static inline void readsl(const void __iomem *addr, void *buf, int len) 227 { 228 insl(addr - PCI_IOBASE, buf, len); 229 } 230 231 static inline void readsw(const void __iomem *addr, void *buf, int len) 232 { 233 insw(addr - PCI_IOBASE, buf, len); 234 } 235 236 static inline void readsb(const void __iomem *addr, void *buf, int len) 237 { 238 insb(addr - PCI_IOBASE, buf, len); 239 } 240 241 static inline void writesl(const void __iomem *addr, const void *buf, int len) 242 { 243 outsl(addr - PCI_IOBASE, buf, len); 244 } 245 246 static inline void writesw(const void __iomem *addr, const void *buf, int len) 247 { 248 outsw(addr - PCI_IOBASE, buf, len); 249 } 250 251 static inline void writesb(const void __iomem *addr, const void *buf, int len) 252 { 253 outsb(addr - PCI_IOBASE, buf, len); 254 } 255 256 #ifndef CONFIG_GENERIC_IOMAP 257 #define ioread8(addr) readb(addr) 258 #define ioread16(addr) readw(addr) 259 #define ioread16be(addr) be16_to_cpu(ioread16(addr)) 260 #define ioread32(addr) readl(addr) 261 #define ioread32be(addr) be32_to_cpu(ioread32(addr)) 262 263 #define iowrite8(v, addr) writeb((v), (addr)) 264 #define iowrite16(v, addr) writew((v), (addr)) 265 #define iowrite16be(v, addr) iowrite16(be16_to_cpu(v), (addr)) 266 #define iowrite32(v, addr) writel((v), (addr)) 267 #define iowrite32be(v, addr) iowrite32(be32_to_cpu(v), (addr)) 268 269 #define ioread8_rep(p, dst, count) \ 270 insb((unsigned long) (p), (dst), (count)) 271 #define ioread16_rep(p, dst, count) \ 272 insw((unsigned long) (p), (dst), (count)) 273 #define ioread32_rep(p, dst, count) \ 274 insl((unsigned long) (p), (dst), (count)) 275 276 #define iowrite8_rep(p, src, count) \ 277 outsb((unsigned long) (p), (src), (count)) 278 #define iowrite16_rep(p, src, count) \ 279 outsw((unsigned long) (p), (src), (count)) 280 #define iowrite32_rep(p, src, count) \ 281 outsl((unsigned long) (p), (src), (count)) 282 #endif /* CONFIG_GENERIC_IOMAP */ 283 284 #ifndef IO_SPACE_LIMIT 285 #define IO_SPACE_LIMIT 0xffff 286 #endif 287 288 #ifdef __KERNEL__ 289 290 #include <linux/vmalloc.h> 291 #define __io_virt(x) ((void __force *) (x)) 292 293 #ifndef CONFIG_GENERIC_IOMAP 294 struct pci_dev; 295 extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); 296 297 #ifndef pci_iounmap 298 static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p) 299 { 300 } 301 #endif 302 #endif /* CONFIG_GENERIC_IOMAP */ 303 304 /* 305 * Change virtual addresses to physical addresses and vv. 306 * These are pretty trivial 307 */ 308 #ifndef virt_to_phys 309 static inline unsigned long virt_to_phys(volatile void *address) 310 { 311 return __pa((unsigned long)address); 312 } 313 314 static inline void *phys_to_virt(unsigned long address) 315 { 316 return __va(address); 317 } 318 #endif 319 320 /* 321 * Change "struct page" to physical address. 322 * 323 * This implementation is for the no-MMU case only... if you have an MMU 324 * you'll need to provide your own definitions. 325 */ 326 #ifndef CONFIG_MMU 327 static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size) 328 { 329 return (void __iomem*) (unsigned long)offset; 330 } 331 332 #define __ioremap(offset, size, flags) ioremap(offset, size) 333 334 #ifndef ioremap_nocache 335 #define ioremap_nocache ioremap 336 #endif 337 338 #ifndef ioremap_wc 339 #define ioremap_wc ioremap_nocache 340 #endif 341 342 static inline void iounmap(void __iomem *addr) 343 { 344 } 345 #endif /* CONFIG_MMU */ 346 347 #ifdef CONFIG_HAS_IOPORT 348 #ifndef CONFIG_GENERIC_IOMAP 349 static inline void __iomem *ioport_map(unsigned long port, unsigned int nr) 350 { 351 return (void __iomem *) port; 352 } 353 354 static inline void ioport_unmap(void __iomem *p) 355 { 356 } 357 #else /* CONFIG_GENERIC_IOMAP */ 358 extern void __iomem *ioport_map(unsigned long port, unsigned int nr); 359 extern void ioport_unmap(void __iomem *p); 360 #endif /* CONFIG_GENERIC_IOMAP */ 361 #endif /* CONFIG_HAS_IOPORT */ 362 363 #define xlate_dev_kmem_ptr(p) p 364 #define xlate_dev_mem_ptr(p) __va(p) 365 366 #ifndef virt_to_bus 367 static inline unsigned long virt_to_bus(volatile void *address) 368 { 369 return ((unsigned long) address); 370 } 371 372 static inline void *bus_to_virt(unsigned long address) 373 { 374 return (void *) address; 375 } 376 #endif 377 378 #ifndef memset_io 379 #define memset_io(a, b, c) memset(__io_virt(a), (b), (c)) 380 #endif 381 382 #ifndef memcpy_fromio 383 #define memcpy_fromio(a, b, c) memcpy((a), __io_virt(b), (c)) 384 #endif 385 #ifndef memcpy_toio 386 #define memcpy_toio(a, b, c) memcpy(__io_virt(a), (b), (c)) 387 #endif 388 389 #endif /* __KERNEL__ */ 390 391 #endif /* __ASM_GENERIC_IO_H */ 392