xref: /linux/include/acpi/actbl2.h (revision f3d9478b2ce468c3115b02ecae7e975990697f15)
1 /******************************************************************************
2  *
3  * Name: actbl2.h - ACPI Specification Revision 2.0 Tables
4  *
5  *****************************************************************************/
6 
7 /*
8  * Copyright (C) 2000 - 2006, R. Byron Moore
9  * All rights reserved.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions, and the following disclaimer,
16  *    without modification.
17  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
18  *    substantially similar to the "NO WARRANTY" disclaimer below
19  *    ("Disclaimer") and any redistribution must be conditioned upon
20  *    including a substantially similar Disclaimer requirement for further
21  *    binary redistribution.
22  * 3. Neither the names of the above-listed copyright holders nor the names
23  *    of any contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * Alternatively, this software may be distributed under the terms of the
27  * GNU General Public License ("GPL") version 2 as published by the Free
28  * Software Foundation.
29  *
30  * NO WARRANTY
31  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
32  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
33  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
34  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
35  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
39  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
40  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
41  * POSSIBILITY OF SUCH DAMAGES.
42  */
43 
44 #ifndef __ACTBL2_H__
45 #define __ACTBL2_H__
46 
47 /*
48  * Prefered Power Management Profiles
49  */
50 #define PM_UNSPECIFIED                  0
51 #define PM_DESKTOP                      1
52 #define PM_MOBILE                       2
53 #define PM_WORKSTATION                  3
54 #define PM_ENTERPRISE_SERVER            4
55 #define PM_SOHO_SERVER                  5
56 #define PM_APPLIANCE_PC                 6
57 
58 /*
59  * ACPI Boot Arch Flags
60  */
61 #define BAF_LEGACY_DEVICES              0x0001
62 #define BAF_8042_KEYBOARD_CONTROLLER    0x0002
63 
64 #define FADT2_REVISION_ID               3
65 #define FADT2_MINUS_REVISION_ID         2
66 
67 #pragma pack(1)
68 
69 /*
70  * ACPI 2.0 Root System Description Table (RSDT)
71  */
72 struct rsdt_descriptor_rev2 {
73 	ACPI_TABLE_HEADER_DEF	/* ACPI common table header */
74 	u32 table_offset_entry[1];	/* Array of pointers to ACPI tables */
75 };
76 
77 /*
78  * ACPI 2.0 Extended System Description Table (XSDT)
79  */
80 struct xsdt_descriptor_rev2 {
81 	ACPI_TABLE_HEADER_DEF	/* ACPI common table header */
82 	u64 table_offset_entry[1];	/* Array of pointers to ACPI tables */
83 };
84 
85 /*
86  * ACPI 2.0 Firmware ACPI Control Structure (FACS)
87  */
88 struct facs_descriptor_rev2 {
89 	char signature[4];	/* ASCII table signature */
90 	u32 length;		/* Length of structure, in bytes */
91 	u32 hardware_signature;	/* Hardware configuration signature */
92 	u32 firmware_waking_vector;	/* 32-bit physical address of the Firmware Waking Vector. */
93 	u32 global_lock;	/* Global Lock used to synchronize access to shared hardware resources */
94 
95 	/* Flags (32 bits) */
96 
97 	u8 S4bios_f:1;		/* 00:    S4BIOS support is present */
98 	 u8:7;			/* 01-07: Reserved, must be zero */
99 	u8 reserved1[3];	/* 08-31: Reserved, must be zero */
100 
101 	u64 xfirmware_waking_vector;	/* 64-bit physical address of the Firmware Waking Vector. */
102 	u8 version;		/* Version of this table */
103 	u8 reserved3[31];	/* Reserved, must be zero */
104 };
105 
106 /*
107  * ACPI 2.0+ Generic Address Structure (GAS)
108  */
109 struct acpi_generic_address {
110 	u8 address_space_id;	/* Address space where struct or register exists. */
111 	u8 register_bit_width;	/* Size in bits of given register */
112 	u8 register_bit_offset;	/* Bit offset within the register */
113 	u8 access_width;	/* Minimum Access size (ACPI 3.0) */
114 	u64 address;		/* 64-bit address of struct or register */
115 };
116 
117 #define FADT_REV2_COMMON \
118 	u32                             V1_firmware_ctrl;   /* 32-bit physical address of FACS */ \
119 	u32                             V1_dsdt;            /* 32-bit physical address of DSDT */ \
120 	u8                              reserved1;          /* System Interrupt Model isn't used in ACPI 2.0*/ \
121 	u8                              prefer_PM_profile;  /* Conveys preferred power management profile to OSPM. */ \
122 	u16                             sci_int;            /* System vector of SCI interrupt */ \
123 	u32                             smi_cmd;            /* Port address of SMI command port */ \
124 	u8                              acpi_enable;        /* Value to write to smi_cmd to enable ACPI */ \
125 	u8                              acpi_disable;       /* Value to write to smi_cmd to disable ACPI */ \
126 	u8                              S4bios_req;         /* Value to write to SMI CMD to enter S4BIOS state */ \
127 	u8                              pstate_cnt;         /* Processor performance state control*/ \
128 	u32                             V1_pm1a_evt_blk;    /* Port address of Power Mgt 1a acpi_event Reg Blk */ \
129 	u32                             V1_pm1b_evt_blk;    /* Port address of Power Mgt 1b acpi_event Reg Blk */ \
130 	u32                             V1_pm1a_cnt_blk;    /* Port address of Power Mgt 1a Control Reg Blk */ \
131 	u32                             V1_pm1b_cnt_blk;    /* Port address of Power Mgt 1b Control Reg Blk */ \
132 	u32                             V1_pm2_cnt_blk;     /* Port address of Power Mgt 2 Control Reg Blk */ \
133 	u32                             V1_pm_tmr_blk;      /* Port address of Power Mgt Timer Ctrl Reg Blk */ \
134 	u32                             V1_gpe0_blk;        /* Port addr of General Purpose acpi_event 0 Reg Blk */ \
135 	u32                             V1_gpe1_blk;        /* Port addr of General Purpose acpi_event 1 Reg Blk */ \
136 	u8                              pm1_evt_len;        /* Byte length of ports at pm1_x_evt_blk */ \
137 	u8                              pm1_cnt_len;        /* Byte length of ports at pm1_x_cnt_blk */ \
138 	u8                              pm2_cnt_len;        /* Byte Length of ports at pm2_cnt_blk */ \
139 	u8                              pm_tm_len;          /* Byte Length of ports at pm_tm_blk */ \
140 	u8                              gpe0_blk_len;       /* Byte Length of ports at gpe0_blk */ \
141 	u8                              gpe1_blk_len;       /* Byte Length of ports at gpe1_blk */ \
142 	u8                              gpe1_base;          /* Offset in gpe model where gpe1 events start */ \
143 	u8                              cst_cnt;            /* Support for the _CST object and C States change notification.*/ \
144 	u16                             plvl2_lat;          /* Worst case HW latency to enter/exit C2 state */ \
145 	u16                             plvl3_lat;          /* Worst case HW latency to enter/exit C3 state */ \
146 	u16                             flush_size;         /* Number of flush strides that need to be read */ \
147 	u16                             flush_stride;       /* Processor's memory cache line width, in bytes */ \
148 	u8                              duty_offset;        /* Processor's duty cycle index in processor's P_CNT reg*/ \
149 	u8                              duty_width;         /* Processor's duty cycle value bit width in P_CNT register.*/ \
150 	u8                              day_alrm;           /* Index to day-of-month alarm in RTC CMOS RAM */ \
151 	u8                              mon_alrm;           /* Index to month-of-year alarm in RTC CMOS RAM */ \
152 	u8                              century;            /* Index to century in RTC CMOS RAM */ \
153 	u16                             iapc_boot_arch;     /* IA-PC Boot Architecture Flags. See Table 5-10 for description*/
154 
155 /*
156  * ACPI 2.0+ Fixed ACPI Description Table (FADT)
157  */
158 struct fadt_descriptor_rev2 {
159 	ACPI_TABLE_HEADER_DEF	/* ACPI common table header */
160 	FADT_REV2_COMMON u8 reserved2;	/* Reserved, must be zero */
161 
162 	/* Flags (32 bits) */
163 
164 	u8 wb_invd:1;		/* 00:    The wbinvd instruction works properly */
165 	u8 wb_invd_flush:1;	/* 01:    The wbinvd flushes but does not invalidate */
166 	u8 proc_c1:1;		/* 02:    All processors support C1 state */
167 	u8 plvl2_up:1;		/* 03:    C2 state works on MP system */
168 	u8 pwr_button:1;	/* 04:    Power button is handled as a generic feature */
169 	u8 sleep_button:1;	/* 05:    Sleep button is handled as a generic feature, or not present */
170 	u8 fixed_rTC:1;		/* 06:    RTC wakeup stat not in fixed register space */
171 	u8 rtcs4:1;		/* 07:    RTC wakeup stat not possible from S4 */
172 	u8 tmr_val_ext:1;	/* 08:    tmr_val is 32 bits 0=24-bits */
173 	u8 dock_cap:1;		/* 09:    Docking supported */
174 	u8 reset_reg_sup:1;	/* 10:    System reset via the FADT RESET_REG supported */
175 	u8 sealed_case:1;	/* 11:    No internal expansion capabilities and case is sealed */
176 	u8 headless:1;		/* 12:    No local video capabilities or local input devices */
177 	u8 cpu_sw_sleep:1;	/* 13:    Must execute native instruction after writing SLP_TYPx register */
178 
179 	u8 pci_exp_wak:1;	/* 14:    System supports PCIEXP_WAKE (STS/EN) bits (ACPI 3.0) */
180 	u8 use_platform_clock:1;	/* 15:    OSPM should use platform-provided timer (ACPI 3.0) */
181 	u8 S4rtc_sts_valid:1;	/* 16:    Contents of RTC_STS valid after S4 wake (ACPI 3.0) */
182 	u8 remote_power_on_capable:1;	/* 17:    System is compatible with remote power on (ACPI 3.0) */
183 	u8 force_apic_cluster_model:1;	/* 18:    All local APICs must use cluster model (ACPI 3.0) */
184 	u8 force_apic_physical_destination_mode:1;	/* 19:   all local x_aPICs must use physical dest mode (ACPI 3.0) */
185 	 u8:4;			/* 20-23: Reserved, must be zero */
186 	u8 reserved3;		/* 24-31: Reserved, must be zero */
187 
188 	struct acpi_generic_address reset_register;	/* Reset register address in GAS format */
189 	u8 reset_value;		/* Value to write to the reset_register port to reset the system */
190 	u8 reserved4[3];	/* These three bytes must be zero */
191 	u64 xfirmware_ctrl;	/* 64-bit physical address of FACS */
192 	u64 Xdsdt;		/* 64-bit physical address of DSDT */
193 	struct acpi_generic_address xpm1a_evt_blk;	/* Extended Power Mgt 1a acpi_event Reg Blk address */
194 	struct acpi_generic_address xpm1b_evt_blk;	/* Extended Power Mgt 1b acpi_event Reg Blk address */
195 	struct acpi_generic_address xpm1a_cnt_blk;	/* Extended Power Mgt 1a Control Reg Blk address */
196 	struct acpi_generic_address xpm1b_cnt_blk;	/* Extended Power Mgt 1b Control Reg Blk address */
197 	struct acpi_generic_address xpm2_cnt_blk;	/* Extended Power Mgt 2 Control Reg Blk address */
198 	struct acpi_generic_address xpm_tmr_blk;	/* Extended Power Mgt Timer Ctrl Reg Blk address */
199 	struct acpi_generic_address xgpe0_blk;	/* Extended General Purpose acpi_event 0 Reg Blk address */
200 	struct acpi_generic_address xgpe1_blk;	/* Extended General Purpose acpi_event 1 Reg Blk address */
201 };
202 
203 /* "Down-revved" ACPI 2.0 FADT descriptor */
204 
205 struct fadt_descriptor_rev2_minus {
206 	ACPI_TABLE_HEADER_DEF	/* ACPI common table header */
207 	FADT_REV2_COMMON u8 reserved2;	/* Reserved, must be zero */
208 	u32 flags;
209 	struct acpi_generic_address reset_register;	/* Reset register address in GAS format */
210 	u8 reset_value;		/* Value to write to the reset_register port to reset the system. */
211 	u8 reserved7[3];	/* Reserved, must be zero */
212 };
213 
214 /* ECDT - Embedded Controller Boot Resources Table */
215 
216 struct ec_boot_resources {
217 	ACPI_TABLE_HEADER_DEF struct acpi_generic_address ec_control;	/* Address of EC command/status register */
218 	struct acpi_generic_address ec_data;	/* Address of EC data register */
219 	u32 uid;		/* Unique ID - must be same as the EC _UID method */
220 	u8 gpe_bit;		/* The GPE for the EC */
221 	u8 ec_id[1];		/* Full namepath of the EC in the ACPI namespace */
222 };
223 
224 /* SRAT - System Resource Affinity Table */
225 
226 struct static_resource_alloc {
227 	u8 type;
228 	u8 length;
229 	u8 proximity_domain_lo;
230 	u8 apic_id;
231 
232 	/* Flags (32 bits) */
233 
234 	u8 enabled:1;		/* 00:    Use affinity structure */
235 	 u8:7;			/* 01-07: Reserved, must be zero */
236 	u8 reserved3[3];	/* 08-31: Reserved, must be zero */
237 
238 	u8 local_sapic_eid;
239 	u8 proximity_domain_hi[3];
240 	u32 reserved4;		/* Reserved, must be zero */
241 };
242 
243 struct memory_affinity {
244 	u8 type;
245 	u8 length;
246 	u32 proximity_domain;
247 	u16 reserved3;
248 	u64 base_address;
249 	u64 address_length;
250 	u32 reserved4;
251 
252 	/* Flags (32 bits) */
253 
254 	u8 enabled:1;		/* 00:    Use affinity structure */
255 	u8 hot_pluggable:1;	/* 01:    Memory region is hot pluggable */
256 	u8 non_volatile:1;	/* 02:    Memory is non-volatile */
257 	 u8:5;			/* 03-07: Reserved, must be zero */
258 	u8 reserved5[3];	/* 08-31: Reserved, must be zero */
259 
260 	u64 reserved6;		/* Reserved, must be zero */
261 };
262 
263 struct system_resource_affinity {
264 	ACPI_TABLE_HEADER_DEF u32 reserved1;	/* Must be value '1' */
265 	u64 reserved2;		/* Reserved, must be zero */
266 };
267 
268 /* SLIT - System Locality Distance Information Table */
269 
270 struct system_locality_info {
271 	ACPI_TABLE_HEADER_DEF u64 locality_count;
272 	u8 entry[1][1];
273 };
274 
275 #pragma pack()
276 
277 #endif				/* __ACTBL2_H__ */
278