1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 5 * 6 * Copyright (C) 2000 - 2023, Intel Corp. 7 * 8 *****************************************************************************/ 9 10 #ifndef __ACTBL2_H__ 11 #define __ACTBL2_H__ 12 13 /******************************************************************************* 14 * 15 * Additional ACPI Tables (2) 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22 /* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 28 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 29 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 30 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 31 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 32 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 33 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 34 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 35 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 36 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 37 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 38 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */ 39 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 40 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 41 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 42 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 43 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 44 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 45 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 46 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 47 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 48 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 49 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 50 #define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */ 51 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 52 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 53 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 54 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 55 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 56 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 57 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 58 59 /* 60 * All tables must be byte-packed to match the ACPI specification, since 61 * the tables are provided by the system BIOS. 62 */ 63 #pragma pack(1) 64 65 /* 66 * Note: C bitfields are not used for this reason: 67 * 68 * "Bitfields are great and easy to read, but unfortunately the C language 69 * does not specify the layout of bitfields in memory, which means they are 70 * essentially useless for dealing with packed data in on-disk formats or 71 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 72 * this decision was a design error in C. Ritchie could have picked an order 73 * and stuck with it." Norman Ramsey. 74 * See http://stackoverflow.com/a/1053662/41661 75 */ 76 77 /******************************************************************************* 78 * 79 * AEST - Arm Error Source Table 80 * 81 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1(Sep 2020) and 82 * 2.0(May 2023) Platform Design Document. 83 * 84 ******************************************************************************/ 85 86 struct acpi_table_aest { 87 struct acpi_table_header header; 88 }; 89 90 /* Common Subtable header - one per Node Structure (Subtable) */ 91 92 struct acpi_aest_hdr { 93 u8 type; 94 u16 length; 95 u8 reserved; 96 u32 node_specific_offset; 97 u32 node_interface_offset; 98 u32 node_interrupt_offset; 99 u32 node_interrupt_count; 100 u64 timestamp_rate; 101 u64 reserved1; 102 u64 error_injection_rate; 103 }; 104 105 /* Values for Type above */ 106 107 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 108 #define ACPI_AEST_MEMORY_ERROR_NODE 1 109 #define ACPI_AEST_SMMU_ERROR_NODE 2 110 #define ACPI_AEST_VENDOR_ERROR_NODE 3 111 #define ACPI_AEST_GIC_ERROR_NODE 4 112 #define ACPI_AEST_PCIE_ERROR_NODE 5 113 #define ACPI_AEST_PROXY_ERROR_NODE 6 114 #define ACPI_AEST_NODE_TYPE_RESERVED 7 /* 7 and above are reserved */ 115 116 /* 117 * AEST subtables (Error nodes) 118 */ 119 120 /* 0: Processor Error */ 121 122 typedef struct acpi_aest_processor { 123 u32 processor_id; 124 u8 resource_type; 125 u8 reserved; 126 u8 flags; 127 u8 revision; 128 u64 processor_affinity; 129 130 } acpi_aest_processor; 131 132 /* Values for resource_type above, related structs below */ 133 134 #define ACPI_AEST_CACHE_RESOURCE 0 135 #define ACPI_AEST_TLB_RESOURCE 1 136 #define ACPI_AEST_GENERIC_RESOURCE 2 137 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 138 139 /* 0R: Processor Cache Resource Substructure */ 140 141 typedef struct acpi_aest_processor_cache { 142 u32 cache_reference; 143 u32 reserved; 144 145 } acpi_aest_processor_cache; 146 147 /* Values for cache_type above */ 148 149 #define ACPI_AEST_CACHE_DATA 0 150 #define ACPI_AEST_CACHE_INSTRUCTION 1 151 #define ACPI_AEST_CACHE_UNIFIED 2 152 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 153 154 /* 1R: Processor TLB Resource Substructure */ 155 156 typedef struct acpi_aest_processor_tlb { 157 u32 tlb_level; 158 u32 reserved; 159 160 } acpi_aest_processor_tlb; 161 162 /* 2R: Processor Generic Resource Substructure */ 163 164 typedef struct acpi_aest_processor_generic { 165 u32 resource; 166 167 } acpi_aest_processor_generic; 168 169 /* 1: Memory Error */ 170 171 typedef struct acpi_aest_memory { 172 u32 srat_proximity_domain; 173 174 } acpi_aest_memory; 175 176 /* 2: Smmu Error */ 177 178 typedef struct acpi_aest_smmu { 179 u32 iort_node_reference; 180 u32 subcomponent_reference; 181 182 } acpi_aest_smmu; 183 184 /* 3: Vendor Defined */ 185 186 typedef struct acpi_aest_vendor { 187 u32 acpi_hid; 188 u32 acpi_uid; 189 u8 vendor_specific_data[16]; 190 191 } acpi_aest_vendor; 192 193 struct acpi_aest_vendor_v2 { 194 char acpi_hid[8]; 195 u32 acpi_uid; 196 u8 vendor_specific_data[16]; 197 }; 198 199 /* 4: Gic Error */ 200 201 typedef struct acpi_aest_gic { 202 u32 interface_type; 203 u32 instance_id; 204 205 } acpi_aest_gic; 206 207 /* Values for interface_type above */ 208 209 #define ACPI_AEST_GIC_CPU 0 210 #define ACPI_AEST_GIC_DISTRIBUTOR 1 211 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 212 #define ACPI_AEST_GIC_ITS 3 213 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 214 215 /* 5: PCIe Error */ 216 217 struct acpi_aest_pcie { 218 u32 iort_node_reference; 219 }; 220 221 /* 6: Proxy Error */ 222 223 struct acpi_aest_proxy { 224 u64 node_address; 225 }; 226 227 /* Node Interface Structure */ 228 229 typedef struct acpi_aest_node_interface { 230 u8 type; 231 u8 reserved[3]; 232 u32 flags; 233 u64 address; 234 u32 error_record_index; 235 u32 error_record_count; 236 u64 error_record_implemented; 237 u64 error_status_reporting; 238 u64 addressing_mode; 239 240 } acpi_aest_node_interface; 241 242 /* Node Interface Structure V2 */ 243 244 struct acpi_aest_node_interface_header { 245 u8 type; 246 u8 group_format; 247 u8 reserved[2]; 248 u32 flags; 249 u64 address; 250 u32 error_record_index; 251 u32 error_record_count; 252 }; 253 254 #define ACPI_AEST_NODE_GROUP_FORMAT_4K 0 255 #define ACPI_AEST_NODE_GROUP_FORMAT_16K 1 256 #define ACPI_AEST_NODE_GROUP_FORMAT_64K 2 257 258 struct acpi_aest_node_interface_common { 259 u32 error_node_device; 260 u32 processor_affinity; 261 u64 error_group_register_base; 262 u64 fault_inject_register_base; 263 u64 interrupt_config_register_base; 264 }; 265 266 struct acpi_aest_node_interface_4k { 267 u64 error_record_implemented; 268 u64 error_status_reporting; 269 u64 addressing_mode; 270 struct acpi_aest_node_interface_common common; 271 }; 272 273 struct acpi_aest_node_interface_16k { 274 u64 error_record_implemented[4]; 275 u64 error_status_reporting[4]; 276 u64 addressing_mode[4]; 277 struct acpi_aest_node_interface_common common; 278 }; 279 280 struct acpi_aest_node_interface_64k { 281 u64 error_record_implemented[14]; 282 u64 error_status_reporting[14]; 283 u64 addressing_mode[14]; 284 struct acpi_aest_node_interface_common common; 285 }; 286 287 /* Values for Type field above */ 288 289 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 290 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 291 #define ACPI_AEST_NODE_SINGLE_RECORD_MEMORY_MAPPED 2 292 #define ACPI_AEST_XFACE_RESERVED 3 /* 2 and above are reserved */ 293 294 /* Node Interrupt Structure */ 295 296 typedef struct acpi_aest_node_interrupt { 297 u8 type; 298 u8 reserved[2]; 299 u8 flags; 300 u32 gsiv; 301 u8 iort_id; 302 u8 reserved1[3]; 303 304 } acpi_aest_node_interrupt; 305 306 /* Node Interrupt Structure V2 */ 307 308 struct acpi_aest_node_interrupt_v2 { 309 u8 type; 310 u8 reserved[2]; 311 u8 flags; 312 u32 gsiv; 313 u8 reserved1[4]; 314 }; 315 316 /* Values for Type field above */ 317 318 #define ACPI_AEST_NODE_FAULT_HANDLING 0 319 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 320 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 321 322 /******************************************************************************* 323 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 324 * 325 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 326 * ARM DEN0093 v1.1 327 * 328 ******************************************************************************/ 329 struct acpi_table_agdi { 330 struct acpi_table_header header; /* Common ACPI table header */ 331 u8 flags; 332 u8 reserved[3]; 333 u32 sdei_event; 334 u32 gsiv; 335 }; 336 337 /* Mask for Flags field above */ 338 339 #define ACPI_AGDI_SIGNALING_MODE (1) 340 341 /******************************************************************************* 342 * 343 * APMT - ARM Performance Monitoring Unit Table 344 * 345 * Conforms to: 346 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 347 * ARM DEN0117 v1.0 November 25, 2021 348 * 349 ******************************************************************************/ 350 351 struct acpi_table_apmt { 352 struct acpi_table_header header; /* Common ACPI table header */ 353 }; 354 355 #define ACPI_APMT_NODE_ID_LENGTH 4 356 357 /* 358 * APMT subtables 359 */ 360 struct acpi_apmt_node { 361 u16 length; 362 u8 flags; 363 u8 type; 364 u32 id; 365 u64 inst_primary; 366 u32 inst_secondary; 367 u64 base_address0; 368 u64 base_address1; 369 u32 ovflw_irq; 370 u32 reserved; 371 u32 ovflw_irq_flags; 372 u32 proc_affinity; 373 u32 impl_id; 374 }; 375 376 /* Masks for Flags field above */ 377 378 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 379 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 380 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 381 382 /* Values for Flags dual page field above */ 383 384 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 385 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 386 387 /* Values for Flags processor affinity field above */ 388 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 389 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 390 391 /* Values for Flags 64-bit atomic field above */ 392 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 393 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 394 395 /* Values for Type field above */ 396 397 enum acpi_apmt_node_type { 398 ACPI_APMT_NODE_TYPE_MC = 0x00, 399 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 400 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 401 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 402 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 403 ACPI_APMT_NODE_TYPE_COUNT 404 }; 405 406 /* Masks for ovflw_irq_flags field above */ 407 408 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 409 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 410 411 /* Values for ovflw_irq_flags mode field above */ 412 413 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 414 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 415 416 /* Values for ovflw_irq_flags type field above */ 417 418 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 419 420 /******************************************************************************* 421 * 422 * BDAT - BIOS Data ACPI Table 423 * 424 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 425 * Nov 2020 426 * 427 ******************************************************************************/ 428 429 struct acpi_table_bdat { 430 struct acpi_table_header header; 431 struct acpi_generic_address gas; 432 }; 433 434 /******************************************************************************* 435 * 436 * CCEL - CC-Event Log 437 * From: "Guest-Host-Communication Interface (GHCI) for Intel 438 * Trust Domain Extensions (Intel TDX)". Feb 2022 439 * 440 ******************************************************************************/ 441 442 struct acpi_table_ccel { 443 struct acpi_table_header header; /* Common ACPI table header */ 444 u8 CCtype; 445 u8 Ccsub_type; 446 u16 reserved; 447 u64 log_area_minimum_length; 448 u64 log_area_start_address; 449 }; 450 451 /******************************************************************************* 452 * 453 * IORT - IO Remapping Table 454 * 455 * Conforms to "IO Remapping Table System Software on ARM Platforms", 456 * Document number: ARM DEN 0049E.e, Sep 2022 457 * 458 ******************************************************************************/ 459 460 struct acpi_table_iort { 461 struct acpi_table_header header; 462 u32 node_count; 463 u32 node_offset; 464 u32 reserved; 465 }; 466 467 /* 468 * IORT subtables 469 */ 470 struct acpi_iort_node { 471 u8 type; 472 u16 length; 473 u8 revision; 474 u32 identifier; 475 u32 mapping_count; 476 u32 mapping_offset; 477 char node_data[]; 478 }; 479 480 /* Values for subtable Type above */ 481 482 enum acpi_iort_node_type { 483 ACPI_IORT_NODE_ITS_GROUP = 0x00, 484 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 485 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 486 ACPI_IORT_NODE_SMMU = 0x03, 487 ACPI_IORT_NODE_SMMU_V3 = 0x04, 488 ACPI_IORT_NODE_PMCG = 0x05, 489 ACPI_IORT_NODE_RMR = 0x06, 490 }; 491 492 struct acpi_iort_id_mapping { 493 u32 input_base; /* Lowest value in input range */ 494 u32 id_count; /* Number of IDs */ 495 u32 output_base; /* Lowest value in output range */ 496 u32 output_reference; /* A reference to the output node */ 497 u32 flags; 498 }; 499 500 /* Masks for Flags field above for IORT subtable */ 501 502 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 503 504 struct acpi_iort_memory_access { 505 u32 cache_coherency; 506 u8 hints; 507 u16 reserved; 508 u8 memory_flags; 509 }; 510 511 /* Values for cache_coherency field above */ 512 513 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 514 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 515 516 /* Masks for Hints field above */ 517 518 #define ACPI_IORT_HT_TRANSIENT (1) 519 #define ACPI_IORT_HT_WRITE (1<<1) 520 #define ACPI_IORT_HT_READ (1<<2) 521 #define ACPI_IORT_HT_OVERRIDE (1<<3) 522 523 /* Masks for memory_flags field above */ 524 525 #define ACPI_IORT_MF_COHERENCY (1) 526 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 527 528 /* 529 * IORT node specific subtables 530 */ 531 struct acpi_iort_its_group { 532 u32 its_count; 533 u32 identifiers[]; /* GIC ITS identifier array */ 534 }; 535 536 struct acpi_iort_named_component { 537 u32 node_flags; 538 u64 memory_properties; /* Memory access properties */ 539 u8 memory_address_limit; /* Memory address size limit */ 540 char device_name[]; /* Path of namespace object */ 541 }; 542 543 /* Masks for Flags field above */ 544 545 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 546 #define ACPI_IORT_NC_PASID_BITS (31<<1) 547 548 struct acpi_iort_root_complex { 549 u64 memory_properties; /* Memory access properties */ 550 u32 ats_attribute; 551 u32 pci_segment_number; 552 u8 memory_address_limit; /* Memory address size limit */ 553 u16 pasid_capabilities; /* PASID Capabilities */ 554 u8 reserved[]; /* Reserved, must be zero */ 555 }; 556 557 /* Masks for ats_attribute field above */ 558 559 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 560 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 561 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 562 563 /* Masks for pasid_capabilities field above */ 564 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 565 566 struct acpi_iort_smmu { 567 u64 base_address; /* SMMU base address */ 568 u64 span; /* Length of memory range */ 569 u32 model; 570 u32 flags; 571 u32 global_interrupt_offset; 572 u32 context_interrupt_count; 573 u32 context_interrupt_offset; 574 u32 pmu_interrupt_count; 575 u32 pmu_interrupt_offset; 576 u64 interrupts[]; /* Interrupt array */ 577 }; 578 579 /* Values for Model field above */ 580 581 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 582 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 583 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 584 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 585 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 586 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */ 587 588 /* Masks for Flags field above */ 589 590 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 591 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 592 593 /* Global interrupt format */ 594 595 struct acpi_iort_smmu_gsi { 596 u32 nsg_irpt; 597 u32 nsg_irpt_flags; 598 u32 nsg_cfg_irpt; 599 u32 nsg_cfg_irpt_flags; 600 }; 601 602 struct acpi_iort_smmu_v3 { 603 u64 base_address; /* SMMUv3 base address */ 604 u32 flags; 605 u32 reserved; 606 u64 vatos_address; 607 u32 model; 608 u32 event_gsiv; 609 u32 pri_gsiv; 610 u32 gerr_gsiv; 611 u32 sync_gsiv; 612 u32 pxm; 613 u32 id_mapping_index; 614 }; 615 616 /* Values for Model field above */ 617 618 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 619 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */ 620 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 621 622 /* Masks for Flags field above */ 623 624 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 625 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 626 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 627 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 628 629 struct acpi_iort_pmcg { 630 u64 page0_base_address; 631 u32 overflow_gsiv; 632 u32 node_reference; 633 u64 page1_base_address; 634 }; 635 636 struct acpi_iort_rmr { 637 u32 flags; 638 u32 rmr_count; 639 u32 rmr_offset; 640 }; 641 642 /* Masks for Flags field above */ 643 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 644 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 645 646 /* 647 * Macro to access the Access Attributes in flags field above: 648 * Access Attributes is encoded in bits 9:2 649 */ 650 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 651 652 /* Values for above Access Attributes */ 653 654 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 655 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 656 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 657 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 658 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 659 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 660 661 struct acpi_iort_rmr_desc { 662 u64 base_address; 663 u64 length; 664 u32 reserved; 665 }; 666 667 /******************************************************************************* 668 * 669 * IVRS - I/O Virtualization Reporting Structure 670 * Version 1 671 * 672 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 673 * Revision 1.26, February 2009. 674 * 675 ******************************************************************************/ 676 677 struct acpi_table_ivrs { 678 struct acpi_table_header header; /* Common ACPI table header */ 679 u32 info; /* Common virtualization info */ 680 u64 reserved; 681 }; 682 683 /* Values for Info field above */ 684 685 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 686 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 687 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 688 689 /* IVRS subtable header */ 690 691 struct acpi_ivrs_header { 692 u8 type; /* Subtable type */ 693 u8 flags; 694 u16 length; /* Subtable length */ 695 u16 device_id; /* ID of IOMMU */ 696 }; 697 698 /* Values for subtable Type above */ 699 700 enum acpi_ivrs_type { 701 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 702 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 703 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 704 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 705 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 706 ACPI_IVRS_TYPE_MEMORY3 = 0x22 707 }; 708 709 /* Masks for Flags field above for IVHD subtable */ 710 711 #define ACPI_IVHD_TT_ENABLE (1) 712 #define ACPI_IVHD_PASS_PW (1<<1) 713 #define ACPI_IVHD_RES_PASS_PW (1<<2) 714 #define ACPI_IVHD_ISOC (1<<3) 715 #define ACPI_IVHD_IOTLB (1<<4) 716 717 /* Masks for Flags field above for IVMD subtable */ 718 719 #define ACPI_IVMD_UNITY (1) 720 #define ACPI_IVMD_READ (1<<1) 721 #define ACPI_IVMD_WRITE (1<<2) 722 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 723 724 /* 725 * IVRS subtables, correspond to Type in struct acpi_ivrs_header 726 */ 727 728 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 729 730 struct acpi_ivrs_hardware_10 { 731 struct acpi_ivrs_header header; 732 u16 capability_offset; /* Offset for IOMMU control fields */ 733 u64 base_address; /* IOMMU control registers */ 734 u16 pci_segment_group; 735 u16 info; /* MSI number and unit ID */ 736 u32 feature_reporting; 737 }; 738 739 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 740 741 struct acpi_ivrs_hardware_11 { 742 struct acpi_ivrs_header header; 743 u16 capability_offset; /* Offset for IOMMU control fields */ 744 u64 base_address; /* IOMMU control registers */ 745 u16 pci_segment_group; 746 u16 info; /* MSI number and unit ID */ 747 u32 attributes; 748 u64 efr_register_image; 749 u64 reserved; 750 }; 751 752 /* Masks for Info field above */ 753 754 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 755 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */ 756 757 /* 758 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure. 759 * Upper two bits of the Type field are the (encoded) length of the structure. 760 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 761 * are reserved for future use but not defined. 762 */ 763 struct acpi_ivrs_de_header { 764 u8 type; 765 u16 id; 766 u8 data_setting; 767 }; 768 769 /* Length of device entry is in the top two bits of Type field above */ 770 771 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 772 773 /* Values for device entry Type field above */ 774 775 enum acpi_ivrs_device_entry_type { 776 /* 4-byte device entries, all use struct acpi_ivrs_device4 */ 777 778 ACPI_IVRS_TYPE_PAD4 = 0, 779 ACPI_IVRS_TYPE_ALL = 1, 780 ACPI_IVRS_TYPE_SELECT = 2, 781 ACPI_IVRS_TYPE_START = 3, 782 ACPI_IVRS_TYPE_END = 4, 783 784 /* 8-byte device entries */ 785 786 ACPI_IVRS_TYPE_PAD8 = 64, 787 ACPI_IVRS_TYPE_NOT_USED = 65, 788 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */ 789 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */ 790 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */ 791 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */ 792 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */ 793 794 /* Variable-length device entries */ 795 796 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 797 }; 798 799 /* Values for Data field above */ 800 801 #define ACPI_IVHD_INIT_PASS (1) 802 #define ACPI_IVHD_EINT_PASS (1<<1) 803 #define ACPI_IVHD_NMI_PASS (1<<2) 804 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 805 #define ACPI_IVHD_LINT0_PASS (1<<6) 806 #define ACPI_IVHD_LINT1_PASS (1<<7) 807 808 /* Types 0-4: 4-byte device entry */ 809 810 struct acpi_ivrs_device4 { 811 struct acpi_ivrs_de_header header; 812 }; 813 814 /* Types 66-67: 8-byte device entry */ 815 816 struct acpi_ivrs_device8a { 817 struct acpi_ivrs_de_header header; 818 u8 reserved1; 819 u16 used_id; 820 u8 reserved2; 821 }; 822 823 /* Types 70-71: 8-byte device entry */ 824 825 struct acpi_ivrs_device8b { 826 struct acpi_ivrs_de_header header; 827 u32 extended_data; 828 }; 829 830 /* Values for extended_data above */ 831 832 #define ACPI_IVHD_ATS_DISABLED (1<<31) 833 834 /* Type 72: 8-byte device entry */ 835 836 struct acpi_ivrs_device8c { 837 struct acpi_ivrs_de_header header; 838 u8 handle; 839 u16 used_id; 840 u8 variety; 841 }; 842 843 /* Values for Variety field above */ 844 845 #define ACPI_IVHD_IOAPIC 1 846 #define ACPI_IVHD_HPET 2 847 848 /* Type 240: variable-length device entry */ 849 850 struct acpi_ivrs_device_hid { 851 struct acpi_ivrs_de_header header; 852 u64 acpi_hid; 853 u64 acpi_cid; 854 u8 uid_type; 855 u8 uid_length; 856 }; 857 858 /* Values for uid_type above */ 859 860 #define ACPI_IVRS_UID_NOT_PRESENT 0 861 #define ACPI_IVRS_UID_IS_INTEGER 1 862 #define ACPI_IVRS_UID_IS_STRING 2 863 864 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 865 866 struct acpi_ivrs_memory { 867 struct acpi_ivrs_header header; 868 u16 aux_data; 869 u64 reserved; 870 u64 start_address; 871 u64 memory_length; 872 }; 873 874 /******************************************************************************* 875 * 876 * LPIT - Low Power Idle Table 877 * 878 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 879 * 880 ******************************************************************************/ 881 882 struct acpi_table_lpit { 883 struct acpi_table_header header; /* Common ACPI table header */ 884 }; 885 886 /* LPIT subtable header */ 887 888 struct acpi_lpit_header { 889 u32 type; /* Subtable type */ 890 u32 length; /* Subtable length */ 891 u16 unique_id; 892 u16 reserved; 893 u32 flags; 894 }; 895 896 /* Values for subtable Type above */ 897 898 enum acpi_lpit_type { 899 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 900 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 901 }; 902 903 /* Masks for Flags field above */ 904 905 #define ACPI_LPIT_STATE_DISABLED (1) 906 #define ACPI_LPIT_NO_COUNTER (1<<1) 907 908 /* 909 * LPIT subtables, correspond to Type in struct acpi_lpit_header 910 */ 911 912 /* 0x00: Native C-state instruction based LPI structure */ 913 914 struct acpi_lpit_native { 915 struct acpi_lpit_header header; 916 struct acpi_generic_address entry_trigger; 917 u32 residency; 918 u32 latency; 919 struct acpi_generic_address residency_counter; 920 u64 counter_frequency; 921 }; 922 923 /******************************************************************************* 924 * 925 * MADT - Multiple APIC Description Table 926 * Version 3 927 * 928 ******************************************************************************/ 929 930 struct acpi_table_madt { 931 struct acpi_table_header header; /* Common ACPI table header */ 932 u32 address; /* Physical address of local APIC */ 933 u32 flags; 934 }; 935 936 /* Masks for Flags field above */ 937 938 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 939 940 /* Values for PCATCompat flag */ 941 942 #define ACPI_MADT_DUAL_PIC 1 943 #define ACPI_MADT_MULTIPLE_APIC 0 944 945 /* Values for MADT subtable type in struct acpi_subtable_header */ 946 947 enum acpi_madt_type { 948 ACPI_MADT_TYPE_LOCAL_APIC = 0, 949 ACPI_MADT_TYPE_IO_APIC = 1, 950 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 951 ACPI_MADT_TYPE_NMI_SOURCE = 3, 952 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 953 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 954 ACPI_MADT_TYPE_IO_SAPIC = 6, 955 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 956 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 957 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 958 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 959 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 960 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 961 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 962 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 963 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 964 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 965 ACPI_MADT_TYPE_CORE_PIC = 17, 966 ACPI_MADT_TYPE_LIO_PIC = 18, 967 ACPI_MADT_TYPE_HT_PIC = 19, 968 ACPI_MADT_TYPE_EIO_PIC = 20, 969 ACPI_MADT_TYPE_MSI_PIC = 21, 970 ACPI_MADT_TYPE_BIO_PIC = 22, 971 ACPI_MADT_TYPE_LPC_PIC = 23, 972 ACPI_MADT_TYPE_RINTC = 24, 973 ACPI_MADT_TYPE_IMSIC = 25, 974 ACPI_MADT_TYPE_APLIC = 26, 975 ACPI_MADT_TYPE_PLIC = 27, 976 ACPI_MADT_TYPE_RESERVED = 28, /* 28 to 0x7F are reserved */ 977 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 978 }; 979 980 /* 981 * MADT Subtables, correspond to Type in struct acpi_subtable_header 982 */ 983 984 /* 0: Processor Local APIC */ 985 986 struct acpi_madt_local_apic { 987 struct acpi_subtable_header header; 988 u8 processor_id; /* ACPI processor id */ 989 u8 id; /* Processor's local APIC id */ 990 u32 lapic_flags; 991 }; 992 993 /* 1: IO APIC */ 994 995 struct acpi_madt_io_apic { 996 struct acpi_subtable_header header; 997 u8 id; /* I/O APIC ID */ 998 u8 reserved; /* reserved - must be zero */ 999 u32 address; /* APIC physical address */ 1000 u32 global_irq_base; /* Global system interrupt where INTI lines start */ 1001 }; 1002 1003 /* 2: Interrupt Override */ 1004 1005 struct acpi_madt_interrupt_override { 1006 struct acpi_subtable_header header; 1007 u8 bus; /* 0 - ISA */ 1008 u8 source_irq; /* Interrupt source (IRQ) */ 1009 u32 global_irq; /* Global system interrupt */ 1010 u16 inti_flags; 1011 }; 1012 1013 /* 3: NMI Source */ 1014 1015 struct acpi_madt_nmi_source { 1016 struct acpi_subtable_header header; 1017 u16 inti_flags; 1018 u32 global_irq; /* Global system interrupt */ 1019 }; 1020 1021 /* 4: Local APIC NMI */ 1022 1023 struct acpi_madt_local_apic_nmi { 1024 struct acpi_subtable_header header; 1025 u8 processor_id; /* ACPI processor id */ 1026 u16 inti_flags; 1027 u8 lint; /* LINTn to which NMI is connected */ 1028 }; 1029 1030 /* 5: Address Override */ 1031 1032 struct acpi_madt_local_apic_override { 1033 struct acpi_subtable_header header; 1034 u16 reserved; /* Reserved, must be zero */ 1035 u64 address; /* APIC physical address */ 1036 }; 1037 1038 /* 6: I/O Sapic */ 1039 1040 struct acpi_madt_io_sapic { 1041 struct acpi_subtable_header header; 1042 u8 id; /* I/O SAPIC ID */ 1043 u8 reserved; /* Reserved, must be zero */ 1044 u32 global_irq_base; /* Global interrupt for SAPIC start */ 1045 u64 address; /* SAPIC physical address */ 1046 }; 1047 1048 /* 7: Local Sapic */ 1049 1050 struct acpi_madt_local_sapic { 1051 struct acpi_subtable_header header; 1052 u8 processor_id; /* ACPI processor id */ 1053 u8 id; /* SAPIC ID */ 1054 u8 eid; /* SAPIC EID */ 1055 u8 reserved[3]; /* Reserved, must be zero */ 1056 u32 lapic_flags; 1057 u32 uid; /* Numeric UID - ACPI 3.0 */ 1058 char uid_string[]; /* String UID - ACPI 3.0 */ 1059 }; 1060 1061 /* 8: Platform Interrupt Source */ 1062 1063 struct acpi_madt_interrupt_source { 1064 struct acpi_subtable_header header; 1065 u16 inti_flags; 1066 u8 type; /* 1=PMI, 2=INIT, 3=corrected */ 1067 u8 id; /* Processor ID */ 1068 u8 eid; /* Processor EID */ 1069 u8 io_sapic_vector; /* Vector value for PMI interrupts */ 1070 u32 global_irq; /* Global system interrupt */ 1071 u32 flags; /* Interrupt Source Flags */ 1072 }; 1073 1074 /* Masks for Flags field above */ 1075 1076 #define ACPI_MADT_CPEI_OVERRIDE (1) 1077 1078 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1079 1080 struct acpi_madt_local_x2apic { 1081 struct acpi_subtable_header header; 1082 u16 reserved; /* reserved - must be zero */ 1083 u32 local_apic_id; /* Processor x2APIC ID */ 1084 u32 lapic_flags; 1085 u32 uid; /* ACPI processor UID */ 1086 }; 1087 1088 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1089 1090 struct acpi_madt_local_x2apic_nmi { 1091 struct acpi_subtable_header header; 1092 u16 inti_flags; 1093 u32 uid; /* ACPI processor UID */ 1094 u8 lint; /* LINTn to which NMI is connected */ 1095 u8 reserved[3]; /* reserved - must be zero */ 1096 }; 1097 1098 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */ 1099 1100 struct acpi_madt_generic_interrupt { 1101 struct acpi_subtable_header header; 1102 u16 reserved; /* reserved - must be zero */ 1103 u32 cpu_interface_number; 1104 u32 uid; 1105 u32 flags; 1106 u32 parking_version; 1107 u32 performance_interrupt; 1108 u64 parked_address; 1109 u64 base_address; 1110 u64 gicv_base_address; 1111 u64 gich_base_address; 1112 u32 vgic_interrupt; 1113 u64 gicr_base_address; 1114 u64 arm_mpidr; 1115 u8 efficiency_class; 1116 u8 reserved2[1]; 1117 u16 spe_interrupt; /* ACPI 6.3 */ 1118 u16 trbe_interrupt; /* ACPI 6.5 */ 1119 }; 1120 1121 /* Masks for Flags field above */ 1122 1123 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1124 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1125 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1126 #define ACPI_MADT_GICC_ONLINE_CAPABLE (1<<3) /* 03: Processor is online capable */ 1127 #define ACPI_MADT_GICC_NON_COHERENT (1<<4) /* 04: GIC redistributor is not coherent */ 1128 1129 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1130 1131 struct acpi_madt_generic_distributor { 1132 struct acpi_subtable_header header; 1133 u16 reserved; /* reserved - must be zero */ 1134 u32 gic_id; 1135 u64 base_address; 1136 u32 global_irq_base; 1137 u8 version; 1138 u8 reserved2[3]; /* reserved - must be zero */ 1139 }; 1140 1141 /* Values for Version field above */ 1142 1143 enum acpi_madt_gic_version { 1144 ACPI_MADT_GIC_VERSION_NONE = 0, 1145 ACPI_MADT_GIC_VERSION_V1 = 1, 1146 ACPI_MADT_GIC_VERSION_V2 = 2, 1147 ACPI_MADT_GIC_VERSION_V3 = 3, 1148 ACPI_MADT_GIC_VERSION_V4 = 4, 1149 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1150 }; 1151 1152 /* 13: Generic MSI Frame (ACPI 5.1) */ 1153 1154 struct acpi_madt_generic_msi_frame { 1155 struct acpi_subtable_header header; 1156 u16 reserved; /* reserved - must be zero */ 1157 u32 msi_frame_id; 1158 u64 base_address; 1159 u32 flags; 1160 u16 spi_count; 1161 u16 spi_base; 1162 }; 1163 1164 /* Masks for Flags field above */ 1165 1166 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1167 1168 /* 14: Generic Redistributor (ACPI 5.1) */ 1169 1170 struct acpi_madt_generic_redistributor { 1171 struct acpi_subtable_header header; 1172 u8 flags; 1173 u8 reserved; /* reserved - must be zero */ 1174 u64 base_address; 1175 u32 length; 1176 }; 1177 1178 #define ACPI_MADT_GICR_NON_COHERENT (1) 1179 1180 /* 15: Generic Translator (ACPI 6.0) */ 1181 1182 struct acpi_madt_generic_translator { 1183 struct acpi_subtable_header header; 1184 u8 flags; 1185 u8 reserved; /* reserved - must be zero */ 1186 u32 translation_id; 1187 u64 base_address; 1188 u32 reserved2; 1189 }; 1190 1191 #define ACPI_MADT_ITS_NON_COHERENT (1) 1192 1193 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1194 1195 struct acpi_madt_multiproc_wakeup { 1196 struct acpi_subtable_header header; 1197 u16 version; 1198 u32 reserved; /* reserved - must be zero */ 1199 u64 mailbox_address; 1200 u64 reset_vector; 1201 }; 1202 1203 /* Values for Version field above */ 1204 1205 enum acpi_madt_multiproc_wakeup_version { 1206 ACPI_MADT_MP_WAKEUP_VERSION_NONE = 0, 1207 ACPI_MADT_MP_WAKEUP_VERSION_V1 = 1, 1208 ACPI_MADT_MP_WAKEUP_VERSION_RESERVED = 2, /* 2 and greater are reserved */ 1209 }; 1210 1211 #define ACPI_MADT_MP_WAKEUP_SIZE_V0 16 1212 #define ACPI_MADT_MP_WAKEUP_SIZE_V1 24 1213 1214 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1215 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1216 1217 struct acpi_madt_multiproc_wakeup_mailbox { 1218 u16 command; 1219 u16 reserved; /* reserved - must be zero */ 1220 u32 apic_id; 1221 u64 wakeup_vector; 1222 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1223 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1224 }; 1225 1226 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1227 #define ACPI_MP_WAKE_COMMAND_TEST 2 1228 1229 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1230 1231 struct acpi_madt_core_pic { 1232 struct acpi_subtable_header header; 1233 u8 version; 1234 u32 processor_id; 1235 u32 core_id; 1236 u32 flags; 1237 }; 1238 1239 /* Values for Version field above */ 1240 1241 enum acpi_madt_core_pic_version { 1242 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1243 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1244 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1245 }; 1246 1247 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1248 1249 struct acpi_madt_lio_pic { 1250 struct acpi_subtable_header header; 1251 u8 version; 1252 u64 address; 1253 u16 size; 1254 u8 cascade[2]; 1255 u32 cascade_map[2]; 1256 }; 1257 1258 /* Values for Version field above */ 1259 1260 enum acpi_madt_lio_pic_version { 1261 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1262 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1263 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1264 }; 1265 1266 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1267 1268 struct acpi_madt_ht_pic { 1269 struct acpi_subtable_header header; 1270 u8 version; 1271 u64 address; 1272 u16 size; 1273 u8 cascade[8]; 1274 }; 1275 1276 /* Values for Version field above */ 1277 1278 enum acpi_madt_ht_pic_version { 1279 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1280 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1281 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1282 }; 1283 1284 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1285 1286 struct acpi_madt_eio_pic { 1287 struct acpi_subtable_header header; 1288 u8 version; 1289 u8 cascade; 1290 u8 node; 1291 u64 node_map; 1292 }; 1293 1294 /* Values for Version field above */ 1295 1296 enum acpi_madt_eio_pic_version { 1297 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1298 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1299 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1300 }; 1301 1302 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1303 1304 struct acpi_madt_msi_pic { 1305 struct acpi_subtable_header header; 1306 u8 version; 1307 u64 msg_address; 1308 u32 start; 1309 u32 count; 1310 }; 1311 1312 /* Values for Version field above */ 1313 1314 enum acpi_madt_msi_pic_version { 1315 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1316 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1317 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1318 }; 1319 1320 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1321 1322 struct acpi_madt_bio_pic { 1323 struct acpi_subtable_header header; 1324 u8 version; 1325 u64 address; 1326 u16 size; 1327 u16 id; 1328 u16 gsi_base; 1329 }; 1330 1331 /* Values for Version field above */ 1332 1333 enum acpi_madt_bio_pic_version { 1334 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1335 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1336 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1337 }; 1338 1339 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1340 1341 struct acpi_madt_lpc_pic { 1342 struct acpi_subtable_header header; 1343 u8 version; 1344 u64 address; 1345 u16 size; 1346 u8 cascade; 1347 }; 1348 1349 /* Values for Version field above */ 1350 1351 enum acpi_madt_lpc_pic_version { 1352 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1353 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1354 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1355 }; 1356 1357 /* 24: RISC-V INTC */ 1358 struct acpi_madt_rintc { 1359 struct acpi_subtable_header header; 1360 u8 version; 1361 u8 reserved; 1362 u32 flags; 1363 u64 hart_id; 1364 u32 uid; /* ACPI processor UID */ 1365 u32 ext_intc_id; /* External INTC Id */ 1366 u64 imsic_addr; /* IMSIC base address */ 1367 u32 imsic_size; /* IMSIC size */ 1368 }; 1369 1370 /* Values for RISC-V INTC Version field above */ 1371 1372 enum acpi_madt_rintc_version { 1373 ACPI_MADT_RINTC_VERSION_NONE = 0, 1374 ACPI_MADT_RINTC_VERSION_V1 = 1, 1375 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1376 }; 1377 1378 /* 25: RISC-V IMSIC */ 1379 struct acpi_madt_imsic { 1380 struct acpi_subtable_header header; 1381 u8 version; 1382 u8 reserved; 1383 u32 flags; 1384 u16 num_ids; 1385 u16 num_guest_ids; 1386 u8 guest_index_bits; 1387 u8 hart_index_bits; 1388 u8 group_index_bits; 1389 u8 group_index_shift; 1390 }; 1391 1392 /* 26: RISC-V APLIC */ 1393 struct acpi_madt_aplic { 1394 struct acpi_subtable_header header; 1395 u8 version; 1396 u8 id; 1397 u32 flags; 1398 u8 hw_id[8]; 1399 u16 num_idcs; 1400 u16 num_sources; 1401 u32 gsi_base; 1402 u64 base_addr; 1403 u32 size; 1404 }; 1405 1406 /* 27: RISC-V PLIC */ 1407 struct acpi_madt_plic { 1408 struct acpi_subtable_header header; 1409 u8 version; 1410 u8 id; 1411 u8 hw_id[8]; 1412 u16 num_irqs; 1413 u16 max_prio; 1414 u32 flags; 1415 u32 size; 1416 u64 base_addr; 1417 u32 gsi_base; 1418 }; 1419 1420 /* 80: OEM data */ 1421 1422 struct acpi_madt_oem_data { 1423 ACPI_FLEX_ARRAY(u8, oem_data); 1424 }; 1425 1426 /* 1427 * Common flags fields for MADT subtables 1428 */ 1429 1430 /* MADT Local APIC flags */ 1431 1432 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1433 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1434 1435 /* MADT MPS INTI flags (inti_flags) */ 1436 1437 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1438 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1439 1440 /* Values for MPS INTI flags */ 1441 1442 #define ACPI_MADT_POLARITY_CONFORMS 0 1443 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1444 #define ACPI_MADT_POLARITY_RESERVED 2 1445 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1446 1447 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1448 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1449 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1450 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1451 1452 /******************************************************************************* 1453 * 1454 * MCFG - PCI Memory Mapped Configuration table and subtable 1455 * Version 1 1456 * 1457 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1458 * 1459 ******************************************************************************/ 1460 1461 struct acpi_table_mcfg { 1462 struct acpi_table_header header; /* Common ACPI table header */ 1463 u8 reserved[8]; 1464 }; 1465 1466 /* Subtable */ 1467 1468 struct acpi_mcfg_allocation { 1469 u64 address; /* Base address, processor-relative */ 1470 u16 pci_segment; /* PCI segment group number */ 1471 u8 start_bus_number; /* Starting PCI Bus number */ 1472 u8 end_bus_number; /* Final PCI Bus number */ 1473 u32 reserved; 1474 }; 1475 1476 /******************************************************************************* 1477 * 1478 * MCHI - Management Controller Host Interface Table 1479 * Version 1 1480 * 1481 * Conforms to "Management Component Transport Protocol (MCTP) Host 1482 * Interface Specification", Revision 1.0.0a, October 13, 2009 1483 * 1484 ******************************************************************************/ 1485 1486 struct acpi_table_mchi { 1487 struct acpi_table_header header; /* Common ACPI table header */ 1488 u8 interface_type; 1489 u8 protocol; 1490 u64 protocol_data; 1491 u8 interrupt_type; 1492 u8 gpe; 1493 u8 pci_device_flag; 1494 u32 global_interrupt; 1495 struct acpi_generic_address control_register; 1496 u8 pci_segment; 1497 u8 pci_bus; 1498 u8 pci_device; 1499 u8 pci_function; 1500 }; 1501 1502 /******************************************************************************* 1503 * 1504 * MPAM - Memory System Resource Partitioning and Monitoring 1505 * 1506 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0" 1507 * Document number: ARM DEN 0065, December, 2022. 1508 * 1509 ******************************************************************************/ 1510 1511 /* MPAM RIS locator types. Table 11, Location types */ 1512 enum acpi_mpam_locator_type { 1513 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0, 1514 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1, 1515 ACPI_MPAM_LOCATION_TYPE_SMMU = 2, 1516 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3, 1517 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4, 1518 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5, 1519 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF 1520 }; 1521 1522 /* MPAM Functional dependency descriptor. Table 10 */ 1523 struct acpi_mpam_func_deps { 1524 u32 producer; 1525 u32 reserved; 1526 }; 1527 1528 /* MPAM Processor cache locator descriptor. Table 13 */ 1529 struct acpi_mpam_resource_cache_locator { 1530 u64 cache_reference; 1531 u32 reserved; 1532 }; 1533 1534 /* MPAM Memory locator descriptor. Table 14 */ 1535 struct acpi_mpam_resource_memory_locator { 1536 u64 proximity_domain; 1537 u32 reserved; 1538 }; 1539 1540 /* MPAM SMMU locator descriptor. Table 15 */ 1541 struct acpi_mpam_resource_smmu_locator { 1542 u64 smmu_interface; 1543 u32 reserved; 1544 }; 1545 1546 /* MPAM Memory-side cache locator descriptor. Table 16 */ 1547 struct acpi_mpam_resource_memcache_locator { 1548 u8 reserved[7]; 1549 u8 level; 1550 u32 reference; 1551 }; 1552 1553 /* MPAM ACPI device locator descriptor. Table 17 */ 1554 struct acpi_mpam_resource_acpi_locator { 1555 u64 acpi_hw_id; 1556 u32 acpi_unique_id; 1557 }; 1558 1559 /* MPAM Interconnect locator descriptor. Table 18 */ 1560 struct acpi_mpam_resource_interconnect_locator { 1561 u64 inter_connect_desc_tbl_off; 1562 u32 reserved; 1563 }; 1564 1565 /* MPAM Locator structure. Table 12 */ 1566 struct acpi_mpam_resource_generic_locator { 1567 u64 descriptor1; 1568 u32 descriptor2; 1569 }; 1570 1571 union acpi_mpam_resource_locator { 1572 struct acpi_mpam_resource_cache_locator cache_locator; 1573 struct acpi_mpam_resource_memory_locator memory_locator; 1574 struct acpi_mpam_resource_smmu_locator smmu_locator; 1575 struct acpi_mpam_resource_memcache_locator mem_cache_locator; 1576 struct acpi_mpam_resource_acpi_locator acpi_locator; 1577 struct acpi_mpam_resource_interconnect_locator interconnect_ifc_locator; 1578 struct acpi_mpam_resource_generic_locator generic_locator; 1579 }; 1580 1581 /* Memory System Component Resource Node Structure Table 9 */ 1582 struct acpi_mpam_resource_node { 1583 u32 identifier; 1584 u8 ris_index; 1585 u16 reserved1; 1586 u8 locator_type; 1587 union acpi_mpam_resource_locator locator; 1588 u32 num_functional_deps; 1589 }; 1590 1591 /* Memory System Component (MSC) Node Structure. Table 4 */ 1592 struct acpi_mpam_msc_node { 1593 u16 length; 1594 u8 interface_type; 1595 u8 reserved; 1596 u32 identifier; 1597 u64 base_address; 1598 u32 mmio_size; 1599 u32 overflow_interrupt; 1600 u32 overflow_interrupt_flags; 1601 u32 reserved1; 1602 u32 overflow_interrupt_affinity; 1603 u32 error_interrupt; 1604 u32 error_interrupt_flags; 1605 u32 reserved2; 1606 u32 error_interrupt_affinity; 1607 u32 max_nrdy_usec; 1608 u64 hardware_id_linked_device; 1609 u32 instance_id_linked_device; 1610 u32 num_resouce_nodes; 1611 }; 1612 1613 struct acpi_table_mpam { 1614 struct acpi_table_header header; /* Common ACPI table header */ 1615 }; 1616 1617 /******************************************************************************* 1618 * 1619 * MPST - Memory Power State Table (ACPI 5.0) 1620 * Version 1 1621 * 1622 ******************************************************************************/ 1623 1624 #define ACPI_MPST_CHANNEL_INFO \ 1625 u8 channel_id; \ 1626 u8 reserved1[3]; \ 1627 u16 power_node_count; \ 1628 u16 reserved2; 1629 1630 /* Main table */ 1631 1632 struct acpi_table_mpst { 1633 struct acpi_table_header header; /* Common ACPI table header */ 1634 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1635 }; 1636 1637 /* Memory Platform Communication Channel Info */ 1638 1639 struct acpi_mpst_channel { 1640 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1641 }; 1642 1643 /* Memory Power Node Structure */ 1644 1645 struct acpi_mpst_power_node { 1646 u8 flags; 1647 u8 reserved1; 1648 u16 node_id; 1649 u32 length; 1650 u64 range_address; 1651 u64 range_length; 1652 u32 num_power_states; 1653 u32 num_physical_components; 1654 }; 1655 1656 /* Values for Flags field above */ 1657 1658 #define ACPI_MPST_ENABLED 1 1659 #define ACPI_MPST_POWER_MANAGED 2 1660 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1661 1662 /* Memory Power State Structure (follows POWER_NODE above) */ 1663 1664 struct acpi_mpst_power_state { 1665 u8 power_state; 1666 u8 info_index; 1667 }; 1668 1669 /* Physical Component ID Structure (follows POWER_STATE above) */ 1670 1671 struct acpi_mpst_component { 1672 u16 component_id; 1673 }; 1674 1675 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1676 1677 struct acpi_mpst_data_hdr { 1678 u16 characteristics_count; 1679 u16 reserved; 1680 }; 1681 1682 struct acpi_mpst_power_data { 1683 u8 structure_id; 1684 u8 flags; 1685 u16 reserved1; 1686 u32 average_power; 1687 u32 power_saving; 1688 u64 exit_latency; 1689 u64 reserved2; 1690 }; 1691 1692 /* Values for Flags field above */ 1693 1694 #define ACPI_MPST_PRESERVE 1 1695 #define ACPI_MPST_AUTOENTRY 2 1696 #define ACPI_MPST_AUTOEXIT 4 1697 1698 /* Shared Memory Region (not part of an ACPI table) */ 1699 1700 struct acpi_mpst_shared { 1701 u32 signature; 1702 u16 pcc_command; 1703 u16 pcc_status; 1704 u32 command_register; 1705 u32 status_register; 1706 u32 power_state_id; 1707 u32 power_node_id; 1708 u64 energy_consumed; 1709 u64 average_power; 1710 }; 1711 1712 /******************************************************************************* 1713 * 1714 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1715 * Version 1 1716 * 1717 ******************************************************************************/ 1718 1719 struct acpi_table_msct { 1720 struct acpi_table_header header; /* Common ACPI table header */ 1721 u32 proximity_offset; /* Location of proximity info struct(s) */ 1722 u32 max_proximity_domains; /* Max number of proximity domains */ 1723 u32 max_clock_domains; /* Max number of clock domains */ 1724 u64 max_address; /* Max physical address in system */ 1725 }; 1726 1727 /* subtable - Maximum Proximity Domain Information. Version 1 */ 1728 1729 struct acpi_msct_proximity { 1730 u8 revision; 1731 u8 length; 1732 u32 range_start; /* Start of domain range */ 1733 u32 range_end; /* End of domain range */ 1734 u32 processor_capacity; 1735 u64 memory_capacity; /* In bytes */ 1736 }; 1737 1738 /******************************************************************************* 1739 * 1740 * MSDM - Microsoft Data Management table 1741 * 1742 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1743 * November 29, 2011. Copyright 2011 Microsoft 1744 * 1745 ******************************************************************************/ 1746 1747 /* Basic MSDM table is only the common ACPI header */ 1748 1749 struct acpi_table_msdm { 1750 struct acpi_table_header header; /* Common ACPI table header */ 1751 }; 1752 1753 /******************************************************************************* 1754 * 1755 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1756 * Version 1 1757 * 1758 ******************************************************************************/ 1759 1760 struct acpi_table_nfit { 1761 struct acpi_table_header header; /* Common ACPI table header */ 1762 u32 reserved; /* Reserved, must be zero */ 1763 }; 1764 1765 /* Subtable header for NFIT */ 1766 1767 struct acpi_nfit_header { 1768 u16 type; 1769 u16 length; 1770 }; 1771 1772 /* Values for subtable type in struct acpi_nfit_header */ 1773 1774 enum acpi_nfit_type { 1775 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1776 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1777 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1778 ACPI_NFIT_TYPE_SMBIOS = 3, 1779 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1780 ACPI_NFIT_TYPE_DATA_REGION = 5, 1781 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1782 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1783 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1784 }; 1785 1786 /* 1787 * NFIT Subtables 1788 */ 1789 1790 /* 0: System Physical Address Range Structure */ 1791 1792 struct acpi_nfit_system_address { 1793 struct acpi_nfit_header header; 1794 u16 range_index; 1795 u16 flags; 1796 u32 reserved; /* Reserved, must be zero */ 1797 u32 proximity_domain; 1798 u8 range_guid[16]; 1799 u64 address; 1800 u64 length; 1801 u64 memory_mapping; 1802 u64 location_cookie; /* ACPI 6.4 */ 1803 }; 1804 1805 /* Flags */ 1806 1807 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1808 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1809 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1810 1811 /* Range Type GUIDs appear in the include/acuuid.h file */ 1812 1813 /* 1: Memory Device to System Address Range Map Structure */ 1814 1815 struct acpi_nfit_memory_map { 1816 struct acpi_nfit_header header; 1817 u32 device_handle; 1818 u16 physical_id; 1819 u16 region_id; 1820 u16 range_index; 1821 u16 region_index; 1822 u64 region_size; 1823 u64 region_offset; 1824 u64 address; 1825 u16 interleave_index; 1826 u16 interleave_ways; 1827 u16 flags; 1828 u16 reserved; /* Reserved, must be zero */ 1829 }; 1830 1831 /* Flags */ 1832 1833 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1834 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1835 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1836 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1837 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1838 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1839 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1840 1841 /* 2: Interleave Structure */ 1842 1843 struct acpi_nfit_interleave { 1844 struct acpi_nfit_header header; 1845 u16 interleave_index; 1846 u16 reserved; /* Reserved, must be zero */ 1847 u32 line_count; 1848 u32 line_size; 1849 u32 line_offset[]; /* Variable length */ 1850 }; 1851 1852 /* 3: SMBIOS Management Information Structure */ 1853 1854 struct acpi_nfit_smbios { 1855 struct acpi_nfit_header header; 1856 u32 reserved; /* Reserved, must be zero */ 1857 u8 data[]; /* Variable length */ 1858 }; 1859 1860 /* 4: NVDIMM Control Region Structure */ 1861 1862 struct acpi_nfit_control_region { 1863 struct acpi_nfit_header header; 1864 u16 region_index; 1865 u16 vendor_id; 1866 u16 device_id; 1867 u16 revision_id; 1868 u16 subsystem_vendor_id; 1869 u16 subsystem_device_id; 1870 u16 subsystem_revision_id; 1871 u8 valid_fields; 1872 u8 manufacturing_location; 1873 u16 manufacturing_date; 1874 u8 reserved[2]; /* Reserved, must be zero */ 1875 u32 serial_number; 1876 u16 code; 1877 u16 windows; 1878 u64 window_size; 1879 u64 command_offset; 1880 u64 command_size; 1881 u64 status_offset; 1882 u64 status_size; 1883 u16 flags; 1884 u8 reserved1[6]; /* Reserved, must be zero */ 1885 }; 1886 1887 /* Flags */ 1888 1889 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1890 1891 /* valid_fields bits */ 1892 1893 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1894 1895 /* 5: NVDIMM Block Data Window Region Structure */ 1896 1897 struct acpi_nfit_data_region { 1898 struct acpi_nfit_header header; 1899 u16 region_index; 1900 u16 windows; 1901 u64 offset; 1902 u64 size; 1903 u64 capacity; 1904 u64 start_address; 1905 }; 1906 1907 /* 6: Flush Hint Address Structure */ 1908 1909 struct acpi_nfit_flush_address { 1910 struct acpi_nfit_header header; 1911 u32 device_handle; 1912 u16 hint_count; 1913 u8 reserved[6]; /* Reserved, must be zero */ 1914 u64 hint_address[]; /* Variable length */ 1915 }; 1916 1917 /* 7: Platform Capabilities Structure */ 1918 1919 struct acpi_nfit_capabilities { 1920 struct acpi_nfit_header header; 1921 u8 highest_capability; 1922 u8 reserved[3]; /* Reserved, must be zero */ 1923 u32 capabilities; 1924 u32 reserved2; 1925 }; 1926 1927 /* Capabilities Flags */ 1928 1929 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1930 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1931 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1932 1933 /* 1934 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1935 */ 1936 struct nfit_device_handle { 1937 u32 handle; 1938 }; 1939 1940 /* Device handle construction and extraction macros */ 1941 1942 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1943 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1944 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1945 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1946 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1947 1948 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1949 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1950 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1951 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1952 #define ACPI_NFIT_NODE_ID_OFFSET 16 1953 1954 /* Macro to construct a NFIT/NVDIMM device handle */ 1955 1956 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1957 ((dimm) | \ 1958 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1959 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1960 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1961 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1962 1963 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1964 1965 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1966 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1967 1968 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1969 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1970 1971 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1972 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1973 1974 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1975 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1976 1977 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1978 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1979 1980 /******************************************************************************* 1981 * 1982 * NHLT - Non HDAudio Link Table 1983 * Version 1 1984 * 1985 ******************************************************************************/ 1986 1987 struct acpi_table_nhlt { 1988 struct acpi_table_header header; /* Common ACPI table header */ 1989 u8 endpoints_count; 1990 /* 1991 * struct acpi_nhlt_endpoint endpoints[]; 1992 * struct acpi_nhlt_config oed_config; 1993 */ 1994 }; 1995 1996 struct acpi_nhlt_endpoint { 1997 u32 length; 1998 u8 link_type; 1999 u8 instance_id; 2000 u16 vendor_id; 2001 u16 device_id; 2002 u16 revision_id; 2003 u32 subsystem_id; 2004 u8 device_type; 2005 u8 direction; 2006 u8 virtual_bus_id; 2007 /* 2008 * struct acpi_nhlt_config device_config; 2009 * struct acpi_nhlt_formats_config formats_config; 2010 * struct acpi_nhlt_devices_info devices_info; 2011 */ 2012 }; 2013 2014 /* 2015 * Values for link_type field above 2016 * 2017 * Only types PDM and SSP are used 2018 */ 2019 #define ACPI_NHLT_LINKTYPE_HDA 0 2020 #define ACPI_NHLT_LINKTYPE_DSP 1 2021 #define ACPI_NHLT_LINKTYPE_PDM 2 2022 #define ACPI_NHLT_LINKTYPE_SSP 3 2023 #define ACPI_NHLT_LINKTYPE_SLIMBUS 4 2024 #define ACPI_NHLT_LINKTYPE_SDW 5 2025 #define ACPI_NHLT_LINKTYPE_UAOL 6 2026 2027 /* Values for device_id field above */ 2028 2029 #define ACPI_NHLT_DEVICEID_DMIC 0xAE20 2030 #define ACPI_NHLT_DEVICEID_BT 0xAE30 2031 #define ACPI_NHLT_DEVICEID_I2S 0xAE34 2032 2033 /* Values for device_type field above */ 2034 2035 /* 2036 * Device types unique to endpoint of link_type=PDM 2037 * 2038 * Type PDM used for all SKL+ platforms 2039 */ 2040 #define ACPI_NHLT_DEVICETYPE_PDM 0 2041 #define ACPI_NHLT_DEVICETYPE_PDM_SKL 1 2042 /* Device types unique to endpoint of link_type=SSP */ 2043 #define ACPI_NHLT_DEVICETYPE_BT 0 2044 #define ACPI_NHLT_DEVICETYPE_FM 1 2045 #define ACPI_NHLT_DEVICETYPE_MODEM 2 2046 #define ACPI_NHLT_DEVICETYPE_CODEC 4 2047 2048 /* Values for Direction field above */ 2049 2050 #define ACPI_NHLT_DIR_RENDER 0 2051 #define ACPI_NHLT_DIR_CAPTURE 1 2052 2053 struct acpi_nhlt_config { 2054 u32 capabilities_size; 2055 u8 capabilities[]; 2056 }; 2057 2058 struct acpi_nhlt_gendevice_config { 2059 u8 virtual_slot; 2060 u8 config_type; 2061 }; 2062 2063 /* Values for config_type field above */ 2064 2065 #define ACPI_NHLT_CONFIGTYPE_GENERIC 0 2066 #define ACPI_NHLT_CONFIGTYPE_MICARRAY 1 2067 2068 struct acpi_nhlt_micdevice_config { 2069 u8 virtual_slot; 2070 u8 config_type; 2071 u8 array_type; 2072 }; 2073 2074 /* Values for array_type field above */ 2075 2076 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_SMALL 0xA 2077 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_BIG 0xB 2078 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO1 0xC 2079 #define ACPI_NHLT_ARRAYTYPE_PLANAR4_LSHAPED 0xD 2080 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO2 0xE 2081 #define ACPI_NHLT_ARRAYTYPE_VENDOR 0xF 2082 2083 struct acpi_nhlt_vendor_mic_config { 2084 u8 type; 2085 u8 panel; 2086 u16 speaker_position_distance; /* mm */ 2087 u16 horizontal_offset; /* mm */ 2088 u16 vertical_offset; /* mm */ 2089 u8 frequency_low_band; /* 5*Hz */ 2090 u8 frequency_high_band; /* 500*Hz */ 2091 u16 direction_angle; /* -180 - +180 */ 2092 u16 elevation_angle; /* -180 - +180 */ 2093 u16 work_vertical_angle_begin; /* -180 - +180 with 2 deg step */ 2094 u16 work_vertical_angle_end; /* -180 - +180 with 2 deg step */ 2095 u16 work_horizontal_angle_begin; /* -180 - +180 with 2 deg step */ 2096 u16 work_horizontal_angle_end; /* -180 - +180 with 2 deg step */ 2097 }; 2098 2099 /* Values for Type field above */ 2100 2101 #define ACPI_NHLT_MICTYPE_OMNIDIRECTIONAL 0 2102 #define ACPI_NHLT_MICTYPE_SUBCARDIOID 1 2103 #define ACPI_NHLT_MICTYPE_CARDIOID 2 2104 #define ACPI_NHLT_MICTYPE_SUPERCARDIOID 3 2105 #define ACPI_NHLT_MICTYPE_HYPERCARDIOID 4 2106 #define ACPI_NHLT_MICTYPE_8SHAPED 5 2107 #define ACPI_NHLT_MICTYPE_RESERVED 6 2108 #define ACPI_NHLT_MICTYPE_VENDORDEFINED 7 2109 2110 /* Values for Panel field above */ 2111 2112 #define ACPI_NHLT_MICLOCATION_TOP 0 2113 #define ACPI_NHLT_MICLOCATION_BOTTOM 1 2114 #define ACPI_NHLT_MICLOCATION_LEFT 2 2115 #define ACPI_NHLT_MICLOCATION_RIGHT 3 2116 #define ACPI_NHLT_MICLOCATION_FRONT 4 2117 #define ACPI_NHLT_MICLOCATION_REAR 5 2118 2119 struct acpi_nhlt_vendor_micdevice_config { 2120 u8 virtual_slot; 2121 u8 config_type; 2122 u8 array_type; 2123 u8 mics_count; 2124 struct acpi_nhlt_vendor_mic_config mics[]; 2125 }; 2126 2127 union acpi_nhlt_device_config { 2128 u8 virtual_slot; 2129 struct acpi_nhlt_gendevice_config gen; 2130 struct acpi_nhlt_micdevice_config mic; 2131 struct acpi_nhlt_vendor_micdevice_config vendor_mic; 2132 }; 2133 2134 /* Inherited from Microsoft's WAVEFORMATEXTENSIBLE. */ 2135 struct acpi_nhlt_wave_formatext { 2136 u16 format_tag; 2137 u16 channel_count; 2138 u32 samples_per_sec; 2139 u32 avg_bytes_per_sec; 2140 u16 block_align; 2141 u16 bits_per_sample; 2142 u16 extra_format_size; 2143 u16 valid_bits_per_sample; 2144 u32 channel_mask; 2145 u8 subformat[16]; 2146 }; 2147 2148 struct acpi_nhlt_format_config { 2149 struct acpi_nhlt_wave_formatext format; 2150 struct acpi_nhlt_config config; 2151 }; 2152 2153 struct acpi_nhlt_formats_config { 2154 u8 formats_count; 2155 struct acpi_nhlt_format_config formats[]; 2156 }; 2157 2158 struct acpi_nhlt_device_info { 2159 u8 id[16]; 2160 u8 instance_id; 2161 u8 port_id; 2162 }; 2163 2164 struct acpi_nhlt_devices_info { 2165 u8 devices_count; 2166 struct acpi_nhlt_device_info devices[]; 2167 }; 2168 2169 /******************************************************************************* 2170 * 2171 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2172 * Version 2 (ACPI 6.2) 2173 * 2174 ******************************************************************************/ 2175 2176 struct acpi_table_pcct { 2177 struct acpi_table_header header; /* Common ACPI table header */ 2178 u32 flags; 2179 u64 reserved; 2180 }; 2181 2182 /* Values for Flags field above */ 2183 2184 #define ACPI_PCCT_DOORBELL 1 2185 2186 /* Values for subtable type in struct acpi_subtable_header */ 2187 2188 enum acpi_pcct_type { 2189 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2190 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2191 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2192 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2193 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2194 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2195 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2196 }; 2197 2198 /* 2199 * PCCT Subtables, correspond to Type in struct acpi_subtable_header 2200 */ 2201 2202 /* 0: Generic Communications Subspace */ 2203 2204 struct acpi_pcct_subspace { 2205 struct acpi_subtable_header header; 2206 u8 reserved[6]; 2207 u64 base_address; 2208 u64 length; 2209 struct acpi_generic_address doorbell_register; 2210 u64 preserve_mask; 2211 u64 write_mask; 2212 u32 latency; 2213 u32 max_access_rate; 2214 u16 min_turnaround_time; 2215 }; 2216 2217 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2218 2219 struct acpi_pcct_hw_reduced { 2220 struct acpi_subtable_header header; 2221 u32 platform_interrupt; 2222 u8 flags; 2223 u8 reserved; 2224 u64 base_address; 2225 u64 length; 2226 struct acpi_generic_address doorbell_register; 2227 u64 preserve_mask; 2228 u64 write_mask; 2229 u32 latency; 2230 u32 max_access_rate; 2231 u16 min_turnaround_time; 2232 }; 2233 2234 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2235 2236 struct acpi_pcct_hw_reduced_type2 { 2237 struct acpi_subtable_header header; 2238 u32 platform_interrupt; 2239 u8 flags; 2240 u8 reserved; 2241 u64 base_address; 2242 u64 length; 2243 struct acpi_generic_address doorbell_register; 2244 u64 preserve_mask; 2245 u64 write_mask; 2246 u32 latency; 2247 u32 max_access_rate; 2248 u16 min_turnaround_time; 2249 struct acpi_generic_address platform_ack_register; 2250 u64 ack_preserve_mask; 2251 u64 ack_write_mask; 2252 }; 2253 2254 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2255 2256 struct acpi_pcct_ext_pcc_master { 2257 struct acpi_subtable_header header; 2258 u32 platform_interrupt; 2259 u8 flags; 2260 u8 reserved1; 2261 u64 base_address; 2262 u32 length; 2263 struct acpi_generic_address doorbell_register; 2264 u64 preserve_mask; 2265 u64 write_mask; 2266 u32 latency; 2267 u32 max_access_rate; 2268 u32 min_turnaround_time; 2269 struct acpi_generic_address platform_ack_register; 2270 u64 ack_preserve_mask; 2271 u64 ack_set_mask; 2272 u64 reserved2; 2273 struct acpi_generic_address cmd_complete_register; 2274 u64 cmd_complete_mask; 2275 struct acpi_generic_address cmd_update_register; 2276 u64 cmd_update_preserve_mask; 2277 u64 cmd_update_set_mask; 2278 struct acpi_generic_address error_status_register; 2279 u64 error_status_mask; 2280 }; 2281 2282 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2283 2284 struct acpi_pcct_ext_pcc_slave { 2285 struct acpi_subtable_header header; 2286 u32 platform_interrupt; 2287 u8 flags; 2288 u8 reserved1; 2289 u64 base_address; 2290 u32 length; 2291 struct acpi_generic_address doorbell_register; 2292 u64 preserve_mask; 2293 u64 write_mask; 2294 u32 latency; 2295 u32 max_access_rate; 2296 u32 min_turnaround_time; 2297 struct acpi_generic_address platform_ack_register; 2298 u64 ack_preserve_mask; 2299 u64 ack_set_mask; 2300 u64 reserved2; 2301 struct acpi_generic_address cmd_complete_register; 2302 u64 cmd_complete_mask; 2303 struct acpi_generic_address cmd_update_register; 2304 u64 cmd_update_preserve_mask; 2305 u64 cmd_update_set_mask; 2306 struct acpi_generic_address error_status_register; 2307 u64 error_status_mask; 2308 }; 2309 2310 /* 5: HW Registers based Communications Subspace */ 2311 2312 struct acpi_pcct_hw_reg { 2313 struct acpi_subtable_header header; 2314 u16 version; 2315 u64 base_address; 2316 u64 length; 2317 struct acpi_generic_address doorbell_register; 2318 u64 doorbell_preserve; 2319 u64 doorbell_write; 2320 struct acpi_generic_address cmd_complete_register; 2321 u64 cmd_complete_mask; 2322 struct acpi_generic_address error_status_register; 2323 u64 error_status_mask; 2324 u32 nominal_latency; 2325 u32 min_turnaround_time; 2326 }; 2327 2328 /* Values for doorbell flags above */ 2329 2330 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2331 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2332 2333 /* 2334 * PCC memory structures (not part of the ACPI table) 2335 */ 2336 2337 /* Shared Memory Region */ 2338 2339 struct acpi_pcct_shared_memory { 2340 u32 signature; 2341 u16 command; 2342 u16 status; 2343 }; 2344 2345 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2346 2347 struct acpi_pcct_ext_pcc_shared_memory { 2348 u32 signature; 2349 u32 flags; 2350 u32 length; 2351 u32 command; 2352 }; 2353 2354 /******************************************************************************* 2355 * 2356 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2357 * Version 0 2358 * 2359 ******************************************************************************/ 2360 2361 struct acpi_table_pdtt { 2362 struct acpi_table_header header; /* Common ACPI table header */ 2363 u8 trigger_count; 2364 u8 reserved[3]; 2365 u32 array_offset; 2366 }; 2367 2368 /* 2369 * PDTT Communication Channel Identifier Structure. 2370 * The number of these structures is defined by trigger_count above, 2371 * starting at array_offset. 2372 */ 2373 struct acpi_pdtt_channel { 2374 u8 subchannel_id; 2375 u8 flags; 2376 }; 2377 2378 /* Flags for above */ 2379 2380 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2381 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2382 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2383 2384 /******************************************************************************* 2385 * 2386 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2387 * Version 1 2388 * 2389 ******************************************************************************/ 2390 2391 struct acpi_table_phat { 2392 struct acpi_table_header header; /* Common ACPI table header */ 2393 }; 2394 2395 /* Common header for PHAT subtables that follow main table */ 2396 2397 struct acpi_phat_header { 2398 u16 type; 2399 u16 length; 2400 u8 revision; 2401 }; 2402 2403 /* Values for Type field above */ 2404 2405 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2406 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2407 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2408 2409 /* 2410 * PHAT subtables, correspond to Type in struct acpi_phat_header 2411 */ 2412 2413 /* 0: Firmware Version Data Record */ 2414 2415 struct acpi_phat_version_data { 2416 struct acpi_phat_header header; 2417 u8 reserved[3]; 2418 u32 element_count; 2419 }; 2420 2421 struct acpi_phat_version_element { 2422 u8 guid[16]; 2423 u64 version_value; 2424 u32 producer_id; 2425 }; 2426 2427 /* 1: Firmware Health Data Record */ 2428 2429 struct acpi_phat_health_data { 2430 struct acpi_phat_header header; 2431 u8 reserved[2]; 2432 u8 health; 2433 u8 device_guid[16]; 2434 u32 device_specific_offset; /* Zero if no Device-specific data */ 2435 }; 2436 2437 /* Values for Health field above */ 2438 2439 #define ACPI_PHAT_ERRORS_FOUND 0 2440 #define ACPI_PHAT_NO_ERRORS 1 2441 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2442 #define ACPI_PHAT_ADVISORY 3 2443 2444 /******************************************************************************* 2445 * 2446 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2447 * Version 1 2448 * 2449 ******************************************************************************/ 2450 2451 struct acpi_table_pmtt { 2452 struct acpi_table_header header; /* Common ACPI table header */ 2453 u32 memory_device_count; 2454 /* 2455 * Immediately followed by: 2456 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2457 */ 2458 }; 2459 2460 /* Common header for PMTT subtables that follow main table */ 2461 2462 struct acpi_pmtt_header { 2463 u8 type; 2464 u8 reserved1; 2465 u16 length; 2466 u16 flags; 2467 u16 reserved2; 2468 u32 memory_device_count; /* Zero means no memory device structs follow */ 2469 /* 2470 * Immediately followed by: 2471 * u8 type_specific_data[] 2472 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2473 */ 2474 }; 2475 2476 /* Values for Type field above */ 2477 2478 #define ACPI_PMTT_TYPE_SOCKET 0 2479 #define ACPI_PMTT_TYPE_CONTROLLER 1 2480 #define ACPI_PMTT_TYPE_DIMM 2 2481 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2482 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2483 2484 /* Values for Flags field above */ 2485 2486 #define ACPI_PMTT_TOP_LEVEL 0x0001 2487 #define ACPI_PMTT_PHYSICAL 0x0002 2488 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2489 2490 /* 2491 * PMTT subtables, correspond to Type in struct acpi_pmtt_header 2492 */ 2493 2494 /* 0: Socket Structure */ 2495 2496 struct acpi_pmtt_socket { 2497 struct acpi_pmtt_header header; 2498 u16 socket_id; 2499 u16 reserved; 2500 }; 2501 /* 2502 * Immediately followed by: 2503 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2504 */ 2505 2506 /* 1: Memory Controller subtable */ 2507 2508 struct acpi_pmtt_controller { 2509 struct acpi_pmtt_header header; 2510 u16 controller_id; 2511 u16 reserved; 2512 }; 2513 /* 2514 * Immediately followed by: 2515 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2516 */ 2517 2518 /* 2: Physical Component Identifier (DIMM) */ 2519 2520 struct acpi_pmtt_physical_component { 2521 struct acpi_pmtt_header header; 2522 u32 bios_handle; 2523 }; 2524 2525 /* 0xFF: Vendor Specific Data */ 2526 2527 struct acpi_pmtt_vendor_specific { 2528 struct acpi_pmtt_header header; 2529 u8 type_uuid[16]; 2530 u8 specific[]; 2531 /* 2532 * Immediately followed by: 2533 * u8 vendor_specific_data[]; 2534 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2535 */ 2536 }; 2537 2538 /******************************************************************************* 2539 * 2540 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2541 * Version 1 2542 * 2543 ******************************************************************************/ 2544 2545 struct acpi_table_pptt { 2546 struct acpi_table_header header; /* Common ACPI table header */ 2547 }; 2548 2549 /* Values for Type field above */ 2550 2551 enum acpi_pptt_type { 2552 ACPI_PPTT_TYPE_PROCESSOR = 0, 2553 ACPI_PPTT_TYPE_CACHE = 1, 2554 ACPI_PPTT_TYPE_ID = 2, 2555 ACPI_PPTT_TYPE_RESERVED = 3 2556 }; 2557 2558 /* 0: Processor Hierarchy Node Structure */ 2559 2560 struct acpi_pptt_processor { 2561 struct acpi_subtable_header header; 2562 u16 reserved; 2563 u32 flags; 2564 u32 parent; 2565 u32 acpi_processor_id; 2566 u32 number_of_priv_resources; 2567 }; 2568 2569 /* Flags */ 2570 2571 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2572 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2573 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2574 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2575 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2576 2577 /* 1: Cache Type Structure */ 2578 2579 struct acpi_pptt_cache { 2580 struct acpi_subtable_header header; 2581 u16 reserved; 2582 u32 flags; 2583 u32 next_level_of_cache; 2584 u32 size; 2585 u32 number_of_sets; 2586 u8 associativity; 2587 u8 attributes; 2588 u16 line_size; 2589 }; 2590 2591 /* 1: Cache Type Structure for PPTT version 3 */ 2592 2593 struct acpi_pptt_cache_v1 { 2594 u32 cache_id; 2595 }; 2596 2597 /* Flags */ 2598 2599 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2600 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2601 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2602 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2603 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2604 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2605 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2606 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2607 2608 /* Masks for Attributes */ 2609 2610 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2611 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2612 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2613 2614 /* Attributes describing cache */ 2615 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2616 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2617 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2618 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2619 2620 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2621 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2622 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2623 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2624 2625 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2626 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2627 2628 /* 2: ID Structure */ 2629 2630 struct acpi_pptt_id { 2631 struct acpi_subtable_header header; 2632 u16 reserved; 2633 u32 vendor_id; 2634 u64 level1_id; 2635 u64 level2_id; 2636 u16 major_rev; 2637 u16 minor_rev; 2638 u16 spin_rev; 2639 }; 2640 2641 /******************************************************************************* 2642 * 2643 * PRMT - Platform Runtime Mechanism Table 2644 * Version 1 2645 * 2646 ******************************************************************************/ 2647 2648 struct acpi_table_prmt { 2649 struct acpi_table_header header; /* Common ACPI table header */ 2650 }; 2651 2652 struct acpi_table_prmt_header { 2653 u8 platform_guid[16]; 2654 u32 module_info_offset; 2655 u32 module_info_count; 2656 }; 2657 2658 struct acpi_prmt_module_header { 2659 u16 revision; 2660 u16 length; 2661 }; 2662 2663 struct acpi_prmt_module_info { 2664 u16 revision; 2665 u16 length; 2666 u8 module_guid[16]; 2667 u16 major_rev; 2668 u16 minor_rev; 2669 u16 handler_info_count; 2670 u32 handler_info_offset; 2671 u64 mmio_list_pointer; 2672 }; 2673 2674 struct acpi_prmt_handler_info { 2675 u16 revision; 2676 u16 length; 2677 u8 handler_guid[16]; 2678 u64 handler_address; 2679 u64 static_data_buffer_address; 2680 u64 acpi_param_buffer_address; 2681 }; 2682 2683 /******************************************************************************* 2684 * 2685 * RASF - RAS Feature Table (ACPI 5.0) 2686 * Version 1 2687 * 2688 ******************************************************************************/ 2689 2690 struct acpi_table_rasf { 2691 struct acpi_table_header header; /* Common ACPI table header */ 2692 u8 channel_id[12]; 2693 }; 2694 2695 /* RASF Platform Communication Channel Shared Memory Region */ 2696 2697 struct acpi_rasf_shared_memory { 2698 u32 signature; 2699 u16 command; 2700 u16 status; 2701 u16 version; 2702 u8 capabilities[16]; 2703 u8 set_capabilities[16]; 2704 u16 num_parameter_blocks; 2705 u32 set_capabilities_status; 2706 }; 2707 2708 /* RASF Parameter Block Structure Header */ 2709 2710 struct acpi_rasf_parameter_block { 2711 u16 type; 2712 u16 version; 2713 u16 length; 2714 }; 2715 2716 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2717 2718 struct acpi_rasf_patrol_scrub_parameter { 2719 struct acpi_rasf_parameter_block header; 2720 u16 patrol_scrub_command; 2721 u64 requested_address_range[2]; 2722 u64 actual_address_range[2]; 2723 u16 flags; 2724 u8 requested_speed; 2725 }; 2726 2727 /* Masks for Flags and Speed fields above */ 2728 2729 #define ACPI_RASF_SCRUBBER_RUNNING 1 2730 #define ACPI_RASF_SPEED (7<<1) 2731 #define ACPI_RASF_SPEED_SLOW (0<<1) 2732 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2733 #define ACPI_RASF_SPEED_FAST (7<<1) 2734 2735 /* Channel Commands */ 2736 2737 enum acpi_rasf_commands { 2738 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2739 }; 2740 2741 /* Platform RAS Capabilities */ 2742 2743 enum acpi_rasf_capabiliities { 2744 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2745 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2746 }; 2747 2748 /* Patrol Scrub Commands */ 2749 2750 enum acpi_rasf_patrol_scrub_commands { 2751 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2752 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2753 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2754 }; 2755 2756 /* Channel Command flags */ 2757 2758 #define ACPI_RASF_GENERATE_SCI (1<<15) 2759 2760 /* Status values */ 2761 2762 enum acpi_rasf_status { 2763 ACPI_RASF_SUCCESS = 0, 2764 ACPI_RASF_NOT_VALID = 1, 2765 ACPI_RASF_NOT_SUPPORTED = 2, 2766 ACPI_RASF_BUSY = 3, 2767 ACPI_RASF_FAILED = 4, 2768 ACPI_RASF_ABORTED = 5, 2769 ACPI_RASF_INVALID_DATA = 6 2770 }; 2771 2772 /* Status flags */ 2773 2774 #define ACPI_RASF_COMMAND_COMPLETE (1) 2775 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2776 #define ACPI_RASF_ERROR (1<<2) 2777 #define ACPI_RASF_STATUS (0x1F<<3) 2778 2779 /******************************************************************************* 2780 * 2781 * RAS2 - RAS2 Feature Table (ACPI 6.5) 2782 * Version 1 2783 * 2784 * 2785 ******************************************************************************/ 2786 2787 struct acpi_table_ras2 { 2788 struct acpi_table_header header; /* Common ACPI table header */ 2789 u16 reserved; 2790 u16 num_pcc_descs; 2791 }; 2792 2793 /* RAS2 Platform Communication Channel Descriptor */ 2794 2795 struct acpi_ras2_pcc_desc { 2796 u8 channel_id; 2797 u16 reserved; 2798 u8 feature_type; 2799 u32 instance; 2800 }; 2801 2802 /* RAS2 Platform Communication Channel Shared Memory Region */ 2803 2804 struct acpi_ras2_shared_memory { 2805 u32 signature; 2806 u16 command; 2807 u16 status; 2808 u16 version; 2809 u8 features[16]; 2810 u8 set_capabilities[16]; 2811 u16 num_parameter_blocks; 2812 u32 set_capabilities_status; 2813 }; 2814 2815 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 2816 2817 struct acpi_ras2_parameter_block { 2818 u16 type; 2819 u16 version; 2820 u16 length; 2821 }; 2822 2823 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 2824 2825 struct acpi_ras2_patrol_scrub_parameter { 2826 struct acpi_ras2_parameter_block header; 2827 u16 patrol_scrub_command; 2828 u64 requested_address_range[2]; 2829 u64 actual_address_range[2]; 2830 u32 flags; 2831 u32 scrub_params_out; 2832 u32 scrub_params_in; 2833 }; 2834 2835 /* Masks for Flags field above */ 2836 2837 #define ACPI_RAS2_SCRUBBER_RUNNING 1 2838 2839 /* RAS2 Parameter Block Structure for LA2PA_TRANSLATION */ 2840 2841 struct acpi_ras2_la2pa_translation_parameter { 2842 struct acpi_ras2_parameter_block header; 2843 u16 addr_translation_command; 2844 u64 sub_inst_id; 2845 u64 logical_address; 2846 u64 physical_address; 2847 u32 status; 2848 }; 2849 2850 /* Channel Commands */ 2851 2852 enum acpi_ras2_commands { 2853 ACPI_RAS2_EXECUTE_RAS2_COMMAND = 1 2854 }; 2855 2856 /* Platform RAS2 Features */ 2857 2858 enum acpi_ras2_features { 2859 ACPI_RAS2_PATROL_SCRUB_SUPPORTED = 0, 2860 ACPI_RAS2_LA2PA_TRANSLATION = 1 2861 }; 2862 2863 /* RAS2 Patrol Scrub Commands */ 2864 2865 enum acpi_ras2_patrol_scrub_commands { 2866 ACPI_RAS2_GET_PATROL_PARAMETERS = 1, 2867 ACPI_RAS2_START_PATROL_SCRUBBER = 2, 2868 ACPI_RAS2_STOP_PATROL_SCRUBBER = 3 2869 }; 2870 2871 /* RAS2 LA2PA Translation Commands */ 2872 2873 enum acpi_ras2_la2_pa_translation_commands { 2874 ACPI_RAS2_GET_LA2PA_TRANSLATION = 1, 2875 }; 2876 2877 /* RAS2 LA2PA Translation Status values */ 2878 2879 enum acpi_ras2_la2_pa_translation_status { 2880 ACPI_RAS2_LA2PA_TRANSLATION_SUCCESS = 0, 2881 ACPI_RAS2_LA2PA_TRANSLATION_FAIL = 1, 2882 }; 2883 2884 /* Channel Command flags */ 2885 2886 #define ACPI_RAS2_GENERATE_SCI (1<<15) 2887 2888 /* Status values */ 2889 2890 enum acpi_ras2_status { 2891 ACPI_RAS2_SUCCESS = 0, 2892 ACPI_RAS2_NOT_VALID = 1, 2893 ACPI_RAS2_NOT_SUPPORTED = 2, 2894 ACPI_RAS2_BUSY = 3, 2895 ACPI_RAS2_FAILED = 4, 2896 ACPI_RAS2_ABORTED = 5, 2897 ACPI_RAS2_INVALID_DATA = 6 2898 }; 2899 2900 /* Status flags */ 2901 2902 #define ACPI_RAS2_COMMAND_COMPLETE (1) 2903 #define ACPI_RAS2_SCI_DOORBELL (1<<1) 2904 #define ACPI_RAS2_ERROR (1<<2) 2905 #define ACPI_RAS2_STATUS (0x1F<<3) 2906 2907 /******************************************************************************* 2908 * 2909 * RGRT - Regulatory Graphics Resource Table 2910 * Version 1 2911 * 2912 * Conforms to "ACPI RGRT" available at: 2913 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/ 2914 * 2915 ******************************************************************************/ 2916 2917 struct acpi_table_rgrt { 2918 struct acpi_table_header header; /* Common ACPI table header */ 2919 u16 version; 2920 u8 image_type; 2921 u8 reserved; 2922 u8 image[]; 2923 }; 2924 2925 /* image_type values */ 2926 2927 enum acpi_rgrt_image_type { 2928 ACPI_RGRT_TYPE_RESERVED0 = 0, 2929 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 2930 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2931 }; 2932 2933 /******************************************************************************* 2934 * 2935 * RHCT - RISC-V Hart Capabilities Table 2936 * Version 1 2937 * 2938 ******************************************************************************/ 2939 2940 struct acpi_table_rhct { 2941 struct acpi_table_header header; /* Common ACPI table header */ 2942 u32 flags; /* RHCT flags */ 2943 u64 time_base_freq; 2944 u32 node_count; 2945 u32 node_offset; 2946 }; 2947 2948 /* RHCT Flags */ 2949 2950 #define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1) 2951 /* 2952 * RHCT subtables 2953 */ 2954 struct acpi_rhct_node_header { 2955 u16 type; 2956 u16 length; 2957 u16 revision; 2958 }; 2959 2960 /* Values for RHCT subtable Type above */ 2961 2962 enum acpi_rhct_node_type { 2963 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000, 2964 ACPI_RHCT_NODE_TYPE_CMO = 0x0001, 2965 ACPI_RHCT_NODE_TYPE_MMU = 0x0002, 2966 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003, 2967 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF, 2968 }; 2969 2970 /* 2971 * RHCT node specific subtables 2972 */ 2973 2974 /* ISA string node structure */ 2975 struct acpi_rhct_isa_string { 2976 u16 isa_length; 2977 char isa[]; 2978 }; 2979 2980 struct acpi_rhct_cmo_node { 2981 u8 reserved; /* Must be zero */ 2982 u8 cbom_size; /* CBOM size in powerof 2 */ 2983 u8 cbop_size; /* CBOP size in powerof 2 */ 2984 u8 cboz_size; /* CBOZ size in powerof 2 */ 2985 }; 2986 2987 struct acpi_rhct_mmu_node { 2988 u8 reserved; /* Must be zero */ 2989 u8 mmu_type; /* Virtual Address Scheme */ 2990 }; 2991 2992 enum acpi_rhct_mmu_type { 2993 ACPI_RHCT_MMU_TYPE_SV39 = 0, 2994 ACPI_RHCT_MMU_TYPE_SV48 = 1, 2995 ACPI_RHCT_MMU_TYPE_SV57 = 2 2996 }; 2997 2998 /* Hart Info node structure */ 2999 struct acpi_rhct_hart_info { 3000 u16 num_offsets; 3001 u32 uid; /* ACPI processor UID */ 3002 }; 3003 3004 /******************************************************************************* 3005 * 3006 * SBST - Smart Battery Specification Table 3007 * Version 1 3008 * 3009 ******************************************************************************/ 3010 3011 struct acpi_table_sbst { 3012 struct acpi_table_header header; /* Common ACPI table header */ 3013 u32 warning_level; 3014 u32 low_level; 3015 u32 critical_level; 3016 }; 3017 3018 /******************************************************************************* 3019 * 3020 * SDEI - Software Delegated Exception Interface Descriptor Table 3021 * 3022 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 3023 * May 8th, 2017. Copyright 2017 ARM Ltd. 3024 * 3025 ******************************************************************************/ 3026 3027 struct acpi_table_sdei { 3028 struct acpi_table_header header; /* Common ACPI table header */ 3029 }; 3030 3031 /******************************************************************************* 3032 * 3033 * SDEV - Secure Devices Table (ACPI 6.2) 3034 * Version 1 3035 * 3036 ******************************************************************************/ 3037 3038 struct acpi_table_sdev { 3039 struct acpi_table_header header; /* Common ACPI table header */ 3040 }; 3041 3042 struct acpi_sdev_header { 3043 u8 type; 3044 u8 flags; 3045 u16 length; 3046 }; 3047 3048 /* Values for subtable type above */ 3049 3050 enum acpi_sdev_type { 3051 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 3052 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 3053 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3054 }; 3055 3056 /* Values for flags above */ 3057 3058 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 3059 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 3060 3061 /* 3062 * SDEV subtables 3063 */ 3064 3065 /* 0: Namespace Device Based Secure Device Structure */ 3066 3067 struct acpi_sdev_namespace { 3068 struct acpi_sdev_header header; 3069 u16 device_id_offset; 3070 u16 device_id_length; 3071 u16 vendor_data_offset; 3072 u16 vendor_data_length; 3073 }; 3074 3075 struct acpi_sdev_secure_component { 3076 u16 secure_component_offset; 3077 u16 secure_component_length; 3078 }; 3079 3080 /* 3081 * SDEV sub-subtables ("Components") for above 3082 */ 3083 struct acpi_sdev_component { 3084 struct acpi_sdev_header header; 3085 }; 3086 3087 /* Values for sub-subtable type above */ 3088 3089 enum acpi_sac_type { 3090 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 3091 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 3092 }; 3093 3094 struct acpi_sdev_id_component { 3095 struct acpi_sdev_header header; 3096 u16 hardware_id_offset; 3097 u16 hardware_id_length; 3098 u16 subsystem_id_offset; 3099 u16 subsystem_id_length; 3100 u16 hardware_revision; 3101 u8 hardware_rev_present; 3102 u8 class_code_present; 3103 u8 pci_base_class; 3104 u8 pci_sub_class; 3105 u8 pci_programming_xface; 3106 }; 3107 3108 struct acpi_sdev_mem_component { 3109 struct acpi_sdev_header header; 3110 u32 reserved; 3111 u64 memory_base_address; 3112 u64 memory_length; 3113 }; 3114 3115 /* 1: PCIe Endpoint Device Based Device Structure */ 3116 3117 struct acpi_sdev_pcie { 3118 struct acpi_sdev_header header; 3119 u16 segment; 3120 u16 start_bus; 3121 u16 path_offset; 3122 u16 path_length; 3123 u16 vendor_data_offset; 3124 u16 vendor_data_length; 3125 }; 3126 3127 /* 1a: PCIe Endpoint path entry */ 3128 3129 struct acpi_sdev_pcie_path { 3130 u8 device; 3131 u8 function; 3132 }; 3133 3134 /******************************************************************************* 3135 * 3136 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 3137 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3138 * Trust Domain Extensions (Intel TDX)". 3139 * Version 1 3140 * 3141 ******************************************************************************/ 3142 3143 struct acpi_table_svkl { 3144 struct acpi_table_header header; /* Common ACPI table header */ 3145 u32 count; 3146 }; 3147 3148 struct acpi_svkl_key { 3149 u16 type; 3150 u16 format; 3151 u32 size; 3152 u64 address; 3153 }; 3154 3155 enum acpi_svkl_type { 3156 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 3157 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 3158 }; 3159 3160 enum acpi_svkl_format { 3161 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 3162 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 3163 }; 3164 3165 /******************************************************************************* 3166 * 3167 * TDEL - TD-Event Log 3168 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3169 * Trust Domain Extensions (Intel TDX)". 3170 * September 2020 3171 * 3172 ******************************************************************************/ 3173 3174 struct acpi_table_tdel { 3175 struct acpi_table_header header; /* Common ACPI table header */ 3176 u32 reserved; 3177 u64 log_area_minimum_length; 3178 u64 log_area_start_address; 3179 }; 3180 3181 /* Reset to default packing */ 3182 3183 #pragma pack() 3184 3185 #endif /* __ACTBL2_H__ */ 3186