1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 5 * 6 * Copyright (C) 2000 - 2023, Intel Corp. 7 * 8 *****************************************************************************/ 9 10 #ifndef __ACTBL2_H__ 11 #define __ACTBL2_H__ 12 13 /******************************************************************************* 14 * 15 * Additional ACPI Tables (2) 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22 /* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 28 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 29 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 30 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 31 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 32 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 33 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 34 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 35 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 36 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 37 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 38 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */ 39 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 40 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 41 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 42 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 43 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 44 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 45 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 46 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 47 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 48 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 49 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 50 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 51 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 52 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 53 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 54 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 55 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 56 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 57 58 /* 59 * All tables must be byte-packed to match the ACPI specification, since 60 * the tables are provided by the system BIOS. 61 */ 62 #pragma pack(1) 63 64 /* 65 * Note: C bitfields are not used for this reason: 66 * 67 * "Bitfields are great and easy to read, but unfortunately the C language 68 * does not specify the layout of bitfields in memory, which means they are 69 * essentially useless for dealing with packed data in on-disk formats or 70 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 71 * this decision was a design error in C. Ritchie could have picked an order 72 * and stuck with it." Norman Ramsey. 73 * See http://stackoverflow.com/a/1053662/41661 74 */ 75 76 /******************************************************************************* 77 * 78 * AEST - Arm Error Source Table 79 * 80 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 81 * September 2020. 82 * 83 ******************************************************************************/ 84 85 struct acpi_table_aest { 86 struct acpi_table_header header; 87 }; 88 89 /* Common Subtable header - one per Node Structure (Subtable) */ 90 91 struct acpi_aest_hdr { 92 u8 type; 93 u16 length; 94 u8 reserved; 95 u32 node_specific_offset; 96 u32 node_interface_offset; 97 u32 node_interrupt_offset; 98 u32 node_interrupt_count; 99 u64 timestamp_rate; 100 u64 reserved1; 101 u64 error_injection_rate; 102 }; 103 104 /* Values for Type above */ 105 106 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 107 #define ACPI_AEST_MEMORY_ERROR_NODE 1 108 #define ACPI_AEST_SMMU_ERROR_NODE 2 109 #define ACPI_AEST_VENDOR_ERROR_NODE 3 110 #define ACPI_AEST_GIC_ERROR_NODE 4 111 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 112 113 /* 114 * AEST subtables (Error nodes) 115 */ 116 117 /* 0: Processor Error */ 118 119 typedef struct acpi_aest_processor { 120 u32 processor_id; 121 u8 resource_type; 122 u8 reserved; 123 u8 flags; 124 u8 revision; 125 u64 processor_affinity; 126 127 } acpi_aest_processor; 128 129 /* Values for resource_type above, related structs below */ 130 131 #define ACPI_AEST_CACHE_RESOURCE 0 132 #define ACPI_AEST_TLB_RESOURCE 1 133 #define ACPI_AEST_GENERIC_RESOURCE 2 134 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 135 136 /* 0R: Processor Cache Resource Substructure */ 137 138 typedef struct acpi_aest_processor_cache { 139 u32 cache_reference; 140 u32 reserved; 141 142 } acpi_aest_processor_cache; 143 144 /* Values for cache_type above */ 145 146 #define ACPI_AEST_CACHE_DATA 0 147 #define ACPI_AEST_CACHE_INSTRUCTION 1 148 #define ACPI_AEST_CACHE_UNIFIED 2 149 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 150 151 /* 1R: Processor TLB Resource Substructure */ 152 153 typedef struct acpi_aest_processor_tlb { 154 u32 tlb_level; 155 u32 reserved; 156 157 } acpi_aest_processor_tlb; 158 159 /* 2R: Processor Generic Resource Substructure */ 160 161 typedef struct acpi_aest_processor_generic { 162 u32 resource; 163 164 } acpi_aest_processor_generic; 165 166 /* 1: Memory Error */ 167 168 typedef struct acpi_aest_memory { 169 u32 srat_proximity_domain; 170 171 } acpi_aest_memory; 172 173 /* 2: Smmu Error */ 174 175 typedef struct acpi_aest_smmu { 176 u32 iort_node_reference; 177 u32 subcomponent_reference; 178 179 } acpi_aest_smmu; 180 181 /* 3: Vendor Defined */ 182 183 typedef struct acpi_aest_vendor { 184 u32 acpi_hid; 185 u32 acpi_uid; 186 u8 vendor_specific_data[16]; 187 188 } acpi_aest_vendor; 189 190 /* 4: Gic Error */ 191 192 typedef struct acpi_aest_gic { 193 u32 interface_type; 194 u32 instance_id; 195 196 } acpi_aest_gic; 197 198 /* Values for interface_type above */ 199 200 #define ACPI_AEST_GIC_CPU 0 201 #define ACPI_AEST_GIC_DISTRIBUTOR 1 202 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 203 #define ACPI_AEST_GIC_ITS 3 204 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 205 206 /* Node Interface Structure */ 207 208 typedef struct acpi_aest_node_interface { 209 u8 type; 210 u8 reserved[3]; 211 u32 flags; 212 u64 address; 213 u32 error_record_index; 214 u32 error_record_count; 215 u64 error_record_implemented; 216 u64 error_status_reporting; 217 u64 addressing_mode; 218 219 } acpi_aest_node_interface; 220 221 /* Values for Type field above */ 222 223 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 224 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 225 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 226 227 /* Node Interrupt Structure */ 228 229 typedef struct acpi_aest_node_interrupt { 230 u8 type; 231 u8 reserved[2]; 232 u8 flags; 233 u32 gsiv; 234 u8 iort_id; 235 u8 reserved1[3]; 236 237 } acpi_aest_node_interrupt; 238 239 /* Values for Type field above */ 240 241 #define ACPI_AEST_NODE_FAULT_HANDLING 0 242 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 243 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 244 245 /******************************************************************************* 246 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 247 * 248 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 249 * ARM DEN0093 v1.1 250 * 251 ******************************************************************************/ 252 struct acpi_table_agdi { 253 struct acpi_table_header header; /* Common ACPI table header */ 254 u8 flags; 255 u8 reserved[3]; 256 u32 sdei_event; 257 u32 gsiv; 258 }; 259 260 /* Mask for Flags field above */ 261 262 #define ACPI_AGDI_SIGNALING_MODE (1) 263 264 /******************************************************************************* 265 * 266 * APMT - ARM Performance Monitoring Unit Table 267 * 268 * Conforms to: 269 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 270 * ARM DEN0117 v1.0 November 25, 2021 271 * 272 ******************************************************************************/ 273 274 struct acpi_table_apmt { 275 struct acpi_table_header header; /* Common ACPI table header */ 276 }; 277 278 #define ACPI_APMT_NODE_ID_LENGTH 4 279 280 /* 281 * APMT subtables 282 */ 283 struct acpi_apmt_node { 284 u16 length; 285 u8 flags; 286 u8 type; 287 u32 id; 288 u64 inst_primary; 289 u32 inst_secondary; 290 u64 base_address0; 291 u64 base_address1; 292 u32 ovflw_irq; 293 u32 reserved; 294 u32 ovflw_irq_flags; 295 u32 proc_affinity; 296 u32 impl_id; 297 }; 298 299 /* Masks for Flags field above */ 300 301 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 302 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 303 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 304 305 /* Values for Flags dual page field above */ 306 307 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 308 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 309 310 /* Values for Flags processor affinity field above */ 311 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 312 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 313 314 /* Values for Flags 64-bit atomic field above */ 315 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 316 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 317 318 /* Values for Type field above */ 319 320 enum acpi_apmt_node_type { 321 ACPI_APMT_NODE_TYPE_MC = 0x00, 322 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 323 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 324 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 325 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 326 ACPI_APMT_NODE_TYPE_COUNT 327 }; 328 329 /* Masks for ovflw_irq_flags field above */ 330 331 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 332 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 333 334 /* Values for ovflw_irq_flags mode field above */ 335 336 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 337 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 338 339 /* Values for ovflw_irq_flags type field above */ 340 341 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 342 343 /******************************************************************************* 344 * 345 * BDAT - BIOS Data ACPI Table 346 * 347 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 348 * Nov 2020 349 * 350 ******************************************************************************/ 351 352 struct acpi_table_bdat { 353 struct acpi_table_header header; 354 struct acpi_generic_address gas; 355 }; 356 357 /******************************************************************************* 358 * 359 * CCEL - CC-Event Log 360 * From: "Guest-Host-Communication Interface (GHCI) for Intel 361 * Trust Domain Extensions (Intel TDX)". Feb 2022 362 * 363 ******************************************************************************/ 364 365 struct acpi_table_ccel { 366 struct acpi_table_header header; /* Common ACPI table header */ 367 u8 CCtype; 368 u8 Ccsub_type; 369 u16 reserved; 370 u64 log_area_minimum_length; 371 u64 log_area_start_address; 372 }; 373 374 /******************************************************************************* 375 * 376 * IORT - IO Remapping Table 377 * 378 * Conforms to "IO Remapping Table System Software on ARM Platforms", 379 * Document number: ARM DEN 0049E.e, Sep 2022 380 * 381 ******************************************************************************/ 382 383 struct acpi_table_iort { 384 struct acpi_table_header header; 385 u32 node_count; 386 u32 node_offset; 387 u32 reserved; 388 }; 389 390 /* 391 * IORT subtables 392 */ 393 struct acpi_iort_node { 394 u8 type; 395 u16 length; 396 u8 revision; 397 u32 identifier; 398 u32 mapping_count; 399 u32 mapping_offset; 400 char node_data[]; 401 }; 402 403 /* Values for subtable Type above */ 404 405 enum acpi_iort_node_type { 406 ACPI_IORT_NODE_ITS_GROUP = 0x00, 407 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 408 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 409 ACPI_IORT_NODE_SMMU = 0x03, 410 ACPI_IORT_NODE_SMMU_V3 = 0x04, 411 ACPI_IORT_NODE_PMCG = 0x05, 412 ACPI_IORT_NODE_RMR = 0x06, 413 }; 414 415 struct acpi_iort_id_mapping { 416 u32 input_base; /* Lowest value in input range */ 417 u32 id_count; /* Number of IDs */ 418 u32 output_base; /* Lowest value in output range */ 419 u32 output_reference; /* A reference to the output node */ 420 u32 flags; 421 }; 422 423 /* Masks for Flags field above for IORT subtable */ 424 425 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 426 427 struct acpi_iort_memory_access { 428 u32 cache_coherency; 429 u8 hints; 430 u16 reserved; 431 u8 memory_flags; 432 }; 433 434 /* Values for cache_coherency field above */ 435 436 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 437 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 438 439 /* Masks for Hints field above */ 440 441 #define ACPI_IORT_HT_TRANSIENT (1) 442 #define ACPI_IORT_HT_WRITE (1<<1) 443 #define ACPI_IORT_HT_READ (1<<2) 444 #define ACPI_IORT_HT_OVERRIDE (1<<3) 445 446 /* Masks for memory_flags field above */ 447 448 #define ACPI_IORT_MF_COHERENCY (1) 449 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 450 451 /* 452 * IORT node specific subtables 453 */ 454 struct acpi_iort_its_group { 455 u32 its_count; 456 u32 identifiers[]; /* GIC ITS identifier array */ 457 }; 458 459 struct acpi_iort_named_component { 460 u32 node_flags; 461 u64 memory_properties; /* Memory access properties */ 462 u8 memory_address_limit; /* Memory address size limit */ 463 char device_name[]; /* Path of namespace object */ 464 }; 465 466 /* Masks for Flags field above */ 467 468 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 469 #define ACPI_IORT_NC_PASID_BITS (31<<1) 470 471 struct acpi_iort_root_complex { 472 u64 memory_properties; /* Memory access properties */ 473 u32 ats_attribute; 474 u32 pci_segment_number; 475 u8 memory_address_limit; /* Memory address size limit */ 476 u16 pasid_capabilities; /* PASID Capabilities */ 477 u8 reserved[]; /* Reserved, must be zero */ 478 }; 479 480 /* Masks for ats_attribute field above */ 481 482 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 483 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 484 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 485 486 /* Masks for pasid_capabilities field above */ 487 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 488 489 struct acpi_iort_smmu { 490 u64 base_address; /* SMMU base address */ 491 u64 span; /* Length of memory range */ 492 u32 model; 493 u32 flags; 494 u32 global_interrupt_offset; 495 u32 context_interrupt_count; 496 u32 context_interrupt_offset; 497 u32 pmu_interrupt_count; 498 u32 pmu_interrupt_offset; 499 u64 interrupts[]; /* Interrupt array */ 500 }; 501 502 /* Values for Model field above */ 503 504 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 505 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 506 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 507 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 508 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 509 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */ 510 511 /* Masks for Flags field above */ 512 513 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 514 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 515 516 /* Global interrupt format */ 517 518 struct acpi_iort_smmu_gsi { 519 u32 nsg_irpt; 520 u32 nsg_irpt_flags; 521 u32 nsg_cfg_irpt; 522 u32 nsg_cfg_irpt_flags; 523 }; 524 525 struct acpi_iort_smmu_v3 { 526 u64 base_address; /* SMMUv3 base address */ 527 u32 flags; 528 u32 reserved; 529 u64 vatos_address; 530 u32 model; 531 u32 event_gsiv; 532 u32 pri_gsiv; 533 u32 gerr_gsiv; 534 u32 sync_gsiv; 535 u32 pxm; 536 u32 id_mapping_index; 537 }; 538 539 /* Values for Model field above */ 540 541 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 542 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */ 543 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 544 545 /* Masks for Flags field above */ 546 547 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 548 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 549 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 550 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 551 552 struct acpi_iort_pmcg { 553 u64 page0_base_address; 554 u32 overflow_gsiv; 555 u32 node_reference; 556 u64 page1_base_address; 557 }; 558 559 struct acpi_iort_rmr { 560 u32 flags; 561 u32 rmr_count; 562 u32 rmr_offset; 563 }; 564 565 /* Masks for Flags field above */ 566 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 567 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 568 569 /* 570 * Macro to access the Access Attributes in flags field above: 571 * Access Attributes is encoded in bits 9:2 572 */ 573 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 574 575 /* Values for above Access Attributes */ 576 577 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 578 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 579 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 580 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 581 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 582 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 583 584 struct acpi_iort_rmr_desc { 585 u64 base_address; 586 u64 length; 587 u32 reserved; 588 }; 589 590 /******************************************************************************* 591 * 592 * IVRS - I/O Virtualization Reporting Structure 593 * Version 1 594 * 595 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 596 * Revision 1.26, February 2009. 597 * 598 ******************************************************************************/ 599 600 struct acpi_table_ivrs { 601 struct acpi_table_header header; /* Common ACPI table header */ 602 u32 info; /* Common virtualization info */ 603 u64 reserved; 604 }; 605 606 /* Values for Info field above */ 607 608 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 609 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 610 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 611 612 /* IVRS subtable header */ 613 614 struct acpi_ivrs_header { 615 u8 type; /* Subtable type */ 616 u8 flags; 617 u16 length; /* Subtable length */ 618 u16 device_id; /* ID of IOMMU */ 619 }; 620 621 /* Values for subtable Type above */ 622 623 enum acpi_ivrs_type { 624 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 625 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 626 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 627 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 628 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 629 ACPI_IVRS_TYPE_MEMORY3 = 0x22 630 }; 631 632 /* Masks for Flags field above for IVHD subtable */ 633 634 #define ACPI_IVHD_TT_ENABLE (1) 635 #define ACPI_IVHD_PASS_PW (1<<1) 636 #define ACPI_IVHD_RES_PASS_PW (1<<2) 637 #define ACPI_IVHD_ISOC (1<<3) 638 #define ACPI_IVHD_IOTLB (1<<4) 639 640 /* Masks for Flags field above for IVMD subtable */ 641 642 #define ACPI_IVMD_UNITY (1) 643 #define ACPI_IVMD_READ (1<<1) 644 #define ACPI_IVMD_WRITE (1<<2) 645 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 646 647 /* 648 * IVRS subtables, correspond to Type in struct acpi_ivrs_header 649 */ 650 651 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 652 653 struct acpi_ivrs_hardware_10 { 654 struct acpi_ivrs_header header; 655 u16 capability_offset; /* Offset for IOMMU control fields */ 656 u64 base_address; /* IOMMU control registers */ 657 u16 pci_segment_group; 658 u16 info; /* MSI number and unit ID */ 659 u32 feature_reporting; 660 }; 661 662 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 663 664 struct acpi_ivrs_hardware_11 { 665 struct acpi_ivrs_header header; 666 u16 capability_offset; /* Offset for IOMMU control fields */ 667 u64 base_address; /* IOMMU control registers */ 668 u16 pci_segment_group; 669 u16 info; /* MSI number and unit ID */ 670 u32 attributes; 671 u64 efr_register_image; 672 u64 reserved; 673 }; 674 675 /* Masks for Info field above */ 676 677 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 678 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */ 679 680 /* 681 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure. 682 * Upper two bits of the Type field are the (encoded) length of the structure. 683 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 684 * are reserved for future use but not defined. 685 */ 686 struct acpi_ivrs_de_header { 687 u8 type; 688 u16 id; 689 u8 data_setting; 690 }; 691 692 /* Length of device entry is in the top two bits of Type field above */ 693 694 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 695 696 /* Values for device entry Type field above */ 697 698 enum acpi_ivrs_device_entry_type { 699 /* 4-byte device entries, all use struct acpi_ivrs_device4 */ 700 701 ACPI_IVRS_TYPE_PAD4 = 0, 702 ACPI_IVRS_TYPE_ALL = 1, 703 ACPI_IVRS_TYPE_SELECT = 2, 704 ACPI_IVRS_TYPE_START = 3, 705 ACPI_IVRS_TYPE_END = 4, 706 707 /* 8-byte device entries */ 708 709 ACPI_IVRS_TYPE_PAD8 = 64, 710 ACPI_IVRS_TYPE_NOT_USED = 65, 711 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */ 712 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */ 713 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */ 714 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */ 715 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */ 716 717 /* Variable-length device entries */ 718 719 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 720 }; 721 722 /* Values for Data field above */ 723 724 #define ACPI_IVHD_INIT_PASS (1) 725 #define ACPI_IVHD_EINT_PASS (1<<1) 726 #define ACPI_IVHD_NMI_PASS (1<<2) 727 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 728 #define ACPI_IVHD_LINT0_PASS (1<<6) 729 #define ACPI_IVHD_LINT1_PASS (1<<7) 730 731 /* Types 0-4: 4-byte device entry */ 732 733 struct acpi_ivrs_device4 { 734 struct acpi_ivrs_de_header header; 735 }; 736 737 /* Types 66-67: 8-byte device entry */ 738 739 struct acpi_ivrs_device8a { 740 struct acpi_ivrs_de_header header; 741 u8 reserved1; 742 u16 used_id; 743 u8 reserved2; 744 }; 745 746 /* Types 70-71: 8-byte device entry */ 747 748 struct acpi_ivrs_device8b { 749 struct acpi_ivrs_de_header header; 750 u32 extended_data; 751 }; 752 753 /* Values for extended_data above */ 754 755 #define ACPI_IVHD_ATS_DISABLED (1<<31) 756 757 /* Type 72: 8-byte device entry */ 758 759 struct acpi_ivrs_device8c { 760 struct acpi_ivrs_de_header header; 761 u8 handle; 762 u16 used_id; 763 u8 variety; 764 }; 765 766 /* Values for Variety field above */ 767 768 #define ACPI_IVHD_IOAPIC 1 769 #define ACPI_IVHD_HPET 2 770 771 /* Type 240: variable-length device entry */ 772 773 struct acpi_ivrs_device_hid { 774 struct acpi_ivrs_de_header header; 775 u64 acpi_hid; 776 u64 acpi_cid; 777 u8 uid_type; 778 u8 uid_length; 779 }; 780 781 /* Values for uid_type above */ 782 783 #define ACPI_IVRS_UID_NOT_PRESENT 0 784 #define ACPI_IVRS_UID_IS_INTEGER 1 785 #define ACPI_IVRS_UID_IS_STRING 2 786 787 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 788 789 struct acpi_ivrs_memory { 790 struct acpi_ivrs_header header; 791 u16 aux_data; 792 u64 reserved; 793 u64 start_address; 794 u64 memory_length; 795 }; 796 797 /******************************************************************************* 798 * 799 * LPIT - Low Power Idle Table 800 * 801 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 802 * 803 ******************************************************************************/ 804 805 struct acpi_table_lpit { 806 struct acpi_table_header header; /* Common ACPI table header */ 807 }; 808 809 /* LPIT subtable header */ 810 811 struct acpi_lpit_header { 812 u32 type; /* Subtable type */ 813 u32 length; /* Subtable length */ 814 u16 unique_id; 815 u16 reserved; 816 u32 flags; 817 }; 818 819 /* Values for subtable Type above */ 820 821 enum acpi_lpit_type { 822 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 823 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 824 }; 825 826 /* Masks for Flags field above */ 827 828 #define ACPI_LPIT_STATE_DISABLED (1) 829 #define ACPI_LPIT_NO_COUNTER (1<<1) 830 831 /* 832 * LPIT subtables, correspond to Type in struct acpi_lpit_header 833 */ 834 835 /* 0x00: Native C-state instruction based LPI structure */ 836 837 struct acpi_lpit_native { 838 struct acpi_lpit_header header; 839 struct acpi_generic_address entry_trigger; 840 u32 residency; 841 u32 latency; 842 struct acpi_generic_address residency_counter; 843 u64 counter_frequency; 844 }; 845 846 /******************************************************************************* 847 * 848 * MADT - Multiple APIC Description Table 849 * Version 3 850 * 851 ******************************************************************************/ 852 853 struct acpi_table_madt { 854 struct acpi_table_header header; /* Common ACPI table header */ 855 u32 address; /* Physical address of local APIC */ 856 u32 flags; 857 }; 858 859 /* Masks for Flags field above */ 860 861 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 862 863 /* Values for PCATCompat flag */ 864 865 #define ACPI_MADT_DUAL_PIC 1 866 #define ACPI_MADT_MULTIPLE_APIC 0 867 868 /* Values for MADT subtable type in struct acpi_subtable_header */ 869 870 enum acpi_madt_type { 871 ACPI_MADT_TYPE_LOCAL_APIC = 0, 872 ACPI_MADT_TYPE_IO_APIC = 1, 873 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 874 ACPI_MADT_TYPE_NMI_SOURCE = 3, 875 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 876 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 877 ACPI_MADT_TYPE_IO_SAPIC = 6, 878 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 879 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 880 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 881 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 882 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 883 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 884 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 885 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 886 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 887 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 888 ACPI_MADT_TYPE_CORE_PIC = 17, 889 ACPI_MADT_TYPE_LIO_PIC = 18, 890 ACPI_MADT_TYPE_HT_PIC = 19, 891 ACPI_MADT_TYPE_EIO_PIC = 20, 892 ACPI_MADT_TYPE_MSI_PIC = 21, 893 ACPI_MADT_TYPE_BIO_PIC = 22, 894 ACPI_MADT_TYPE_LPC_PIC = 23, 895 ACPI_MADT_TYPE_RINTC = 24, 896 ACPI_MADT_TYPE_IMSIC = 25, 897 ACPI_MADT_TYPE_APLIC = 26, 898 ACPI_MADT_TYPE_PLIC = 27, 899 ACPI_MADT_TYPE_RESERVED = 28, /* 28 to 0x7F are reserved */ 900 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 901 }; 902 903 /* 904 * MADT Subtables, correspond to Type in struct acpi_subtable_header 905 */ 906 907 /* 0: Processor Local APIC */ 908 909 struct acpi_madt_local_apic { 910 struct acpi_subtable_header header; 911 u8 processor_id; /* ACPI processor id */ 912 u8 id; /* Processor's local APIC id */ 913 u32 lapic_flags; 914 }; 915 916 /* 1: IO APIC */ 917 918 struct acpi_madt_io_apic { 919 struct acpi_subtable_header header; 920 u8 id; /* I/O APIC ID */ 921 u8 reserved; /* reserved - must be zero */ 922 u32 address; /* APIC physical address */ 923 u32 global_irq_base; /* Global system interrupt where INTI lines start */ 924 }; 925 926 /* 2: Interrupt Override */ 927 928 struct acpi_madt_interrupt_override { 929 struct acpi_subtable_header header; 930 u8 bus; /* 0 - ISA */ 931 u8 source_irq; /* Interrupt source (IRQ) */ 932 u32 global_irq; /* Global system interrupt */ 933 u16 inti_flags; 934 }; 935 936 /* 3: NMI Source */ 937 938 struct acpi_madt_nmi_source { 939 struct acpi_subtable_header header; 940 u16 inti_flags; 941 u32 global_irq; /* Global system interrupt */ 942 }; 943 944 /* 4: Local APIC NMI */ 945 946 struct acpi_madt_local_apic_nmi { 947 struct acpi_subtable_header header; 948 u8 processor_id; /* ACPI processor id */ 949 u16 inti_flags; 950 u8 lint; /* LINTn to which NMI is connected */ 951 }; 952 953 /* 5: Address Override */ 954 955 struct acpi_madt_local_apic_override { 956 struct acpi_subtable_header header; 957 u16 reserved; /* Reserved, must be zero */ 958 u64 address; /* APIC physical address */ 959 }; 960 961 /* 6: I/O Sapic */ 962 963 struct acpi_madt_io_sapic { 964 struct acpi_subtable_header header; 965 u8 id; /* I/O SAPIC ID */ 966 u8 reserved; /* Reserved, must be zero */ 967 u32 global_irq_base; /* Global interrupt for SAPIC start */ 968 u64 address; /* SAPIC physical address */ 969 }; 970 971 /* 7: Local Sapic */ 972 973 struct acpi_madt_local_sapic { 974 struct acpi_subtable_header header; 975 u8 processor_id; /* ACPI processor id */ 976 u8 id; /* SAPIC ID */ 977 u8 eid; /* SAPIC EID */ 978 u8 reserved[3]; /* Reserved, must be zero */ 979 u32 lapic_flags; 980 u32 uid; /* Numeric UID - ACPI 3.0 */ 981 char uid_string[]; /* String UID - ACPI 3.0 */ 982 }; 983 984 /* 8: Platform Interrupt Source */ 985 986 struct acpi_madt_interrupt_source { 987 struct acpi_subtable_header header; 988 u16 inti_flags; 989 u8 type; /* 1=PMI, 2=INIT, 3=corrected */ 990 u8 id; /* Processor ID */ 991 u8 eid; /* Processor EID */ 992 u8 io_sapic_vector; /* Vector value for PMI interrupts */ 993 u32 global_irq; /* Global system interrupt */ 994 u32 flags; /* Interrupt Source Flags */ 995 }; 996 997 /* Masks for Flags field above */ 998 999 #define ACPI_MADT_CPEI_OVERRIDE (1) 1000 1001 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1002 1003 struct acpi_madt_local_x2apic { 1004 struct acpi_subtable_header header; 1005 u16 reserved; /* reserved - must be zero */ 1006 u32 local_apic_id; /* Processor x2APIC ID */ 1007 u32 lapic_flags; 1008 u32 uid; /* ACPI processor UID */ 1009 }; 1010 1011 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1012 1013 struct acpi_madt_local_x2apic_nmi { 1014 struct acpi_subtable_header header; 1015 u16 inti_flags; 1016 u32 uid; /* ACPI processor UID */ 1017 u8 lint; /* LINTn to which NMI is connected */ 1018 u8 reserved[3]; /* reserved - must be zero */ 1019 }; 1020 1021 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */ 1022 1023 struct acpi_madt_generic_interrupt { 1024 struct acpi_subtable_header header; 1025 u16 reserved; /* reserved - must be zero */ 1026 u32 cpu_interface_number; 1027 u32 uid; 1028 u32 flags; 1029 u32 parking_version; 1030 u32 performance_interrupt; 1031 u64 parked_address; 1032 u64 base_address; 1033 u64 gicv_base_address; 1034 u64 gich_base_address; 1035 u32 vgic_interrupt; 1036 u64 gicr_base_address; 1037 u64 arm_mpidr; 1038 u8 efficiency_class; 1039 u8 reserved2[1]; 1040 u16 spe_interrupt; /* ACPI 6.3 */ 1041 u16 trbe_interrupt; /* ACPI 6.5 */ 1042 }; 1043 1044 /* Masks for Flags field above */ 1045 1046 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1047 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1048 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1049 #define ACPI_MADT_GICC_ONLINE_CAPABLE (1<<3) /* 03: Processor is online capable */ 1050 #define ACPI_MADT_GICC_NON_COHERENT (1<<4) /* 04: GIC redistributor is not coherent */ 1051 1052 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1053 1054 struct acpi_madt_generic_distributor { 1055 struct acpi_subtable_header header; 1056 u16 reserved; /* reserved - must be zero */ 1057 u32 gic_id; 1058 u64 base_address; 1059 u32 global_irq_base; 1060 u8 version; 1061 u8 reserved2[3]; /* reserved - must be zero */ 1062 }; 1063 1064 /* Values for Version field above */ 1065 1066 enum acpi_madt_gic_version { 1067 ACPI_MADT_GIC_VERSION_NONE = 0, 1068 ACPI_MADT_GIC_VERSION_V1 = 1, 1069 ACPI_MADT_GIC_VERSION_V2 = 2, 1070 ACPI_MADT_GIC_VERSION_V3 = 3, 1071 ACPI_MADT_GIC_VERSION_V4 = 4, 1072 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1073 }; 1074 1075 /* 13: Generic MSI Frame (ACPI 5.1) */ 1076 1077 struct acpi_madt_generic_msi_frame { 1078 struct acpi_subtable_header header; 1079 u16 reserved; /* reserved - must be zero */ 1080 u32 msi_frame_id; 1081 u64 base_address; 1082 u32 flags; 1083 u16 spi_count; 1084 u16 spi_base; 1085 }; 1086 1087 /* Masks for Flags field above */ 1088 1089 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1090 1091 /* 14: Generic Redistributor (ACPI 5.1) */ 1092 1093 struct acpi_madt_generic_redistributor { 1094 struct acpi_subtable_header header; 1095 u8 flags; 1096 u8 reserved; /* reserved - must be zero */ 1097 u64 base_address; 1098 u32 length; 1099 }; 1100 1101 #define ACPI_MADT_GICR_NON_COHERENT (1) 1102 1103 /* 15: Generic Translator (ACPI 6.0) */ 1104 1105 struct acpi_madt_generic_translator { 1106 struct acpi_subtable_header header; 1107 u8 flags; 1108 u8 reserved; /* reserved - must be zero */ 1109 u32 translation_id; 1110 u64 base_address; 1111 u32 reserved2; 1112 }; 1113 1114 #define ACPI_MADT_ITS_NON_COHERENT (1) 1115 1116 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1117 1118 struct acpi_madt_multiproc_wakeup { 1119 struct acpi_subtable_header header; 1120 u16 mailbox_version; 1121 u32 reserved; /* reserved - must be zero */ 1122 u64 base_address; 1123 }; 1124 1125 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1126 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1127 1128 struct acpi_madt_multiproc_wakeup_mailbox { 1129 u16 command; 1130 u16 reserved; /* reserved - must be zero */ 1131 u32 apic_id; 1132 u64 wakeup_vector; 1133 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1134 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1135 }; 1136 1137 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1138 1139 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1140 1141 struct acpi_madt_core_pic { 1142 struct acpi_subtable_header header; 1143 u8 version; 1144 u32 processor_id; 1145 u32 core_id; 1146 u32 flags; 1147 }; 1148 1149 /* Values for Version field above */ 1150 1151 enum acpi_madt_core_pic_version { 1152 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1153 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1154 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1155 }; 1156 1157 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1158 1159 struct acpi_madt_lio_pic { 1160 struct acpi_subtable_header header; 1161 u8 version; 1162 u64 address; 1163 u16 size; 1164 u8 cascade[2]; 1165 u32 cascade_map[2]; 1166 }; 1167 1168 /* Values for Version field above */ 1169 1170 enum acpi_madt_lio_pic_version { 1171 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1172 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1173 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1174 }; 1175 1176 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1177 1178 struct acpi_madt_ht_pic { 1179 struct acpi_subtable_header header; 1180 u8 version; 1181 u64 address; 1182 u16 size; 1183 u8 cascade[8]; 1184 }; 1185 1186 /* Values for Version field above */ 1187 1188 enum acpi_madt_ht_pic_version { 1189 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1190 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1191 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1192 }; 1193 1194 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1195 1196 struct acpi_madt_eio_pic { 1197 struct acpi_subtable_header header; 1198 u8 version; 1199 u8 cascade; 1200 u8 node; 1201 u64 node_map; 1202 }; 1203 1204 /* Values for Version field above */ 1205 1206 enum acpi_madt_eio_pic_version { 1207 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1208 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1209 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1210 }; 1211 1212 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1213 1214 struct acpi_madt_msi_pic { 1215 struct acpi_subtable_header header; 1216 u8 version; 1217 u64 msg_address; 1218 u32 start; 1219 u32 count; 1220 }; 1221 1222 /* Values for Version field above */ 1223 1224 enum acpi_madt_msi_pic_version { 1225 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1226 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1227 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1228 }; 1229 1230 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1231 1232 struct acpi_madt_bio_pic { 1233 struct acpi_subtable_header header; 1234 u8 version; 1235 u64 address; 1236 u16 size; 1237 u16 id; 1238 u16 gsi_base; 1239 }; 1240 1241 /* Values for Version field above */ 1242 1243 enum acpi_madt_bio_pic_version { 1244 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1245 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1246 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1247 }; 1248 1249 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1250 1251 struct acpi_madt_lpc_pic { 1252 struct acpi_subtable_header header; 1253 u8 version; 1254 u64 address; 1255 u16 size; 1256 u8 cascade; 1257 }; 1258 1259 /* Values for Version field above */ 1260 1261 enum acpi_madt_lpc_pic_version { 1262 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1263 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1264 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1265 }; 1266 1267 /* 24: RISC-V INTC */ 1268 struct acpi_madt_rintc { 1269 struct acpi_subtable_header header; 1270 u8 version; 1271 u8 reserved; 1272 u32 flags; 1273 u64 hart_id; 1274 u32 uid; /* ACPI processor UID */ 1275 u32 ext_intc_id; /* External INTC Id */ 1276 u64 imsic_addr; /* IMSIC base address */ 1277 u32 imsic_size; /* IMSIC size */ 1278 }; 1279 1280 /* Values for RISC-V INTC Version field above */ 1281 1282 enum acpi_madt_rintc_version { 1283 ACPI_MADT_RINTC_VERSION_NONE = 0, 1284 ACPI_MADT_RINTC_VERSION_V1 = 1, 1285 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1286 }; 1287 1288 /* 25: RISC-V IMSIC */ 1289 struct acpi_madt_imsic { 1290 struct acpi_subtable_header header; 1291 u8 version; 1292 u8 reserved; 1293 u32 flags; 1294 u16 num_ids; 1295 u16 num_guest_ids; 1296 u8 guest_index_bits; 1297 u8 hart_index_bits; 1298 u8 group_index_bits; 1299 u8 group_index_shift; 1300 }; 1301 1302 /* 26: RISC-V APLIC */ 1303 struct acpi_madt_aplic { 1304 struct acpi_subtable_header header; 1305 u8 version; 1306 u8 id; 1307 u32 flags; 1308 u8 hw_id[8]; 1309 u16 num_idcs; 1310 u16 num_sources; 1311 u32 gsi_base; 1312 u64 base_addr; 1313 u32 size; 1314 }; 1315 1316 /* 27: RISC-V PLIC */ 1317 struct acpi_madt_plic { 1318 struct acpi_subtable_header header; 1319 u8 version; 1320 u8 id; 1321 u8 hw_id[8]; 1322 u16 num_irqs; 1323 u16 max_prio; 1324 u32 flags; 1325 u32 size; 1326 u64 base_addr; 1327 u32 gsi_base; 1328 }; 1329 1330 /* 80: OEM data */ 1331 1332 struct acpi_madt_oem_data { 1333 ACPI_FLEX_ARRAY(u8, oem_data); 1334 }; 1335 1336 /* 1337 * Common flags fields for MADT subtables 1338 */ 1339 1340 /* MADT Local APIC flags */ 1341 1342 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1343 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1344 1345 /* MADT MPS INTI flags (inti_flags) */ 1346 1347 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1348 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1349 1350 /* Values for MPS INTI flags */ 1351 1352 #define ACPI_MADT_POLARITY_CONFORMS 0 1353 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1354 #define ACPI_MADT_POLARITY_RESERVED 2 1355 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1356 1357 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1358 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1359 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1360 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1361 1362 /******************************************************************************* 1363 * 1364 * MCFG - PCI Memory Mapped Configuration table and subtable 1365 * Version 1 1366 * 1367 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1368 * 1369 ******************************************************************************/ 1370 1371 struct acpi_table_mcfg { 1372 struct acpi_table_header header; /* Common ACPI table header */ 1373 u8 reserved[8]; 1374 }; 1375 1376 /* Subtable */ 1377 1378 struct acpi_mcfg_allocation { 1379 u64 address; /* Base address, processor-relative */ 1380 u16 pci_segment; /* PCI segment group number */ 1381 u8 start_bus_number; /* Starting PCI Bus number */ 1382 u8 end_bus_number; /* Final PCI Bus number */ 1383 u32 reserved; 1384 }; 1385 1386 /******************************************************************************* 1387 * 1388 * MCHI - Management Controller Host Interface Table 1389 * Version 1 1390 * 1391 * Conforms to "Management Component Transport Protocol (MCTP) Host 1392 * Interface Specification", Revision 1.0.0a, October 13, 2009 1393 * 1394 ******************************************************************************/ 1395 1396 struct acpi_table_mchi { 1397 struct acpi_table_header header; /* Common ACPI table header */ 1398 u8 interface_type; 1399 u8 protocol; 1400 u64 protocol_data; 1401 u8 interrupt_type; 1402 u8 gpe; 1403 u8 pci_device_flag; 1404 u32 global_interrupt; 1405 struct acpi_generic_address control_register; 1406 u8 pci_segment; 1407 u8 pci_bus; 1408 u8 pci_device; 1409 u8 pci_function; 1410 }; 1411 1412 /******************************************************************************* 1413 * 1414 * MPAM - Memory System Resource Partitioning and Monitoring 1415 * 1416 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0" 1417 * Document number: ARM DEN 0065, December, 2022. 1418 * 1419 ******************************************************************************/ 1420 1421 /* MPAM RIS locator types. Table 11, Location types */ 1422 enum acpi_mpam_locator_type { 1423 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0, 1424 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1, 1425 ACPI_MPAM_LOCATION_TYPE_SMMU = 2, 1426 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3, 1427 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4, 1428 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5, 1429 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF 1430 }; 1431 1432 /* MPAM Functional dependency descriptor. Table 10 */ 1433 struct acpi_mpam_func_deps { 1434 u32 producer; 1435 u32 reserved; 1436 }; 1437 1438 /* MPAM Processor cache locator descriptor. Table 13 */ 1439 struct acpi_mpam_resource_cache_locator { 1440 u64 cache_reference; 1441 u32 reserved; 1442 }; 1443 1444 /* MPAM Memory locator descriptor. Table 14 */ 1445 struct acpi_mpam_resource_memory_locator { 1446 u64 proximity_domain; 1447 u32 reserved; 1448 }; 1449 1450 /* MPAM SMMU locator descriptor. Table 15 */ 1451 struct acpi_mpam_resource_smmu_locator { 1452 u64 smmu_interface; 1453 u32 reserved; 1454 }; 1455 1456 /* MPAM Memory-side cache locator descriptor. Table 16 */ 1457 struct acpi_mpam_resource_memcache_locator { 1458 u8 reserved[7]; 1459 u8 level; 1460 u32 reference; 1461 }; 1462 1463 /* MPAM ACPI device locator descriptor. Table 17 */ 1464 struct acpi_mpam_resource_acpi_locator { 1465 u64 acpi_hw_id; 1466 u32 acpi_unique_id; 1467 }; 1468 1469 /* MPAM Interconnect locator descriptor. Table 18 */ 1470 struct acpi_mpam_resource_interconnect_locator { 1471 u64 inter_connect_desc_tbl_off; 1472 u32 reserved; 1473 }; 1474 1475 /* MPAM Locator structure. Table 12 */ 1476 struct acpi_mpam_resource_generic_locator { 1477 u64 descriptor1; 1478 u32 descriptor2; 1479 }; 1480 1481 union acpi_mpam_resource_locator { 1482 struct acpi_mpam_resource_cache_locator cache_locator; 1483 struct acpi_mpam_resource_memory_locator memory_locator; 1484 struct acpi_mpam_resource_smmu_locator smmu_locator; 1485 struct acpi_mpam_resource_memcache_locator mem_cache_locator; 1486 struct acpi_mpam_resource_acpi_locator acpi_locator; 1487 struct acpi_mpam_resource_interconnect_locator interconnect_ifc_locator; 1488 struct acpi_mpam_resource_generic_locator generic_locator; 1489 }; 1490 1491 /* Memory System Component Resource Node Structure Table 9 */ 1492 struct acpi_mpam_resource_node { 1493 u32 identifier; 1494 u8 ris_index; 1495 u16 reserved1; 1496 u8 locator_type; 1497 union acpi_mpam_resource_locator locator; 1498 u32 num_functional_deps; 1499 }; 1500 1501 /* Memory System Component (MSC) Node Structure. Table 4 */ 1502 struct acpi_mpam_msc_node { 1503 u16 length; 1504 u8 interface_type; 1505 u8 reserved; 1506 u32 identifier; 1507 u64 base_address; 1508 u32 mmio_size; 1509 u32 overflow_interrupt; 1510 u32 overflow_interrupt_flags; 1511 u32 reserved1; 1512 u32 overflow_interrupt_affinity; 1513 u32 error_interrupt; 1514 u32 error_interrupt_flags; 1515 u32 reserved2; 1516 u32 error_interrupt_affinity; 1517 u32 max_nrdy_usec; 1518 u64 hardware_id_linked_device; 1519 u32 instance_id_linked_device; 1520 u32 num_resouce_nodes; 1521 }; 1522 1523 struct acpi_table_mpam { 1524 struct acpi_table_header header; /* Common ACPI table header */ 1525 }; 1526 1527 /******************************************************************************* 1528 * 1529 * MPST - Memory Power State Table (ACPI 5.0) 1530 * Version 1 1531 * 1532 ******************************************************************************/ 1533 1534 #define ACPI_MPST_CHANNEL_INFO \ 1535 u8 channel_id; \ 1536 u8 reserved1[3]; \ 1537 u16 power_node_count; \ 1538 u16 reserved2; 1539 1540 /* Main table */ 1541 1542 struct acpi_table_mpst { 1543 struct acpi_table_header header; /* Common ACPI table header */ 1544 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1545 }; 1546 1547 /* Memory Platform Communication Channel Info */ 1548 1549 struct acpi_mpst_channel { 1550 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1551 }; 1552 1553 /* Memory Power Node Structure */ 1554 1555 struct acpi_mpst_power_node { 1556 u8 flags; 1557 u8 reserved1; 1558 u16 node_id; 1559 u32 length; 1560 u64 range_address; 1561 u64 range_length; 1562 u32 num_power_states; 1563 u32 num_physical_components; 1564 }; 1565 1566 /* Values for Flags field above */ 1567 1568 #define ACPI_MPST_ENABLED 1 1569 #define ACPI_MPST_POWER_MANAGED 2 1570 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1571 1572 /* Memory Power State Structure (follows POWER_NODE above) */ 1573 1574 struct acpi_mpst_power_state { 1575 u8 power_state; 1576 u8 info_index; 1577 }; 1578 1579 /* Physical Component ID Structure (follows POWER_STATE above) */ 1580 1581 struct acpi_mpst_component { 1582 u16 component_id; 1583 }; 1584 1585 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1586 1587 struct acpi_mpst_data_hdr { 1588 u16 characteristics_count; 1589 u16 reserved; 1590 }; 1591 1592 struct acpi_mpst_power_data { 1593 u8 structure_id; 1594 u8 flags; 1595 u16 reserved1; 1596 u32 average_power; 1597 u32 power_saving; 1598 u64 exit_latency; 1599 u64 reserved2; 1600 }; 1601 1602 /* Values for Flags field above */ 1603 1604 #define ACPI_MPST_PRESERVE 1 1605 #define ACPI_MPST_AUTOENTRY 2 1606 #define ACPI_MPST_AUTOEXIT 4 1607 1608 /* Shared Memory Region (not part of an ACPI table) */ 1609 1610 struct acpi_mpst_shared { 1611 u32 signature; 1612 u16 pcc_command; 1613 u16 pcc_status; 1614 u32 command_register; 1615 u32 status_register; 1616 u32 power_state_id; 1617 u32 power_node_id; 1618 u64 energy_consumed; 1619 u64 average_power; 1620 }; 1621 1622 /******************************************************************************* 1623 * 1624 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1625 * Version 1 1626 * 1627 ******************************************************************************/ 1628 1629 struct acpi_table_msct { 1630 struct acpi_table_header header; /* Common ACPI table header */ 1631 u32 proximity_offset; /* Location of proximity info struct(s) */ 1632 u32 max_proximity_domains; /* Max number of proximity domains */ 1633 u32 max_clock_domains; /* Max number of clock domains */ 1634 u64 max_address; /* Max physical address in system */ 1635 }; 1636 1637 /* subtable - Maximum Proximity Domain Information. Version 1 */ 1638 1639 struct acpi_msct_proximity { 1640 u8 revision; 1641 u8 length; 1642 u32 range_start; /* Start of domain range */ 1643 u32 range_end; /* End of domain range */ 1644 u32 processor_capacity; 1645 u64 memory_capacity; /* In bytes */ 1646 }; 1647 1648 /******************************************************************************* 1649 * 1650 * MSDM - Microsoft Data Management table 1651 * 1652 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1653 * November 29, 2011. Copyright 2011 Microsoft 1654 * 1655 ******************************************************************************/ 1656 1657 /* Basic MSDM table is only the common ACPI header */ 1658 1659 struct acpi_table_msdm { 1660 struct acpi_table_header header; /* Common ACPI table header */ 1661 }; 1662 1663 /******************************************************************************* 1664 * 1665 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1666 * Version 1 1667 * 1668 ******************************************************************************/ 1669 1670 struct acpi_table_nfit { 1671 struct acpi_table_header header; /* Common ACPI table header */ 1672 u32 reserved; /* Reserved, must be zero */ 1673 }; 1674 1675 /* Subtable header for NFIT */ 1676 1677 struct acpi_nfit_header { 1678 u16 type; 1679 u16 length; 1680 }; 1681 1682 /* Values for subtable type in struct acpi_nfit_header */ 1683 1684 enum acpi_nfit_type { 1685 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1686 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1687 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1688 ACPI_NFIT_TYPE_SMBIOS = 3, 1689 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1690 ACPI_NFIT_TYPE_DATA_REGION = 5, 1691 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1692 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1693 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1694 }; 1695 1696 /* 1697 * NFIT Subtables 1698 */ 1699 1700 /* 0: System Physical Address Range Structure */ 1701 1702 struct acpi_nfit_system_address { 1703 struct acpi_nfit_header header; 1704 u16 range_index; 1705 u16 flags; 1706 u32 reserved; /* Reserved, must be zero */ 1707 u32 proximity_domain; 1708 u8 range_guid[16]; 1709 u64 address; 1710 u64 length; 1711 u64 memory_mapping; 1712 u64 location_cookie; /* ACPI 6.4 */ 1713 }; 1714 1715 /* Flags */ 1716 1717 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1718 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1719 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1720 1721 /* Range Type GUIDs appear in the include/acuuid.h file */ 1722 1723 /* 1: Memory Device to System Address Range Map Structure */ 1724 1725 struct acpi_nfit_memory_map { 1726 struct acpi_nfit_header header; 1727 u32 device_handle; 1728 u16 physical_id; 1729 u16 region_id; 1730 u16 range_index; 1731 u16 region_index; 1732 u64 region_size; 1733 u64 region_offset; 1734 u64 address; 1735 u16 interleave_index; 1736 u16 interleave_ways; 1737 u16 flags; 1738 u16 reserved; /* Reserved, must be zero */ 1739 }; 1740 1741 /* Flags */ 1742 1743 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1744 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1745 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1746 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1747 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1748 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1749 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1750 1751 /* 2: Interleave Structure */ 1752 1753 struct acpi_nfit_interleave { 1754 struct acpi_nfit_header header; 1755 u16 interleave_index; 1756 u16 reserved; /* Reserved, must be zero */ 1757 u32 line_count; 1758 u32 line_size; 1759 u32 line_offset[]; /* Variable length */ 1760 }; 1761 1762 /* 3: SMBIOS Management Information Structure */ 1763 1764 struct acpi_nfit_smbios { 1765 struct acpi_nfit_header header; 1766 u32 reserved; /* Reserved, must be zero */ 1767 u8 data[]; /* Variable length */ 1768 }; 1769 1770 /* 4: NVDIMM Control Region Structure */ 1771 1772 struct acpi_nfit_control_region { 1773 struct acpi_nfit_header header; 1774 u16 region_index; 1775 u16 vendor_id; 1776 u16 device_id; 1777 u16 revision_id; 1778 u16 subsystem_vendor_id; 1779 u16 subsystem_device_id; 1780 u16 subsystem_revision_id; 1781 u8 valid_fields; 1782 u8 manufacturing_location; 1783 u16 manufacturing_date; 1784 u8 reserved[2]; /* Reserved, must be zero */ 1785 u32 serial_number; 1786 u16 code; 1787 u16 windows; 1788 u64 window_size; 1789 u64 command_offset; 1790 u64 command_size; 1791 u64 status_offset; 1792 u64 status_size; 1793 u16 flags; 1794 u8 reserved1[6]; /* Reserved, must be zero */ 1795 }; 1796 1797 /* Flags */ 1798 1799 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1800 1801 /* valid_fields bits */ 1802 1803 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1804 1805 /* 5: NVDIMM Block Data Window Region Structure */ 1806 1807 struct acpi_nfit_data_region { 1808 struct acpi_nfit_header header; 1809 u16 region_index; 1810 u16 windows; 1811 u64 offset; 1812 u64 size; 1813 u64 capacity; 1814 u64 start_address; 1815 }; 1816 1817 /* 6: Flush Hint Address Structure */ 1818 1819 struct acpi_nfit_flush_address { 1820 struct acpi_nfit_header header; 1821 u32 device_handle; 1822 u16 hint_count; 1823 u8 reserved[6]; /* Reserved, must be zero */ 1824 u64 hint_address[]; /* Variable length */ 1825 }; 1826 1827 /* 7: Platform Capabilities Structure */ 1828 1829 struct acpi_nfit_capabilities { 1830 struct acpi_nfit_header header; 1831 u8 highest_capability; 1832 u8 reserved[3]; /* Reserved, must be zero */ 1833 u32 capabilities; 1834 u32 reserved2; 1835 }; 1836 1837 /* Capabilities Flags */ 1838 1839 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1840 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1841 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1842 1843 /* 1844 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1845 */ 1846 struct nfit_device_handle { 1847 u32 handle; 1848 }; 1849 1850 /* Device handle construction and extraction macros */ 1851 1852 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1853 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1854 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1855 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1856 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1857 1858 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1859 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1860 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1861 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1862 #define ACPI_NFIT_NODE_ID_OFFSET 16 1863 1864 /* Macro to construct a NFIT/NVDIMM device handle */ 1865 1866 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1867 ((dimm) | \ 1868 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1869 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1870 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1871 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1872 1873 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1874 1875 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1876 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1877 1878 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1879 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1880 1881 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1882 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1883 1884 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1885 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1886 1887 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1888 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1889 1890 /******************************************************************************* 1891 * 1892 * NHLT - Non HDAudio Link Table 1893 * Version 1 1894 * 1895 ******************************************************************************/ 1896 1897 struct acpi_table_nhlt { 1898 struct acpi_table_header header; /* Common ACPI table header */ 1899 u8 endpoints_count; 1900 /* 1901 * struct acpi_nhlt_endpoint endpoints[]; 1902 * struct acpi_nhlt_config oed_config; 1903 */ 1904 }; 1905 1906 struct acpi_nhlt_endpoint { 1907 u32 length; 1908 u8 link_type; 1909 u8 instance_id; 1910 u16 vendor_id; 1911 u16 device_id; 1912 u16 revision_id; 1913 u32 subsystem_id; 1914 u8 device_type; 1915 u8 direction; 1916 u8 virtual_bus_id; 1917 /* 1918 * struct acpi_nhlt_config device_config; 1919 * struct acpi_nhlt_formats_config formats_config; 1920 * struct acpi_nhlt_devices_info devices_info; 1921 */ 1922 }; 1923 1924 /* 1925 * Values for link_type field above 1926 * 1927 * Only types PDM and SSP are used 1928 */ 1929 #define ACPI_NHLT_LINKTYPE_HDA 0 1930 #define ACPI_NHLT_LINKTYPE_DSP 1 1931 #define ACPI_NHLT_LINKTYPE_PDM 2 1932 #define ACPI_NHLT_LINKTYPE_SSP 3 1933 #define ACPI_NHLT_LINKTYPE_SLIMBUS 4 1934 #define ACPI_NHLT_LINKTYPE_SDW 5 1935 #define ACPI_NHLT_LINKTYPE_UAOL 6 1936 1937 /* Values for device_id field above */ 1938 1939 #define ACPI_NHLT_DEVICEID_DMIC 0xAE20 1940 #define ACPI_NHLT_DEVICEID_BT 0xAE30 1941 #define ACPI_NHLT_DEVICEID_I2S 0xAE34 1942 1943 /* Values for device_type field above */ 1944 1945 /* 1946 * Device types unique to endpoint of link_type=PDM 1947 * 1948 * Type PDM used for all SKL+ platforms 1949 */ 1950 #define ACPI_NHLT_DEVICETYPE_PDM 0 1951 #define ACPI_NHLT_DEVICETYPE_PDM_SKL 1 1952 /* Device types unique to endpoint of link_type=SSP */ 1953 #define ACPI_NHLT_DEVICETYPE_BT 0 1954 #define ACPI_NHLT_DEVICETYPE_FM 1 1955 #define ACPI_NHLT_DEVICETYPE_MODEM 2 1956 #define ACPI_NHLT_DEVICETYPE_CODEC 4 1957 1958 /* Values for Direction field above */ 1959 1960 #define ACPI_NHLT_DIR_RENDER 0 1961 #define ACPI_NHLT_DIR_CAPTURE 1 1962 1963 struct acpi_nhlt_config { 1964 u32 capabilities_size; 1965 u8 capabilities[]; 1966 }; 1967 1968 struct acpi_nhlt_gendevice_config { 1969 u8 virtual_slot; 1970 u8 config_type; 1971 }; 1972 1973 /* Values for config_type field above */ 1974 1975 #define ACPI_NHLT_CONFIGTYPE_GENERIC 0 1976 #define ACPI_NHLT_CONFIGTYPE_MICARRAY 1 1977 1978 struct acpi_nhlt_micdevice_config { 1979 u8 virtual_slot; 1980 u8 config_type; 1981 u8 array_type; 1982 }; 1983 1984 /* Values for array_type field above */ 1985 1986 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_SMALL 0xA 1987 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_BIG 0xB 1988 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO1 0xC 1989 #define ACPI_NHLT_ARRAYTYPE_PLANAR4_LSHAPED 0xD 1990 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO2 0xE 1991 #define ACPI_NHLT_ARRAYTYPE_VENDOR 0xF 1992 1993 struct acpi_nhlt_vendor_mic_config { 1994 u8 type; 1995 u8 panel; 1996 u16 speaker_position_distance; /* mm */ 1997 u16 horizontal_offset; /* mm */ 1998 u16 vertical_offset; /* mm */ 1999 u8 frequency_low_band; /* 5*Hz */ 2000 u8 frequency_high_band; /* 500*Hz */ 2001 u16 direction_angle; /* -180 - +180 */ 2002 u16 elevation_angle; /* -180 - +180 */ 2003 u16 work_vertical_angle_begin; /* -180 - +180 with 2 deg step */ 2004 u16 work_vertical_angle_end; /* -180 - +180 with 2 deg step */ 2005 u16 work_horizontal_angle_begin; /* -180 - +180 with 2 deg step */ 2006 u16 work_horizontal_angle_end; /* -180 - +180 with 2 deg step */ 2007 }; 2008 2009 /* Values for Type field above */ 2010 2011 #define ACPI_NHLT_MICTYPE_OMNIDIRECTIONAL 0 2012 #define ACPI_NHLT_MICTYPE_SUBCARDIOID 1 2013 #define ACPI_NHLT_MICTYPE_CARDIOID 2 2014 #define ACPI_NHLT_MICTYPE_SUPERCARDIOID 3 2015 #define ACPI_NHLT_MICTYPE_HYPERCARDIOID 4 2016 #define ACPI_NHLT_MICTYPE_8SHAPED 5 2017 #define ACPI_NHLT_MICTYPE_RESERVED 6 2018 #define ACPI_NHLT_MICTYPE_VENDORDEFINED 7 2019 2020 /* Values for Panel field above */ 2021 2022 #define ACPI_NHLT_MICLOCATION_TOP 0 2023 #define ACPI_NHLT_MICLOCATION_BOTTOM 1 2024 #define ACPI_NHLT_MICLOCATION_LEFT 2 2025 #define ACPI_NHLT_MICLOCATION_RIGHT 3 2026 #define ACPI_NHLT_MICLOCATION_FRONT 4 2027 #define ACPI_NHLT_MICLOCATION_REAR 5 2028 2029 struct acpi_nhlt_vendor_micdevice_config { 2030 u8 virtual_slot; 2031 u8 config_type; 2032 u8 array_type; 2033 u8 mics_count; 2034 struct acpi_nhlt_vendor_mic_config mics[]; 2035 }; 2036 2037 union acpi_nhlt_device_config { 2038 u8 virtual_slot; 2039 struct acpi_nhlt_gendevice_config gen; 2040 struct acpi_nhlt_micdevice_config mic; 2041 struct acpi_nhlt_vendor_micdevice_config vendor_mic; 2042 }; 2043 2044 /* Inherited from Microsoft's WAVEFORMATEXTENSIBLE. */ 2045 struct acpi_nhlt_wave_formatext { 2046 u16 format_tag; 2047 u16 channel_count; 2048 u32 samples_per_sec; 2049 u32 avg_bytes_per_sec; 2050 u16 block_align; 2051 u16 bits_per_sample; 2052 u16 extra_format_size; 2053 u16 valid_bits_per_sample; 2054 u32 channel_mask; 2055 u8 subformat[16]; 2056 }; 2057 2058 struct acpi_nhlt_format_config { 2059 struct acpi_nhlt_wave_formatext format; 2060 struct acpi_nhlt_config config; 2061 }; 2062 2063 struct acpi_nhlt_formats_config { 2064 u8 formats_count; 2065 struct acpi_nhlt_format_config formats[]; 2066 }; 2067 2068 struct acpi_nhlt_device_info { 2069 u8 id[16]; 2070 u8 instance_id; 2071 u8 port_id; 2072 }; 2073 2074 struct acpi_nhlt_devices_info { 2075 u8 devices_count; 2076 struct acpi_nhlt_device_info devices[]; 2077 }; 2078 2079 /******************************************************************************* 2080 * 2081 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2082 * Version 2 (ACPI 6.2) 2083 * 2084 ******************************************************************************/ 2085 2086 struct acpi_table_pcct { 2087 struct acpi_table_header header; /* Common ACPI table header */ 2088 u32 flags; 2089 u64 reserved; 2090 }; 2091 2092 /* Values for Flags field above */ 2093 2094 #define ACPI_PCCT_DOORBELL 1 2095 2096 /* Values for subtable type in struct acpi_subtable_header */ 2097 2098 enum acpi_pcct_type { 2099 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2100 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2101 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2102 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2103 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2104 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2105 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2106 }; 2107 2108 /* 2109 * PCCT Subtables, correspond to Type in struct acpi_subtable_header 2110 */ 2111 2112 /* 0: Generic Communications Subspace */ 2113 2114 struct acpi_pcct_subspace { 2115 struct acpi_subtable_header header; 2116 u8 reserved[6]; 2117 u64 base_address; 2118 u64 length; 2119 struct acpi_generic_address doorbell_register; 2120 u64 preserve_mask; 2121 u64 write_mask; 2122 u32 latency; 2123 u32 max_access_rate; 2124 u16 min_turnaround_time; 2125 }; 2126 2127 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2128 2129 struct acpi_pcct_hw_reduced { 2130 struct acpi_subtable_header header; 2131 u32 platform_interrupt; 2132 u8 flags; 2133 u8 reserved; 2134 u64 base_address; 2135 u64 length; 2136 struct acpi_generic_address doorbell_register; 2137 u64 preserve_mask; 2138 u64 write_mask; 2139 u32 latency; 2140 u32 max_access_rate; 2141 u16 min_turnaround_time; 2142 }; 2143 2144 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2145 2146 struct acpi_pcct_hw_reduced_type2 { 2147 struct acpi_subtable_header header; 2148 u32 platform_interrupt; 2149 u8 flags; 2150 u8 reserved; 2151 u64 base_address; 2152 u64 length; 2153 struct acpi_generic_address doorbell_register; 2154 u64 preserve_mask; 2155 u64 write_mask; 2156 u32 latency; 2157 u32 max_access_rate; 2158 u16 min_turnaround_time; 2159 struct acpi_generic_address platform_ack_register; 2160 u64 ack_preserve_mask; 2161 u64 ack_write_mask; 2162 }; 2163 2164 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2165 2166 struct acpi_pcct_ext_pcc_master { 2167 struct acpi_subtable_header header; 2168 u32 platform_interrupt; 2169 u8 flags; 2170 u8 reserved1; 2171 u64 base_address; 2172 u32 length; 2173 struct acpi_generic_address doorbell_register; 2174 u64 preserve_mask; 2175 u64 write_mask; 2176 u32 latency; 2177 u32 max_access_rate; 2178 u32 min_turnaround_time; 2179 struct acpi_generic_address platform_ack_register; 2180 u64 ack_preserve_mask; 2181 u64 ack_set_mask; 2182 u64 reserved2; 2183 struct acpi_generic_address cmd_complete_register; 2184 u64 cmd_complete_mask; 2185 struct acpi_generic_address cmd_update_register; 2186 u64 cmd_update_preserve_mask; 2187 u64 cmd_update_set_mask; 2188 struct acpi_generic_address error_status_register; 2189 u64 error_status_mask; 2190 }; 2191 2192 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2193 2194 struct acpi_pcct_ext_pcc_slave { 2195 struct acpi_subtable_header header; 2196 u32 platform_interrupt; 2197 u8 flags; 2198 u8 reserved1; 2199 u64 base_address; 2200 u32 length; 2201 struct acpi_generic_address doorbell_register; 2202 u64 preserve_mask; 2203 u64 write_mask; 2204 u32 latency; 2205 u32 max_access_rate; 2206 u32 min_turnaround_time; 2207 struct acpi_generic_address platform_ack_register; 2208 u64 ack_preserve_mask; 2209 u64 ack_set_mask; 2210 u64 reserved2; 2211 struct acpi_generic_address cmd_complete_register; 2212 u64 cmd_complete_mask; 2213 struct acpi_generic_address cmd_update_register; 2214 u64 cmd_update_preserve_mask; 2215 u64 cmd_update_set_mask; 2216 struct acpi_generic_address error_status_register; 2217 u64 error_status_mask; 2218 }; 2219 2220 /* 5: HW Registers based Communications Subspace */ 2221 2222 struct acpi_pcct_hw_reg { 2223 struct acpi_subtable_header header; 2224 u16 version; 2225 u64 base_address; 2226 u64 length; 2227 struct acpi_generic_address doorbell_register; 2228 u64 doorbell_preserve; 2229 u64 doorbell_write; 2230 struct acpi_generic_address cmd_complete_register; 2231 u64 cmd_complete_mask; 2232 struct acpi_generic_address error_status_register; 2233 u64 error_status_mask; 2234 u32 nominal_latency; 2235 u32 min_turnaround_time; 2236 }; 2237 2238 /* Values for doorbell flags above */ 2239 2240 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2241 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2242 2243 /* 2244 * PCC memory structures (not part of the ACPI table) 2245 */ 2246 2247 /* Shared Memory Region */ 2248 2249 struct acpi_pcct_shared_memory { 2250 u32 signature; 2251 u16 command; 2252 u16 status; 2253 }; 2254 2255 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2256 2257 struct acpi_pcct_ext_pcc_shared_memory { 2258 u32 signature; 2259 u32 flags; 2260 u32 length; 2261 u32 command; 2262 }; 2263 2264 /******************************************************************************* 2265 * 2266 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2267 * Version 0 2268 * 2269 ******************************************************************************/ 2270 2271 struct acpi_table_pdtt { 2272 struct acpi_table_header header; /* Common ACPI table header */ 2273 u8 trigger_count; 2274 u8 reserved[3]; 2275 u32 array_offset; 2276 }; 2277 2278 /* 2279 * PDTT Communication Channel Identifier Structure. 2280 * The number of these structures is defined by trigger_count above, 2281 * starting at array_offset. 2282 */ 2283 struct acpi_pdtt_channel { 2284 u8 subchannel_id; 2285 u8 flags; 2286 }; 2287 2288 /* Flags for above */ 2289 2290 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2291 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2292 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2293 2294 /******************************************************************************* 2295 * 2296 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2297 * Version 1 2298 * 2299 ******************************************************************************/ 2300 2301 struct acpi_table_phat { 2302 struct acpi_table_header header; /* Common ACPI table header */ 2303 }; 2304 2305 /* Common header for PHAT subtables that follow main table */ 2306 2307 struct acpi_phat_header { 2308 u16 type; 2309 u16 length; 2310 u8 revision; 2311 }; 2312 2313 /* Values for Type field above */ 2314 2315 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2316 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2317 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2318 2319 /* 2320 * PHAT subtables, correspond to Type in struct acpi_phat_header 2321 */ 2322 2323 /* 0: Firmware Version Data Record */ 2324 2325 struct acpi_phat_version_data { 2326 struct acpi_phat_header header; 2327 u8 reserved[3]; 2328 u32 element_count; 2329 }; 2330 2331 struct acpi_phat_version_element { 2332 u8 guid[16]; 2333 u64 version_value; 2334 u32 producer_id; 2335 }; 2336 2337 /* 1: Firmware Health Data Record */ 2338 2339 struct acpi_phat_health_data { 2340 struct acpi_phat_header header; 2341 u8 reserved[2]; 2342 u8 health; 2343 u8 device_guid[16]; 2344 u32 device_specific_offset; /* Zero if no Device-specific data */ 2345 }; 2346 2347 /* Values for Health field above */ 2348 2349 #define ACPI_PHAT_ERRORS_FOUND 0 2350 #define ACPI_PHAT_NO_ERRORS 1 2351 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2352 #define ACPI_PHAT_ADVISORY 3 2353 2354 /******************************************************************************* 2355 * 2356 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2357 * Version 1 2358 * 2359 ******************************************************************************/ 2360 2361 struct acpi_table_pmtt { 2362 struct acpi_table_header header; /* Common ACPI table header */ 2363 u32 memory_device_count; 2364 /* 2365 * Immediately followed by: 2366 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2367 */ 2368 }; 2369 2370 /* Common header for PMTT subtables that follow main table */ 2371 2372 struct acpi_pmtt_header { 2373 u8 type; 2374 u8 reserved1; 2375 u16 length; 2376 u16 flags; 2377 u16 reserved2; 2378 u32 memory_device_count; /* Zero means no memory device structs follow */ 2379 /* 2380 * Immediately followed by: 2381 * u8 type_specific_data[] 2382 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2383 */ 2384 }; 2385 2386 /* Values for Type field above */ 2387 2388 #define ACPI_PMTT_TYPE_SOCKET 0 2389 #define ACPI_PMTT_TYPE_CONTROLLER 1 2390 #define ACPI_PMTT_TYPE_DIMM 2 2391 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2392 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2393 2394 /* Values for Flags field above */ 2395 2396 #define ACPI_PMTT_TOP_LEVEL 0x0001 2397 #define ACPI_PMTT_PHYSICAL 0x0002 2398 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2399 2400 /* 2401 * PMTT subtables, correspond to Type in struct acpi_pmtt_header 2402 */ 2403 2404 /* 0: Socket Structure */ 2405 2406 struct acpi_pmtt_socket { 2407 struct acpi_pmtt_header header; 2408 u16 socket_id; 2409 u16 reserved; 2410 }; 2411 /* 2412 * Immediately followed by: 2413 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2414 */ 2415 2416 /* 1: Memory Controller subtable */ 2417 2418 struct acpi_pmtt_controller { 2419 struct acpi_pmtt_header header; 2420 u16 controller_id; 2421 u16 reserved; 2422 }; 2423 /* 2424 * Immediately followed by: 2425 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2426 */ 2427 2428 /* 2: Physical Component Identifier (DIMM) */ 2429 2430 struct acpi_pmtt_physical_component { 2431 struct acpi_pmtt_header header; 2432 u32 bios_handle; 2433 }; 2434 2435 /* 0xFF: Vendor Specific Data */ 2436 2437 struct acpi_pmtt_vendor_specific { 2438 struct acpi_pmtt_header header; 2439 u8 type_uuid[16]; 2440 u8 specific[]; 2441 /* 2442 * Immediately followed by: 2443 * u8 vendor_specific_data[]; 2444 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2445 */ 2446 }; 2447 2448 /******************************************************************************* 2449 * 2450 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2451 * Version 1 2452 * 2453 ******************************************************************************/ 2454 2455 struct acpi_table_pptt { 2456 struct acpi_table_header header; /* Common ACPI table header */ 2457 }; 2458 2459 /* Values for Type field above */ 2460 2461 enum acpi_pptt_type { 2462 ACPI_PPTT_TYPE_PROCESSOR = 0, 2463 ACPI_PPTT_TYPE_CACHE = 1, 2464 ACPI_PPTT_TYPE_ID = 2, 2465 ACPI_PPTT_TYPE_RESERVED = 3 2466 }; 2467 2468 /* 0: Processor Hierarchy Node Structure */ 2469 2470 struct acpi_pptt_processor { 2471 struct acpi_subtable_header header; 2472 u16 reserved; 2473 u32 flags; 2474 u32 parent; 2475 u32 acpi_processor_id; 2476 u32 number_of_priv_resources; 2477 }; 2478 2479 /* Flags */ 2480 2481 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2482 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2483 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2484 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2485 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2486 2487 /* 1: Cache Type Structure */ 2488 2489 struct acpi_pptt_cache { 2490 struct acpi_subtable_header header; 2491 u16 reserved; 2492 u32 flags; 2493 u32 next_level_of_cache; 2494 u32 size; 2495 u32 number_of_sets; 2496 u8 associativity; 2497 u8 attributes; 2498 u16 line_size; 2499 }; 2500 2501 /* 1: Cache Type Structure for PPTT version 3 */ 2502 2503 struct acpi_pptt_cache_v1 { 2504 u32 cache_id; 2505 }; 2506 2507 /* Flags */ 2508 2509 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2510 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2511 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2512 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2513 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2514 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2515 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2516 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2517 2518 /* Masks for Attributes */ 2519 2520 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2521 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2522 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2523 2524 /* Attributes describing cache */ 2525 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2526 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2527 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2528 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2529 2530 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2531 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2532 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2533 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2534 2535 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2536 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2537 2538 /* 2: ID Structure */ 2539 2540 struct acpi_pptt_id { 2541 struct acpi_subtable_header header; 2542 u16 reserved; 2543 u32 vendor_id; 2544 u64 level1_id; 2545 u64 level2_id; 2546 u16 major_rev; 2547 u16 minor_rev; 2548 u16 spin_rev; 2549 }; 2550 2551 /******************************************************************************* 2552 * 2553 * PRMT - Platform Runtime Mechanism Table 2554 * Version 1 2555 * 2556 ******************************************************************************/ 2557 2558 struct acpi_table_prmt { 2559 struct acpi_table_header header; /* Common ACPI table header */ 2560 }; 2561 2562 struct acpi_table_prmt_header { 2563 u8 platform_guid[16]; 2564 u32 module_info_offset; 2565 u32 module_info_count; 2566 }; 2567 2568 struct acpi_prmt_module_header { 2569 u16 revision; 2570 u16 length; 2571 }; 2572 2573 struct acpi_prmt_module_info { 2574 u16 revision; 2575 u16 length; 2576 u8 module_guid[16]; 2577 u16 major_rev; 2578 u16 minor_rev; 2579 u16 handler_info_count; 2580 u32 handler_info_offset; 2581 u64 mmio_list_pointer; 2582 }; 2583 2584 struct acpi_prmt_handler_info { 2585 u16 revision; 2586 u16 length; 2587 u8 handler_guid[16]; 2588 u64 handler_address; 2589 u64 static_data_buffer_address; 2590 u64 acpi_param_buffer_address; 2591 }; 2592 2593 /******************************************************************************* 2594 * 2595 * RASF - RAS Feature Table (ACPI 5.0) 2596 * Version 1 2597 * 2598 ******************************************************************************/ 2599 2600 struct acpi_table_rasf { 2601 struct acpi_table_header header; /* Common ACPI table header */ 2602 u8 channel_id[12]; 2603 }; 2604 2605 /* RASF Platform Communication Channel Shared Memory Region */ 2606 2607 struct acpi_rasf_shared_memory { 2608 u32 signature; 2609 u16 command; 2610 u16 status; 2611 u16 version; 2612 u8 capabilities[16]; 2613 u8 set_capabilities[16]; 2614 u16 num_parameter_blocks; 2615 u32 set_capabilities_status; 2616 }; 2617 2618 /* RASF Parameter Block Structure Header */ 2619 2620 struct acpi_rasf_parameter_block { 2621 u16 type; 2622 u16 version; 2623 u16 length; 2624 }; 2625 2626 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2627 2628 struct acpi_rasf_patrol_scrub_parameter { 2629 struct acpi_rasf_parameter_block header; 2630 u16 patrol_scrub_command; 2631 u64 requested_address_range[2]; 2632 u64 actual_address_range[2]; 2633 u16 flags; 2634 u8 requested_speed; 2635 }; 2636 2637 /* Masks for Flags and Speed fields above */ 2638 2639 #define ACPI_RASF_SCRUBBER_RUNNING 1 2640 #define ACPI_RASF_SPEED (7<<1) 2641 #define ACPI_RASF_SPEED_SLOW (0<<1) 2642 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2643 #define ACPI_RASF_SPEED_FAST (7<<1) 2644 2645 /* Channel Commands */ 2646 2647 enum acpi_rasf_commands { 2648 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2649 }; 2650 2651 /* Platform RAS Capabilities */ 2652 2653 enum acpi_rasf_capabiliities { 2654 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2655 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2656 }; 2657 2658 /* Patrol Scrub Commands */ 2659 2660 enum acpi_rasf_patrol_scrub_commands { 2661 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2662 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2663 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2664 }; 2665 2666 /* Channel Command flags */ 2667 2668 #define ACPI_RASF_GENERATE_SCI (1<<15) 2669 2670 /* Status values */ 2671 2672 enum acpi_rasf_status { 2673 ACPI_RASF_SUCCESS = 0, 2674 ACPI_RASF_NOT_VALID = 1, 2675 ACPI_RASF_NOT_SUPPORTED = 2, 2676 ACPI_RASF_BUSY = 3, 2677 ACPI_RASF_FAILED = 4, 2678 ACPI_RASF_ABORTED = 5, 2679 ACPI_RASF_INVALID_DATA = 6 2680 }; 2681 2682 /* Status flags */ 2683 2684 #define ACPI_RASF_COMMAND_COMPLETE (1) 2685 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2686 #define ACPI_RASF_ERROR (1<<2) 2687 #define ACPI_RASF_STATUS (0x1F<<3) 2688 2689 /******************************************************************************* 2690 * 2691 * RGRT - Regulatory Graphics Resource Table 2692 * Version 1 2693 * 2694 * Conforms to "ACPI RGRT" available at: 2695 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/ 2696 * 2697 ******************************************************************************/ 2698 2699 struct acpi_table_rgrt { 2700 struct acpi_table_header header; /* Common ACPI table header */ 2701 u16 version; 2702 u8 image_type; 2703 u8 reserved; 2704 u8 image[]; 2705 }; 2706 2707 /* image_type values */ 2708 2709 enum acpi_rgrt_image_type { 2710 ACPI_RGRT_TYPE_RESERVED0 = 0, 2711 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 2712 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2713 }; 2714 2715 /******************************************************************************* 2716 * 2717 * RHCT - RISC-V Hart Capabilities Table 2718 * Version 1 2719 * 2720 ******************************************************************************/ 2721 2722 struct acpi_table_rhct { 2723 struct acpi_table_header header; /* Common ACPI table header */ 2724 u32 flags; /* RHCT flags */ 2725 u64 time_base_freq; 2726 u32 node_count; 2727 u32 node_offset; 2728 }; 2729 2730 /* RHCT Flags */ 2731 2732 #define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1) 2733 /* 2734 * RHCT subtables 2735 */ 2736 struct acpi_rhct_node_header { 2737 u16 type; 2738 u16 length; 2739 u16 revision; 2740 }; 2741 2742 /* Values for RHCT subtable Type above */ 2743 2744 enum acpi_rhct_node_type { 2745 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000, 2746 ACPI_RHCT_NODE_TYPE_CMO = 0x0001, 2747 ACPI_RHCT_NODE_TYPE_MMU = 0x0002, 2748 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003, 2749 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF, 2750 }; 2751 2752 /* 2753 * RHCT node specific subtables 2754 */ 2755 2756 /* ISA string node structure */ 2757 struct acpi_rhct_isa_string { 2758 u16 isa_length; 2759 char isa[]; 2760 }; 2761 2762 struct acpi_rhct_cmo_node { 2763 u8 reserved; /* Must be zero */ 2764 u8 cbom_size; /* CBOM size in powerof 2 */ 2765 u8 cbop_size; /* CBOP size in powerof 2 */ 2766 u8 cboz_size; /* CBOZ size in powerof 2 */ 2767 }; 2768 2769 struct acpi_rhct_mmu_node { 2770 u8 reserved; /* Must be zero */ 2771 u8 mmu_type; /* Virtual Address Scheme */ 2772 }; 2773 2774 enum acpi_rhct_mmu_type { 2775 ACPI_RHCT_MMU_TYPE_SV39 = 0, 2776 ACPI_RHCT_MMU_TYPE_SV48 = 1, 2777 ACPI_RHCT_MMU_TYPE_SV57 = 2 2778 }; 2779 2780 /* Hart Info node structure */ 2781 struct acpi_rhct_hart_info { 2782 u16 num_offsets; 2783 u32 uid; /* ACPI processor UID */ 2784 }; 2785 2786 /******************************************************************************* 2787 * 2788 * SBST - Smart Battery Specification Table 2789 * Version 1 2790 * 2791 ******************************************************************************/ 2792 2793 struct acpi_table_sbst { 2794 struct acpi_table_header header; /* Common ACPI table header */ 2795 u32 warning_level; 2796 u32 low_level; 2797 u32 critical_level; 2798 }; 2799 2800 /******************************************************************************* 2801 * 2802 * SDEI - Software Delegated Exception Interface Descriptor Table 2803 * 2804 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2805 * May 8th, 2017. Copyright 2017 ARM Ltd. 2806 * 2807 ******************************************************************************/ 2808 2809 struct acpi_table_sdei { 2810 struct acpi_table_header header; /* Common ACPI table header */ 2811 }; 2812 2813 /******************************************************************************* 2814 * 2815 * SDEV - Secure Devices Table (ACPI 6.2) 2816 * Version 1 2817 * 2818 ******************************************************************************/ 2819 2820 struct acpi_table_sdev { 2821 struct acpi_table_header header; /* Common ACPI table header */ 2822 }; 2823 2824 struct acpi_sdev_header { 2825 u8 type; 2826 u8 flags; 2827 u16 length; 2828 }; 2829 2830 /* Values for subtable type above */ 2831 2832 enum acpi_sdev_type { 2833 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2834 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2835 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2836 }; 2837 2838 /* Values for flags above */ 2839 2840 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2841 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 2842 2843 /* 2844 * SDEV subtables 2845 */ 2846 2847 /* 0: Namespace Device Based Secure Device Structure */ 2848 2849 struct acpi_sdev_namespace { 2850 struct acpi_sdev_header header; 2851 u16 device_id_offset; 2852 u16 device_id_length; 2853 u16 vendor_data_offset; 2854 u16 vendor_data_length; 2855 }; 2856 2857 struct acpi_sdev_secure_component { 2858 u16 secure_component_offset; 2859 u16 secure_component_length; 2860 }; 2861 2862 /* 2863 * SDEV sub-subtables ("Components") for above 2864 */ 2865 struct acpi_sdev_component { 2866 struct acpi_sdev_header header; 2867 }; 2868 2869 /* Values for sub-subtable type above */ 2870 2871 enum acpi_sac_type { 2872 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 2873 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 2874 }; 2875 2876 struct acpi_sdev_id_component { 2877 struct acpi_sdev_header header; 2878 u16 hardware_id_offset; 2879 u16 hardware_id_length; 2880 u16 subsystem_id_offset; 2881 u16 subsystem_id_length; 2882 u16 hardware_revision; 2883 u8 hardware_rev_present; 2884 u8 class_code_present; 2885 u8 pci_base_class; 2886 u8 pci_sub_class; 2887 u8 pci_programming_xface; 2888 }; 2889 2890 struct acpi_sdev_mem_component { 2891 struct acpi_sdev_header header; 2892 u32 reserved; 2893 u64 memory_base_address; 2894 u64 memory_length; 2895 }; 2896 2897 /* 1: PCIe Endpoint Device Based Device Structure */ 2898 2899 struct acpi_sdev_pcie { 2900 struct acpi_sdev_header header; 2901 u16 segment; 2902 u16 start_bus; 2903 u16 path_offset; 2904 u16 path_length; 2905 u16 vendor_data_offset; 2906 u16 vendor_data_length; 2907 }; 2908 2909 /* 1a: PCIe Endpoint path entry */ 2910 2911 struct acpi_sdev_pcie_path { 2912 u8 device; 2913 u8 function; 2914 }; 2915 2916 /******************************************************************************* 2917 * 2918 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 2919 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2920 * Trust Domain Extensions (Intel TDX)". 2921 * Version 1 2922 * 2923 ******************************************************************************/ 2924 2925 struct acpi_table_svkl { 2926 struct acpi_table_header header; /* Common ACPI table header */ 2927 u32 count; 2928 }; 2929 2930 struct acpi_svkl_key { 2931 u16 type; 2932 u16 format; 2933 u32 size; 2934 u64 address; 2935 }; 2936 2937 enum acpi_svkl_type { 2938 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 2939 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 2940 }; 2941 2942 enum acpi_svkl_format { 2943 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 2944 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 2945 }; 2946 2947 /******************************************************************************* 2948 * 2949 * TDEL - TD-Event Log 2950 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2951 * Trust Domain Extensions (Intel TDX)". 2952 * September 2020 2953 * 2954 ******************************************************************************/ 2955 2956 struct acpi_table_tdel { 2957 struct acpi_table_header header; /* Common ACPI table header */ 2958 u32 reserved; 2959 u64 log_area_minimum_length; 2960 u64 log_area_start_address; 2961 }; 2962 2963 /* Reset to default packing */ 2964 2965 #pragma pack() 2966 2967 #endif /* __ACTBL2_H__ */ 2968