1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Name: actbl1.h - Additional ACPI table definitions 5 * 6 * Copyright (C) 2000 - 2023, Intel Corp. 7 * 8 *****************************************************************************/ 9 10 #ifndef __ACTBL1_H__ 11 #define __ACTBL1_H__ 12 13 /******************************************************************************* 14 * 15 * Additional ACPI Tables 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22 /* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27 #define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */ 28 #define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */ 29 #define ACPI_SIG_ASPT "ASPT" /* AMD Secure Processor Table */ 30 #define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */ 31 #define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */ 32 #define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */ 33 #define ACPI_SIG_CEDT "CEDT" /* CXL Early Discovery Table */ 34 #define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */ 35 #define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */ 36 #define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */ 37 #define ACPI_SIG_DBGP "DBGP" /* Debug Port table */ 38 #define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */ 39 #define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */ 40 #define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */ 41 #define ACPI_SIG_EINJ "EINJ" /* Error Injection table */ 42 #define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */ 43 #define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */ 44 #define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */ 45 #define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */ 46 #define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */ 47 #define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */ 48 #define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */ 49 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 50 51 #define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */ 52 #define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */ 53 54 #define ACPI_SIG_NBFT "NBFT" /* NVMe Boot Firmware Table */ 55 56 /* Reserved table signatures */ 57 58 #define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */ 59 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 60 61 /* 62 * These tables have been seen in the field, but no definition has been found 63 */ 64 #ifdef ACPI_UNDEFINED_TABLES 65 #define ACPI_SIG_ATKG "ATKG" 66 #define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */ 67 #define ACPI_SIG_IEIT "IEIT" 68 #endif 69 70 /* 71 * All tables must be byte-packed to match the ACPI specification, since 72 * the tables are provided by the system BIOS. 73 */ 74 #pragma pack(1) 75 76 /* 77 * Note: C bitfields are not used for this reason: 78 * 79 * "Bitfields are great and easy to read, but unfortunately the C language 80 * does not specify the layout of bitfields in memory, which means they are 81 * essentially useless for dealing with packed data in on-disk formats or 82 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 83 * this decision was a design error in C. Ritchie could have picked an order 84 * and stuck with it." Norman Ramsey. 85 * See http://stackoverflow.com/a/1053662/41661 86 */ 87 88 /******************************************************************************* 89 * 90 * Common subtable headers 91 * 92 ******************************************************************************/ 93 94 /* Generic subtable header (used in MADT, SRAT, etc.) */ 95 96 struct acpi_subtable_header { 97 u8 type; 98 u8 length; 99 }; 100 101 /* Subtable header for WHEA tables (EINJ, ERST, WDAT) */ 102 103 struct acpi_whea_header { 104 u8 action; 105 u8 instruction; 106 u8 flags; 107 u8 reserved; 108 struct acpi_generic_address register_region; 109 u64 value; /* Value used with Read/Write register */ 110 u64 mask; /* Bitmask required for this register instruction */ 111 }; 112 113 /* https://docs.microsoft.com/en-us/windows-hardware/drivers/ddi/acpitabl/ns-acpitabl-aspt_table */ 114 #define ASPT_REVISION_ID 0x01 115 struct acpi_table_aspt { 116 struct acpi_table_header header; 117 u32 num_entries; 118 }; 119 120 struct acpi_aspt_header { 121 u16 type; 122 u16 length; 123 }; 124 125 enum acpi_aspt_type { 126 ACPI_ASPT_TYPE_GLOBAL_REGS = 0, 127 ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1, 128 ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2, 129 }; 130 131 /* 0: ASPT Global Registers */ 132 struct acpi_aspt_global_regs { 133 struct acpi_aspt_header header; 134 u32 reserved; 135 u64 feature_reg_addr; 136 u64 irq_en_reg_addr; 137 u64 irq_st_reg_addr; 138 }; 139 140 /* 1: ASPT SEV Mailbox Registers */ 141 struct acpi_aspt_sev_mbox_regs { 142 struct acpi_aspt_header header; 143 u8 mbox_irq_id; 144 u8 reserved[3]; 145 u64 cmd_resp_reg_addr; 146 u64 cmd_buf_lo_reg_addr; 147 u64 cmd_buf_hi_reg_addr; 148 }; 149 150 /* 2: ASPT ACPI Mailbox Registers */ 151 struct acpi_aspt_acpi_mbox_regs { 152 struct acpi_aspt_header header; 153 u32 reserved1; 154 u64 cmd_resp_reg_addr; 155 u64 reserved2[2]; 156 }; 157 158 /******************************************************************************* 159 * 160 * ASF - Alert Standard Format table (Signature "ASF!") 161 * Revision 0x10 162 * 163 * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003 164 * 165 ******************************************************************************/ 166 167 struct acpi_table_asf { 168 struct acpi_table_header header; /* Common ACPI table header */ 169 }; 170 171 /* ASF subtable header */ 172 173 struct acpi_asf_header { 174 u8 type; 175 u8 reserved; 176 u16 length; 177 }; 178 179 /* Values for Type field above */ 180 181 enum acpi_asf_type { 182 ACPI_ASF_TYPE_INFO = 0, 183 ACPI_ASF_TYPE_ALERT = 1, 184 ACPI_ASF_TYPE_CONTROL = 2, 185 ACPI_ASF_TYPE_BOOT = 3, 186 ACPI_ASF_TYPE_ADDRESS = 4, 187 ACPI_ASF_TYPE_RESERVED = 5 188 }; 189 190 /* 191 * ASF subtables 192 */ 193 194 /* 0: ASF Information */ 195 196 struct acpi_asf_info { 197 struct acpi_asf_header header; 198 u8 min_reset_value; 199 u8 min_poll_interval; 200 u16 system_id; 201 u32 mfg_id; 202 u8 flags; 203 u8 reserved2[3]; 204 }; 205 206 /* Masks for Flags field above */ 207 208 #define ACPI_ASF_SMBUS_PROTOCOLS (1) 209 210 /* 1: ASF Alerts */ 211 212 struct acpi_asf_alert { 213 struct acpi_asf_header header; 214 u8 assert_mask; 215 u8 deassert_mask; 216 u8 alerts; 217 u8 data_length; 218 }; 219 220 struct acpi_asf_alert_data { 221 u8 address; 222 u8 command; 223 u8 mask; 224 u8 value; 225 u8 sensor_type; 226 u8 type; 227 u8 offset; 228 u8 source_type; 229 u8 severity; 230 u8 sensor_number; 231 u8 entity; 232 u8 instance; 233 }; 234 235 /* 2: ASF Remote Control */ 236 237 struct acpi_asf_remote { 238 struct acpi_asf_header header; 239 u8 controls; 240 u8 data_length; 241 u16 reserved2; 242 }; 243 244 struct acpi_asf_control_data { 245 u8 function; 246 u8 address; 247 u8 command; 248 u8 value; 249 }; 250 251 /* 3: ASF RMCP Boot Options */ 252 253 struct acpi_asf_rmcp { 254 struct acpi_asf_header header; 255 u8 capabilities[7]; 256 u8 completion_code; 257 u32 enterprise_id; 258 u8 command; 259 u16 parameter; 260 u16 boot_options; 261 u16 oem_parameters; 262 }; 263 264 /* 4: ASF Address */ 265 266 struct acpi_asf_address { 267 struct acpi_asf_header header; 268 u8 eprom_address; 269 u8 devices; 270 }; 271 272 /******************************************************************************* 273 * 274 * BERT - Boot Error Record Table (ACPI 4.0) 275 * Version 1 276 * 277 ******************************************************************************/ 278 279 struct acpi_table_bert { 280 struct acpi_table_header header; /* Common ACPI table header */ 281 u32 region_length; /* Length of the boot error region */ 282 u64 address; /* Physical address of the error region */ 283 }; 284 285 /* Boot Error Region (not a subtable, pointed to by Address field above) */ 286 287 struct acpi_bert_region { 288 u32 block_status; /* Type of error information */ 289 u32 raw_data_offset; /* Offset to raw error data */ 290 u32 raw_data_length; /* Length of raw error data */ 291 u32 data_length; /* Length of generic error data */ 292 u32 error_severity; /* Severity code */ 293 }; 294 295 /* Values for block_status flags above */ 296 297 #define ACPI_BERT_UNCORRECTABLE (1) 298 #define ACPI_BERT_CORRECTABLE (1<<1) 299 #define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2) 300 #define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3) 301 #define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 302 303 /* Values for error_severity above */ 304 305 enum acpi_bert_error_severity { 306 ACPI_BERT_ERROR_CORRECTABLE = 0, 307 ACPI_BERT_ERROR_FATAL = 1, 308 ACPI_BERT_ERROR_CORRECTED = 2, 309 ACPI_BERT_ERROR_NONE = 3, 310 ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */ 311 }; 312 313 /* 314 * Note: The generic error data that follows the error_severity field above 315 * uses the struct acpi_hest_generic_data defined under the HEST table below 316 */ 317 318 /******************************************************************************* 319 * 320 * BGRT - Boot Graphics Resource Table (ACPI 5.0) 321 * Version 1 322 * 323 ******************************************************************************/ 324 325 struct acpi_table_bgrt { 326 struct acpi_table_header header; /* Common ACPI table header */ 327 u16 version; 328 u8 status; 329 u8 image_type; 330 u64 image_address; 331 u32 image_offset_x; 332 u32 image_offset_y; 333 }; 334 335 /* Flags for Status field above */ 336 337 #define ACPI_BGRT_DISPLAYED (1) 338 #define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1) 339 340 /******************************************************************************* 341 * 342 * BOOT - Simple Boot Flag Table 343 * Version 1 344 * 345 * Conforms to the "Simple Boot Flag Specification", Version 2.1 346 * 347 ******************************************************************************/ 348 349 struct acpi_table_boot { 350 struct acpi_table_header header; /* Common ACPI table header */ 351 u8 cmos_index; /* Index in CMOS RAM for the boot register */ 352 u8 reserved[3]; 353 }; 354 355 /******************************************************************************* 356 * 357 * CDAT - Coherent Device Attribute Table 358 * Version 1 359 * 360 * Conforms to the "Coherent Device Attribute Table (CDAT) Specification 361 " (Revision 1.01, October 2020.) 362 * 363 ******************************************************************************/ 364 365 struct acpi_table_cdat { 366 u32 length; /* Length of table in bytes, including this header */ 367 u8 revision; /* ACPI Specification minor version number */ 368 u8 checksum; /* To make sum of entire table == 0 */ 369 u8 reserved[6]; 370 u32 sequence; /* Used to detect runtime CDAT table changes */ 371 }; 372 373 /* CDAT common subtable header */ 374 375 struct acpi_cdat_header { 376 u8 type; 377 u8 reserved; 378 u16 length; 379 }; 380 381 /* Values for Type field above */ 382 383 enum acpi_cdat_type { 384 ACPI_CDAT_TYPE_DSMAS = 0, 385 ACPI_CDAT_TYPE_DSLBIS = 1, 386 ACPI_CDAT_TYPE_DSMSCIS = 2, 387 ACPI_CDAT_TYPE_DSIS = 3, 388 ACPI_CDAT_TYPE_DSEMTS = 4, 389 ACPI_CDAT_TYPE_SSLBIS = 5, 390 ACPI_CDAT_TYPE_RESERVED = 6 /* 6 through 0xFF are reserved */ 391 }; 392 393 /* Subtable 0: Device Scoped Memory Affinity Structure (DSMAS) */ 394 395 struct acpi_cdat_dsmas { 396 u8 dsmad_handle; 397 u8 flags; 398 u16 reserved; 399 u64 dpa_base_address; 400 u64 dpa_length; 401 }; 402 403 /* Flags for subtable above */ 404 405 #define ACPI_CDAT_DSMAS_NON_VOLATILE (1 << 2) 406 407 /* Subtable 1: Device scoped Latency and Bandwidth Information Structure (DSLBIS) */ 408 409 struct acpi_cdat_dslbis { 410 u8 handle; 411 u8 flags; /* If Handle matches a DSMAS handle, the definition of this field matches 412 * Flags field in HMAT System Locality Latency */ 413 u8 data_type; 414 u8 reserved; 415 u64 entry_base_unit; 416 u16 entry[3]; 417 u16 reserved2; 418 }; 419 420 /* Subtable 2: Device Scoped Memory Side Cache Information Structure (DSMSCIS) */ 421 422 struct acpi_cdat_dsmscis { 423 u8 dsmas_handle; 424 u8 reserved[3]; 425 u64 side_cache_size; 426 u32 cache_attributes; 427 }; 428 429 /* Subtable 3: Device Scoped Initiator Structure (DSIS) */ 430 431 struct acpi_cdat_dsis { 432 u8 flags; 433 u8 handle; 434 u16 reserved; 435 }; 436 437 /* Flags for above subtable */ 438 439 #define ACPI_CDAT_DSIS_MEM_ATTACHED (1 << 0) 440 441 /* Subtable 4: Device Scoped EFI Memory Type Structure (DSEMTS) */ 442 443 struct acpi_cdat_dsemts { 444 u8 dsmas_handle; 445 u8 memory_type; 446 u16 reserved; 447 u64 dpa_offset; 448 u64 range_length; 449 }; 450 451 /* Subtable 5: Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) */ 452 453 struct acpi_cdat_sslbis { 454 u8 data_type; 455 u8 reserved[3]; 456 u64 entry_base_unit; 457 }; 458 459 /* Sub-subtable for above, sslbe_entries field */ 460 461 struct acpi_cdat_sslbe { 462 u16 portx_id; 463 u16 porty_id; 464 u16 latency_or_bandwidth; 465 u16 reserved; 466 }; 467 468 #define ACPI_CDAT_SSLBIS_US_PORT 0x0100 469 #define ACPI_CDAT_SSLBIS_ANY_PORT 0xffff 470 471 /******************************************************************************* 472 * 473 * CEDT - CXL Early Discovery Table 474 * Version 1 475 * 476 * Conforms to the "CXL Early Discovery Table" (CXL 2.0, October 2020) 477 * 478 ******************************************************************************/ 479 480 struct acpi_table_cedt { 481 struct acpi_table_header header; /* Common ACPI table header */ 482 }; 483 484 /* CEDT subtable header (Performance Record Structure) */ 485 486 struct acpi_cedt_header { 487 u8 type; 488 u8 reserved; 489 u16 length; 490 }; 491 492 /* Values for Type field above */ 493 494 enum acpi_cedt_type { 495 ACPI_CEDT_TYPE_CHBS = 0, 496 ACPI_CEDT_TYPE_CFMWS = 1, 497 ACPI_CEDT_TYPE_CXIMS = 2, 498 ACPI_CEDT_TYPE_RDPAS = 3, 499 ACPI_CEDT_TYPE_RESERVED = 4, 500 }; 501 502 /* Values for version field above */ 503 504 #define ACPI_CEDT_CHBS_VERSION_CXL11 (0) 505 #define ACPI_CEDT_CHBS_VERSION_CXL20 (1) 506 507 /* Values for length field above */ 508 509 #define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000) 510 #define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000) 511 512 /* 513 * CEDT subtables 514 */ 515 516 /* 0: CXL Host Bridge Structure */ 517 518 struct acpi_cedt_chbs { 519 struct acpi_cedt_header header; 520 u32 uid; 521 u32 cxl_version; 522 u32 reserved; 523 u64 base; 524 u64 length; 525 }; 526 527 /* 1: CXL Fixed Memory Window Structure */ 528 529 struct acpi_cedt_cfmws { 530 struct acpi_cedt_header header; 531 u32 reserved1; 532 u64 base_hpa; 533 u64 window_size; 534 u8 interleave_ways; 535 u8 interleave_arithmetic; 536 u16 reserved2; 537 u32 granularity; 538 u16 restrictions; 539 u16 qtg_id; 540 u32 interleave_targets[]; 541 }; 542 543 struct acpi_cedt_cfmws_target_element { 544 u32 interleave_target; 545 }; 546 547 /* Values for Interleave Arithmetic field above */ 548 549 #define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0) 550 #define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1) 551 552 /* Values for Restrictions field above */ 553 554 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1) 555 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1<<1) 556 #define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1<<2) 557 #define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1<<3) 558 #define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1<<4) 559 560 /* 2: CXL XOR Interleave Math Structure */ 561 562 struct acpi_cedt_cxims { 563 struct acpi_cedt_header header; 564 u16 reserved1; 565 u8 hbig; 566 u8 nr_xormaps; 567 u64 xormap_list[]; 568 }; 569 570 /* 3: CXL RCEC Downstream Port Association Structure */ 571 572 struct acpi_cedt_rdpas { 573 struct acpi_cedt_header header; 574 u8 reserved1; 575 u16 length; 576 u16 segment; 577 u16 bdf; 578 u8 protocol; 579 u64 address; 580 }; 581 582 /* Masks for bdf field above */ 583 #define ACPI_CEDT_RDPAS_BUS_MASK 0xff00 584 #define ACPI_CEDT_RDPAS_DEVICE_MASK 0x00f8 585 #define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x0007 586 587 #define ACPI_CEDT_RDPAS_PROTOCOL_IO (0) 588 #define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1) 589 590 /******************************************************************************* 591 * 592 * CPEP - Corrected Platform Error Polling table (ACPI 4.0) 593 * Version 1 594 * 595 ******************************************************************************/ 596 597 struct acpi_table_cpep { 598 struct acpi_table_header header; /* Common ACPI table header */ 599 u64 reserved; 600 }; 601 602 /* Subtable */ 603 604 struct acpi_cpep_polling { 605 struct acpi_subtable_header header; 606 u8 id; /* Processor ID */ 607 u8 eid; /* Processor EID */ 608 u32 interval; /* Polling interval (msec) */ 609 }; 610 611 /******************************************************************************* 612 * 613 * CSRT - Core System Resource Table 614 * Version 0 615 * 616 * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011 617 * 618 ******************************************************************************/ 619 620 struct acpi_table_csrt { 621 struct acpi_table_header header; /* Common ACPI table header */ 622 }; 623 624 /* Resource Group subtable */ 625 626 struct acpi_csrt_group { 627 u32 length; 628 u32 vendor_id; 629 u32 subvendor_id; 630 u16 device_id; 631 u16 subdevice_id; 632 u16 revision; 633 u16 reserved; 634 u32 shared_info_length; 635 636 /* Shared data immediately follows (Length = shared_info_length) */ 637 }; 638 639 /* Shared Info subtable */ 640 641 struct acpi_csrt_shared_info { 642 u16 major_version; 643 u16 minor_version; 644 u32 mmio_base_low; 645 u32 mmio_base_high; 646 u32 gsi_interrupt; 647 u8 interrupt_polarity; 648 u8 interrupt_mode; 649 u8 num_channels; 650 u8 dma_address_width; 651 u16 base_request_line; 652 u16 num_handshake_signals; 653 u32 max_block_size; 654 655 /* Resource descriptors immediately follow (Length = Group length - shared_info_length) */ 656 }; 657 658 /* Resource Descriptor subtable */ 659 660 struct acpi_csrt_descriptor { 661 u32 length; 662 u16 type; 663 u16 subtype; 664 u32 uid; 665 666 /* Resource-specific information immediately follows */ 667 }; 668 669 /* Resource Types */ 670 671 #define ACPI_CSRT_TYPE_INTERRUPT 0x0001 672 #define ACPI_CSRT_TYPE_TIMER 0x0002 673 #define ACPI_CSRT_TYPE_DMA 0x0003 674 675 /* Resource Subtypes */ 676 677 #define ACPI_CSRT_XRUPT_LINE 0x0000 678 #define ACPI_CSRT_XRUPT_CONTROLLER 0x0001 679 #define ACPI_CSRT_TIMER 0x0000 680 #define ACPI_CSRT_DMA_CHANNEL 0x0000 681 #define ACPI_CSRT_DMA_CONTROLLER 0x0001 682 683 /******************************************************************************* 684 * 685 * DBG2 - Debug Port Table 2 686 * Version 0 (Both main table and subtables) 687 * 688 * Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21, 2020 689 * 690 ******************************************************************************/ 691 692 struct acpi_table_dbg2 { 693 struct acpi_table_header header; /* Common ACPI table header */ 694 u32 info_offset; 695 u32 info_count; 696 }; 697 698 struct acpi_dbg2_header { 699 u32 info_offset; 700 u32 info_count; 701 }; 702 703 /* Debug Device Information Subtable */ 704 705 struct acpi_dbg2_device { 706 u8 revision; 707 u16 length; 708 u8 register_count; /* Number of base_address registers */ 709 u16 namepath_length; 710 u16 namepath_offset; 711 u16 oem_data_length; 712 u16 oem_data_offset; 713 u16 port_type; 714 u16 port_subtype; 715 u16 reserved; 716 u16 base_address_offset; 717 u16 address_size_offset; 718 /* 719 * Data that follows: 720 * base_address (required) - Each in 12-byte Generic Address Structure format. 721 * address_size (required) - Array of u32 sizes corresponding to each base_address register. 722 * Namepath (required) - Null terminated string. Single dot if not supported. 723 * oem_data (optional) - Length is oem_data_length. 724 */ 725 }; 726 727 /* Types for port_type field above */ 728 729 #define ACPI_DBG2_SERIAL_PORT 0x8000 730 #define ACPI_DBG2_1394_PORT 0x8001 731 #define ACPI_DBG2_USB_PORT 0x8002 732 #define ACPI_DBG2_NET_PORT 0x8003 733 734 /* Subtypes for port_subtype field above */ 735 736 #define ACPI_DBG2_16550_COMPATIBLE 0x0000 737 #define ACPI_DBG2_16550_SUBSET 0x0001 738 #define ACPI_DBG2_MAX311XE_SPI 0x0002 739 #define ACPI_DBG2_ARM_PL011 0x0003 740 #define ACPI_DBG2_MSM8X60 0x0004 741 #define ACPI_DBG2_16550_NVIDIA 0x0005 742 #define ACPI_DBG2_TI_OMAP 0x0006 743 #define ACPI_DBG2_APM88XXXX 0x0008 744 #define ACPI_DBG2_MSM8974 0x0009 745 #define ACPI_DBG2_SAM5250 0x000A 746 #define ACPI_DBG2_INTEL_USIF 0x000B 747 #define ACPI_DBG2_IMX6 0x000C 748 #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D 749 #define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E 750 #define ACPI_DBG2_ARM_DCC 0x000F 751 #define ACPI_DBG2_BCM2835 0x0010 752 #define ACPI_DBG2_SDM845_1_8432MHZ 0x0011 753 #define ACPI_DBG2_16550_WITH_GAS 0x0012 754 #define ACPI_DBG2_SDM845_7_372MHZ 0x0013 755 #define ACPI_DBG2_INTEL_LPSS 0x0014 756 757 #define ACPI_DBG2_1394_STANDARD 0x0000 758 759 #define ACPI_DBG2_USB_XHCI 0x0000 760 #define ACPI_DBG2_USB_EHCI 0x0001 761 762 /******************************************************************************* 763 * 764 * DBGP - Debug Port table 765 * Version 1 766 * 767 * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000 768 * 769 ******************************************************************************/ 770 771 struct acpi_table_dbgp { 772 struct acpi_table_header header; /* Common ACPI table header */ 773 u8 type; /* 0=full 16550, 1=subset of 16550 */ 774 u8 reserved[3]; 775 struct acpi_generic_address debug_port; 776 }; 777 778 /******************************************************************************* 779 * 780 * DMAR - DMA Remapping table 781 * Version 1 782 * 783 * Conforms to "Intel Virtualization Technology for Directed I/O", 784 * Version 2.3, October 2014 785 * 786 ******************************************************************************/ 787 788 struct acpi_table_dmar { 789 struct acpi_table_header header; /* Common ACPI table header */ 790 u8 width; /* Host Address Width */ 791 u8 flags; 792 u8 reserved[10]; 793 }; 794 795 /* Masks for Flags field above */ 796 797 #define ACPI_DMAR_INTR_REMAP (1) 798 #define ACPI_DMAR_X2APIC_OPT_OUT (1<<1) 799 #define ACPI_DMAR_X2APIC_MODE (1<<2) 800 801 /* DMAR subtable header */ 802 803 struct acpi_dmar_header { 804 u16 type; 805 u16 length; 806 }; 807 808 /* Values for subtable type in struct acpi_dmar_header */ 809 810 enum acpi_dmar_type { 811 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0, 812 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1, 813 ACPI_DMAR_TYPE_ROOT_ATS = 2, 814 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3, 815 ACPI_DMAR_TYPE_NAMESPACE = 4, 816 ACPI_DMAR_TYPE_SATC = 5, 817 ACPI_DMAR_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 818 }; 819 820 /* DMAR Device Scope structure */ 821 822 struct acpi_dmar_device_scope { 823 u8 entry_type; 824 u8 length; 825 u16 reserved; 826 u8 enumeration_id; 827 u8 bus; 828 }; 829 830 /* Values for entry_type in struct acpi_dmar_device_scope - device types */ 831 832 enum acpi_dmar_scope_type { 833 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0, 834 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1, 835 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2, 836 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3, 837 ACPI_DMAR_SCOPE_TYPE_HPET = 4, 838 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5, 839 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 840 }; 841 842 struct acpi_dmar_pci_path { 843 u8 device; 844 u8 function; 845 }; 846 847 /* 848 * DMAR Subtables, correspond to Type in struct acpi_dmar_header 849 */ 850 851 /* 0: Hardware Unit Definition */ 852 853 struct acpi_dmar_hardware_unit { 854 struct acpi_dmar_header header; 855 u8 flags; 856 u8 size; /* Size of the register set */ 857 u16 segment; 858 u64 address; /* Register Base Address */ 859 }; 860 861 /* Masks for Flags field above */ 862 863 #define ACPI_DMAR_INCLUDE_ALL (1) 864 865 /* 1: Reserved Memory Definition */ 866 867 struct acpi_dmar_reserved_memory { 868 struct acpi_dmar_header header; 869 u16 reserved; 870 u16 segment; 871 u64 base_address; /* 4K aligned base address */ 872 u64 end_address; /* 4K aligned limit address */ 873 }; 874 875 /* Masks for Flags field above */ 876 877 #define ACPI_DMAR_ALLOW_ALL (1) 878 879 /* 2: Root Port ATS Capability Reporting Structure */ 880 881 struct acpi_dmar_atsr { 882 struct acpi_dmar_header header; 883 u8 flags; 884 u8 reserved; 885 u16 segment; 886 }; 887 888 /* Masks for Flags field above */ 889 890 #define ACPI_DMAR_ALL_PORTS (1) 891 892 /* 3: Remapping Hardware Static Affinity Structure */ 893 894 struct acpi_dmar_rhsa { 895 struct acpi_dmar_header header; 896 u32 reserved; 897 u64 base_address; 898 u32 proximity_domain; 899 }; 900 901 /* 4: ACPI Namespace Device Declaration Structure */ 902 903 struct acpi_dmar_andd { 904 struct acpi_dmar_header header; 905 u8 reserved[3]; 906 u8 device_number; 907 union { 908 char __pad; 909 ACPI_FLEX_ARRAY(char, device_name); 910 }; 911 }; 912 913 /* 5: SOC Integrated Address Translation Cache Reporting Structure */ 914 915 struct acpi_dmar_satc { 916 struct acpi_dmar_header header; 917 u8 flags; 918 u8 reserved; 919 u16 segment; 920 }; 921 /******************************************************************************* 922 * 923 * DRTM - Dynamic Root of Trust for Measurement table 924 * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0 925 * Table version 1 926 * 927 ******************************************************************************/ 928 929 struct acpi_table_drtm { 930 struct acpi_table_header header; /* Common ACPI table header */ 931 u64 entry_base_address; 932 u64 entry_length; 933 u32 entry_address32; 934 u64 entry_address64; 935 u64 exit_address; 936 u64 log_area_address; 937 u32 log_area_length; 938 u64 arch_dependent_address; 939 u32 flags; 940 }; 941 942 /* Flag Definitions for above */ 943 944 #define ACPI_DRTM_ACCESS_ALLOWED (1) 945 #define ACPI_DRTM_ENABLE_GAP_CODE (1<<1) 946 #define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2) 947 #define ACPI_DRTM_AUTHORITY_ORDER (1<<3) 948 949 /* 1) Validated Tables List (64-bit addresses) */ 950 951 struct acpi_drtm_vtable_list { 952 u32 validated_table_count; 953 u64 validated_tables[]; 954 }; 955 956 /* 2) Resources List (of Resource Descriptors) */ 957 958 /* Resource Descriptor */ 959 960 struct acpi_drtm_resource { 961 u8 size[7]; 962 u8 type; 963 u64 address; 964 }; 965 966 struct acpi_drtm_resource_list { 967 u32 resource_count; 968 struct acpi_drtm_resource resources[]; 969 }; 970 971 /* 3) Platform-specific Identifiers List */ 972 973 struct acpi_drtm_dps_id { 974 u32 dps_id_length; 975 u8 dps_id[16]; 976 }; 977 978 /******************************************************************************* 979 * 980 * ECDT - Embedded Controller Boot Resources Table 981 * Version 1 982 * 983 ******************************************************************************/ 984 985 struct acpi_table_ecdt { 986 struct acpi_table_header header; /* Common ACPI table header */ 987 struct acpi_generic_address control; /* Address of EC command/status register */ 988 struct acpi_generic_address data; /* Address of EC data register */ 989 u32 uid; /* Unique ID - must be same as the EC _UID method */ 990 u8 gpe; /* The GPE for the EC */ 991 u8 id[]; /* Full namepath of the EC in the ACPI namespace */ 992 }; 993 994 /******************************************************************************* 995 * 996 * EINJ - Error Injection Table (ACPI 4.0) 997 * Version 1 998 * 999 ******************************************************************************/ 1000 1001 struct acpi_table_einj { 1002 struct acpi_table_header header; /* Common ACPI table header */ 1003 u32 header_length; 1004 u8 flags; 1005 u8 reserved[3]; 1006 u32 entries; 1007 }; 1008 1009 /* EINJ Injection Instruction Entries (actions) */ 1010 1011 struct acpi_einj_entry { 1012 struct acpi_whea_header whea_header; /* Common header for WHEA tables */ 1013 }; 1014 1015 /* Masks for Flags field above */ 1016 1017 #define ACPI_EINJ_PRESERVE (1) 1018 1019 /* Values for Action field above */ 1020 1021 enum acpi_einj_actions { 1022 ACPI_EINJ_BEGIN_OPERATION = 0, 1023 ACPI_EINJ_GET_TRIGGER_TABLE = 1, 1024 ACPI_EINJ_SET_ERROR_TYPE = 2, 1025 ACPI_EINJ_GET_ERROR_TYPE = 3, 1026 ACPI_EINJ_END_OPERATION = 4, 1027 ACPI_EINJ_EXECUTE_OPERATION = 5, 1028 ACPI_EINJ_CHECK_BUSY_STATUS = 6, 1029 ACPI_EINJ_GET_COMMAND_STATUS = 7, 1030 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8, 1031 ACPI_EINJ_GET_EXECUTE_TIMINGS = 9, 1032 ACPI_EINJ_ACTION_RESERVED = 10, /* 10 and greater are reserved */ 1033 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */ 1034 }; 1035 1036 /* Values for Instruction field above */ 1037 1038 enum acpi_einj_instructions { 1039 ACPI_EINJ_READ_REGISTER = 0, 1040 ACPI_EINJ_READ_REGISTER_VALUE = 1, 1041 ACPI_EINJ_WRITE_REGISTER = 2, 1042 ACPI_EINJ_WRITE_REGISTER_VALUE = 3, 1043 ACPI_EINJ_NOOP = 4, 1044 ACPI_EINJ_FLUSH_CACHELINE = 5, 1045 ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */ 1046 }; 1047 1048 struct acpi_einj_error_type_with_addr { 1049 u32 error_type; 1050 u32 vendor_struct_offset; 1051 u32 flags; 1052 u32 apic_id; 1053 u64 address; 1054 u64 range; 1055 u32 pcie_id; 1056 }; 1057 1058 struct acpi_einj_vendor { 1059 u32 length; 1060 u32 pcie_id; 1061 u16 vendor_id; 1062 u16 device_id; 1063 u8 revision_id; 1064 u8 reserved[3]; 1065 }; 1066 1067 /* EINJ Trigger Error Action Table */ 1068 1069 struct acpi_einj_trigger { 1070 u32 header_size; 1071 u32 revision; 1072 u32 table_size; 1073 u32 entry_count; 1074 }; 1075 1076 /* Command status return values */ 1077 1078 enum acpi_einj_command_status { 1079 ACPI_EINJ_SUCCESS = 0, 1080 ACPI_EINJ_FAILURE = 1, 1081 ACPI_EINJ_INVALID_ACCESS = 2, 1082 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */ 1083 }; 1084 1085 /* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */ 1086 1087 #define ACPI_EINJ_PROCESSOR_CORRECTABLE (1) 1088 #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1) 1089 #define ACPI_EINJ_PROCESSOR_FATAL (1<<2) 1090 #define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3) 1091 #define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4) 1092 #define ACPI_EINJ_MEMORY_FATAL (1<<5) 1093 #define ACPI_EINJ_PCIX_CORRECTABLE (1<<6) 1094 #define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7) 1095 #define ACPI_EINJ_PCIX_FATAL (1<<8) 1096 #define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9) 1097 #define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10) 1098 #define ACPI_EINJ_PLATFORM_FATAL (1<<11) 1099 #define ACPI_EINJ_VENDOR_DEFINED (1<<31) 1100 1101 /******************************************************************************* 1102 * 1103 * ERST - Error Record Serialization Table (ACPI 4.0) 1104 * Version 1 1105 * 1106 ******************************************************************************/ 1107 1108 struct acpi_table_erst { 1109 struct acpi_table_header header; /* Common ACPI table header */ 1110 u32 header_length; 1111 u32 reserved; 1112 u32 entries; 1113 }; 1114 1115 /* ERST Serialization Entries (actions) */ 1116 1117 struct acpi_erst_entry { 1118 struct acpi_whea_header whea_header; /* Common header for WHEA tables */ 1119 }; 1120 1121 /* Masks for Flags field above */ 1122 1123 #define ACPI_ERST_PRESERVE (1) 1124 1125 /* Values for Action field above */ 1126 1127 enum acpi_erst_actions { 1128 ACPI_ERST_BEGIN_WRITE = 0, 1129 ACPI_ERST_BEGIN_READ = 1, 1130 ACPI_ERST_BEGIN_CLEAR = 2, 1131 ACPI_ERST_END = 3, 1132 ACPI_ERST_SET_RECORD_OFFSET = 4, 1133 ACPI_ERST_EXECUTE_OPERATION = 5, 1134 ACPI_ERST_CHECK_BUSY_STATUS = 6, 1135 ACPI_ERST_GET_COMMAND_STATUS = 7, 1136 ACPI_ERST_GET_RECORD_ID = 8, 1137 ACPI_ERST_SET_RECORD_ID = 9, 1138 ACPI_ERST_GET_RECORD_COUNT = 10, 1139 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11, 1140 ACPI_ERST_NOT_USED = 12, 1141 ACPI_ERST_GET_ERROR_RANGE = 13, 1142 ACPI_ERST_GET_ERROR_LENGTH = 14, 1143 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15, 1144 ACPI_ERST_EXECUTE_TIMINGS = 16, 1145 ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */ 1146 }; 1147 1148 /* Values for Instruction field above */ 1149 1150 enum acpi_erst_instructions { 1151 ACPI_ERST_READ_REGISTER = 0, 1152 ACPI_ERST_READ_REGISTER_VALUE = 1, 1153 ACPI_ERST_WRITE_REGISTER = 2, 1154 ACPI_ERST_WRITE_REGISTER_VALUE = 3, 1155 ACPI_ERST_NOOP = 4, 1156 ACPI_ERST_LOAD_VAR1 = 5, 1157 ACPI_ERST_LOAD_VAR2 = 6, 1158 ACPI_ERST_STORE_VAR1 = 7, 1159 ACPI_ERST_ADD = 8, 1160 ACPI_ERST_SUBTRACT = 9, 1161 ACPI_ERST_ADD_VALUE = 10, 1162 ACPI_ERST_SUBTRACT_VALUE = 11, 1163 ACPI_ERST_STALL = 12, 1164 ACPI_ERST_STALL_WHILE_TRUE = 13, 1165 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14, 1166 ACPI_ERST_GOTO = 15, 1167 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16, 1168 ACPI_ERST_SET_DST_ADDRESS_BASE = 17, 1169 ACPI_ERST_MOVE_DATA = 18, 1170 ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */ 1171 }; 1172 1173 /* Command status return values */ 1174 1175 enum acpi_erst_command_status { 1176 ACPI_ERST_SUCCESS = 0, 1177 ACPI_ERST_NO_SPACE = 1, 1178 ACPI_ERST_NOT_AVAILABLE = 2, 1179 ACPI_ERST_FAILURE = 3, 1180 ACPI_ERST_RECORD_EMPTY = 4, 1181 ACPI_ERST_NOT_FOUND = 5, 1182 ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */ 1183 }; 1184 1185 /* Error Record Serialization Information */ 1186 1187 struct acpi_erst_info { 1188 u16 signature; /* Should be "ER" */ 1189 u8 data[48]; 1190 }; 1191 1192 /******************************************************************************* 1193 * 1194 * FPDT - Firmware Performance Data Table (ACPI 5.0) 1195 * Version 1 1196 * 1197 ******************************************************************************/ 1198 1199 struct acpi_table_fpdt { 1200 struct acpi_table_header header; /* Common ACPI table header */ 1201 }; 1202 1203 /* FPDT subtable header (Performance Record Structure) */ 1204 1205 struct acpi_fpdt_header { 1206 u16 type; 1207 u8 length; 1208 u8 revision; 1209 }; 1210 1211 /* Values for Type field above */ 1212 1213 enum acpi_fpdt_type { 1214 ACPI_FPDT_TYPE_BOOT = 0, 1215 ACPI_FPDT_TYPE_S3PERF = 1 1216 }; 1217 1218 /* 1219 * FPDT subtables 1220 */ 1221 1222 /* 0: Firmware Basic Boot Performance Record */ 1223 1224 struct acpi_fpdt_boot_pointer { 1225 struct acpi_fpdt_header header; 1226 u8 reserved[4]; 1227 u64 address; 1228 }; 1229 1230 /* 1: S3 Performance Table Pointer Record */ 1231 1232 struct acpi_fpdt_s3pt_pointer { 1233 struct acpi_fpdt_header header; 1234 u8 reserved[4]; 1235 u64 address; 1236 }; 1237 1238 /* 1239 * S3PT - S3 Performance Table. This table is pointed to by the 1240 * S3 Pointer Record above. 1241 */ 1242 struct acpi_table_s3pt { 1243 u8 signature[4]; /* "S3PT" */ 1244 u32 length; 1245 }; 1246 1247 /* 1248 * S3PT Subtables (Not part of the actual FPDT) 1249 */ 1250 1251 /* Values for Type field in S3PT header */ 1252 1253 enum acpi_s3pt_type { 1254 ACPI_S3PT_TYPE_RESUME = 0, 1255 ACPI_S3PT_TYPE_SUSPEND = 1, 1256 ACPI_FPDT_BOOT_PERFORMANCE = 2 1257 }; 1258 1259 struct acpi_s3pt_resume { 1260 struct acpi_fpdt_header header; 1261 u32 resume_count; 1262 u64 full_resume; 1263 u64 average_resume; 1264 }; 1265 1266 struct acpi_s3pt_suspend { 1267 struct acpi_fpdt_header header; 1268 u64 suspend_start; 1269 u64 suspend_end; 1270 }; 1271 1272 /* 1273 * FPDT Boot Performance Record (Not part of the actual FPDT) 1274 */ 1275 struct acpi_fpdt_boot { 1276 struct acpi_fpdt_header header; 1277 u8 reserved[4]; 1278 u64 reset_end; 1279 u64 load_start; 1280 u64 startup_start; 1281 u64 exit_services_entry; 1282 u64 exit_services_exit; 1283 }; 1284 1285 /******************************************************************************* 1286 * 1287 * GTDT - Generic Timer Description Table (ACPI 5.1) 1288 * Version 2 1289 * 1290 ******************************************************************************/ 1291 1292 struct acpi_table_gtdt { 1293 struct acpi_table_header header; /* Common ACPI table header */ 1294 u64 counter_block_addresss; 1295 u32 reserved; 1296 u32 secure_el1_interrupt; 1297 u32 secure_el1_flags; 1298 u32 non_secure_el1_interrupt; 1299 u32 non_secure_el1_flags; 1300 u32 virtual_timer_interrupt; 1301 u32 virtual_timer_flags; 1302 u32 non_secure_el2_interrupt; 1303 u32 non_secure_el2_flags; 1304 u64 counter_read_block_address; 1305 u32 platform_timer_count; 1306 u32 platform_timer_offset; 1307 }; 1308 1309 /* Flag Definitions: Timer Block Physical Timers and Virtual timers */ 1310 1311 #define ACPI_GTDT_INTERRUPT_MODE (1) 1312 #define ACPI_GTDT_INTERRUPT_POLARITY (1<<1) 1313 #define ACPI_GTDT_ALWAYS_ON (1<<2) 1314 1315 struct acpi_gtdt_el2 { 1316 u32 virtual_el2_timer_gsiv; 1317 u32 virtual_el2_timer_flags; 1318 }; 1319 1320 /* Common GTDT subtable header */ 1321 1322 struct acpi_gtdt_header { 1323 u8 type; 1324 u16 length; 1325 }; 1326 1327 /* Values for GTDT subtable type above */ 1328 1329 enum acpi_gtdt_type { 1330 ACPI_GTDT_TYPE_TIMER_BLOCK = 0, 1331 ACPI_GTDT_TYPE_WATCHDOG = 1, 1332 ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 1333 }; 1334 1335 /* GTDT Subtables, correspond to Type in struct acpi_gtdt_header */ 1336 1337 /* 0: Generic Timer Block */ 1338 1339 struct acpi_gtdt_timer_block { 1340 struct acpi_gtdt_header header; 1341 u8 reserved; 1342 u64 block_address; 1343 u32 timer_count; 1344 u32 timer_offset; 1345 }; 1346 1347 /* Timer Sub-Structure, one per timer */ 1348 1349 struct acpi_gtdt_timer_entry { 1350 u8 frame_number; 1351 u8 reserved[3]; 1352 u64 base_address; 1353 u64 el0_base_address; 1354 u32 timer_interrupt; 1355 u32 timer_flags; 1356 u32 virtual_timer_interrupt; 1357 u32 virtual_timer_flags; 1358 u32 common_flags; 1359 }; 1360 1361 /* Flag Definitions: timer_flags and virtual_timer_flags above */ 1362 1363 #define ACPI_GTDT_GT_IRQ_MODE (1) 1364 #define ACPI_GTDT_GT_IRQ_POLARITY (1<<1) 1365 1366 /* Flag Definitions: common_flags above */ 1367 1368 #define ACPI_GTDT_GT_IS_SECURE_TIMER (1) 1369 #define ACPI_GTDT_GT_ALWAYS_ON (1<<1) 1370 1371 /* 1: SBSA Generic Watchdog Structure */ 1372 1373 struct acpi_gtdt_watchdog { 1374 struct acpi_gtdt_header header; 1375 u8 reserved; 1376 u64 refresh_frame_address; 1377 u64 control_frame_address; 1378 u32 timer_interrupt; 1379 u32 timer_flags; 1380 }; 1381 1382 /* Flag Definitions: timer_flags above */ 1383 1384 #define ACPI_GTDT_WATCHDOG_IRQ_MODE (1) 1385 #define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1) 1386 #define ACPI_GTDT_WATCHDOG_SECURE (1<<2) 1387 1388 /******************************************************************************* 1389 * 1390 * HEST - Hardware Error Source Table (ACPI 4.0) 1391 * Version 1 1392 * 1393 ******************************************************************************/ 1394 1395 struct acpi_table_hest { 1396 struct acpi_table_header header; /* Common ACPI table header */ 1397 u32 error_source_count; 1398 }; 1399 1400 /* HEST subtable header */ 1401 1402 struct acpi_hest_header { 1403 u16 type; 1404 u16 source_id; 1405 }; 1406 1407 /* Values for Type field above for subtables */ 1408 1409 enum acpi_hest_types { 1410 ACPI_HEST_TYPE_IA32_CHECK = 0, 1411 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1, 1412 ACPI_HEST_TYPE_IA32_NMI = 2, 1413 ACPI_HEST_TYPE_NOT_USED3 = 3, 1414 ACPI_HEST_TYPE_NOT_USED4 = 4, 1415 ACPI_HEST_TYPE_NOT_USED5 = 5, 1416 ACPI_HEST_TYPE_AER_ROOT_PORT = 6, 1417 ACPI_HEST_TYPE_AER_ENDPOINT = 7, 1418 ACPI_HEST_TYPE_AER_BRIDGE = 8, 1419 ACPI_HEST_TYPE_GENERIC_ERROR = 9, 1420 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10, 1421 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11, 1422 ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */ 1423 }; 1424 1425 /* 1426 * HEST substructures contained in subtables 1427 */ 1428 1429 /* 1430 * IA32 Error Bank(s) - Follows the struct acpi_hest_ia_machine_check and 1431 * struct acpi_hest_ia_corrected structures. 1432 */ 1433 struct acpi_hest_ia_error_bank { 1434 u8 bank_number; 1435 u8 clear_status_on_init; 1436 u8 status_format; 1437 u8 reserved; 1438 u32 control_register; 1439 u64 control_data; 1440 u32 status_register; 1441 u32 address_register; 1442 u32 misc_register; 1443 }; 1444 1445 /* Common HEST sub-structure for PCI/AER structures below (6,7,8) */ 1446 1447 struct acpi_hest_aer_common { 1448 u16 reserved1; 1449 u8 flags; 1450 u8 enabled; 1451 u32 records_to_preallocate; 1452 u32 max_sections_per_record; 1453 u32 bus; /* Bus and Segment numbers */ 1454 u16 device; 1455 u16 function; 1456 u16 device_control; 1457 u16 reserved2; 1458 u32 uncorrectable_mask; 1459 u32 uncorrectable_severity; 1460 u32 correctable_mask; 1461 u32 advanced_capabilities; 1462 }; 1463 1464 /* Masks for HEST Flags fields */ 1465 1466 #define ACPI_HEST_FIRMWARE_FIRST (1) 1467 #define ACPI_HEST_GLOBAL (1<<1) 1468 #define ACPI_HEST_GHES_ASSIST (1<<2) 1469 1470 /* 1471 * Macros to access the bus/segment numbers in Bus field above: 1472 * Bus number is encoded in bits 7:0 1473 * Segment number is encoded in bits 23:8 1474 */ 1475 #define ACPI_HEST_BUS(bus) ((bus) & 0xFF) 1476 #define ACPI_HEST_SEGMENT(bus) (((bus) >> 8) & 0xFFFF) 1477 1478 /* Hardware Error Notification */ 1479 1480 struct acpi_hest_notify { 1481 u8 type; 1482 u8 length; 1483 u16 config_write_enable; 1484 u32 poll_interval; 1485 u32 vector; 1486 u32 polling_threshold_value; 1487 u32 polling_threshold_window; 1488 u32 error_threshold_value; 1489 u32 error_threshold_window; 1490 }; 1491 1492 /* Values for Notify Type field above */ 1493 1494 enum acpi_hest_notify_types { 1495 ACPI_HEST_NOTIFY_POLLED = 0, 1496 ACPI_HEST_NOTIFY_EXTERNAL = 1, 1497 ACPI_HEST_NOTIFY_LOCAL = 2, 1498 ACPI_HEST_NOTIFY_SCI = 3, 1499 ACPI_HEST_NOTIFY_NMI = 4, 1500 ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */ 1501 ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */ 1502 ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */ 1503 ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */ 1504 ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */ 1505 ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */ 1506 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */ 1507 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */ 1508 }; 1509 1510 /* Values for config_write_enable bitfield above */ 1511 1512 #define ACPI_HEST_TYPE (1) 1513 #define ACPI_HEST_POLL_INTERVAL (1<<1) 1514 #define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2) 1515 #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3) 1516 #define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4) 1517 #define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5) 1518 1519 /* 1520 * HEST subtables 1521 */ 1522 1523 /* 0: IA32 Machine Check Exception */ 1524 1525 struct acpi_hest_ia_machine_check { 1526 struct acpi_hest_header header; 1527 u16 reserved1; 1528 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1529 u8 enabled; 1530 u32 records_to_preallocate; 1531 u32 max_sections_per_record; 1532 u64 global_capability_data; 1533 u64 global_control_data; 1534 u8 num_hardware_banks; 1535 u8 reserved3[7]; 1536 }; 1537 1538 /* 1: IA32 Corrected Machine Check */ 1539 1540 struct acpi_hest_ia_corrected { 1541 struct acpi_hest_header header; 1542 u16 reserved1; 1543 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1544 u8 enabled; 1545 u32 records_to_preallocate; 1546 u32 max_sections_per_record; 1547 struct acpi_hest_notify notify; 1548 u8 num_hardware_banks; 1549 u8 reserved2[3]; 1550 }; 1551 1552 /* 2: IA32 Non-Maskable Interrupt */ 1553 1554 struct acpi_hest_ia_nmi { 1555 struct acpi_hest_header header; 1556 u32 reserved; 1557 u32 records_to_preallocate; 1558 u32 max_sections_per_record; 1559 u32 max_raw_data_length; 1560 }; 1561 1562 /* 3,4,5: Not used */ 1563 1564 /* 6: PCI Express Root Port AER */ 1565 1566 struct acpi_hest_aer_root { 1567 struct acpi_hest_header header; 1568 struct acpi_hest_aer_common aer; 1569 u32 root_error_command; 1570 }; 1571 1572 /* 7: PCI Express AER (AER Endpoint) */ 1573 1574 struct acpi_hest_aer { 1575 struct acpi_hest_header header; 1576 struct acpi_hest_aer_common aer; 1577 }; 1578 1579 /* 8: PCI Express/PCI-X Bridge AER */ 1580 1581 struct acpi_hest_aer_bridge { 1582 struct acpi_hest_header header; 1583 struct acpi_hest_aer_common aer; 1584 u32 uncorrectable_mask2; 1585 u32 uncorrectable_severity2; 1586 u32 advanced_capabilities2; 1587 }; 1588 1589 /* 9: Generic Hardware Error Source */ 1590 1591 struct acpi_hest_generic { 1592 struct acpi_hest_header header; 1593 u16 related_source_id; 1594 u8 reserved; 1595 u8 enabled; 1596 u32 records_to_preallocate; 1597 u32 max_sections_per_record; 1598 u32 max_raw_data_length; 1599 struct acpi_generic_address error_status_address; 1600 struct acpi_hest_notify notify; 1601 u32 error_block_length; 1602 }; 1603 1604 /* 10: Generic Hardware Error Source, version 2 */ 1605 1606 struct acpi_hest_generic_v2 { 1607 struct acpi_hest_header header; 1608 u16 related_source_id; 1609 u8 reserved; 1610 u8 enabled; 1611 u32 records_to_preallocate; 1612 u32 max_sections_per_record; 1613 u32 max_raw_data_length; 1614 struct acpi_generic_address error_status_address; 1615 struct acpi_hest_notify notify; 1616 u32 error_block_length; 1617 struct acpi_generic_address read_ack_register; 1618 u64 read_ack_preserve; 1619 u64 read_ack_write; 1620 }; 1621 1622 /* Generic Error Status block */ 1623 1624 struct acpi_hest_generic_status { 1625 u32 block_status; 1626 u32 raw_data_offset; 1627 u32 raw_data_length; 1628 u32 data_length; 1629 u32 error_severity; 1630 }; 1631 1632 /* Values for block_status flags above */ 1633 1634 #define ACPI_HEST_UNCORRECTABLE (1) 1635 #define ACPI_HEST_CORRECTABLE (1<<1) 1636 #define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2) 1637 #define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3) 1638 #define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 1639 1640 /* Generic Error Data entry */ 1641 1642 struct acpi_hest_generic_data { 1643 u8 section_type[16]; 1644 u32 error_severity; 1645 u16 revision; 1646 u8 validation_bits; 1647 u8 flags; 1648 u32 error_data_length; 1649 u8 fru_id[16]; 1650 u8 fru_text[20]; 1651 }; 1652 1653 /* Extension for revision 0x0300 */ 1654 1655 struct acpi_hest_generic_data_v300 { 1656 u8 section_type[16]; 1657 u32 error_severity; 1658 u16 revision; 1659 u8 validation_bits; 1660 u8 flags; 1661 u32 error_data_length; 1662 u8 fru_id[16]; 1663 u8 fru_text[20]; 1664 u64 time_stamp; 1665 }; 1666 1667 /* Values for error_severity above */ 1668 1669 #define ACPI_HEST_GEN_ERROR_RECOVERABLE 0 1670 #define ACPI_HEST_GEN_ERROR_FATAL 1 1671 #define ACPI_HEST_GEN_ERROR_CORRECTED 2 1672 #define ACPI_HEST_GEN_ERROR_NONE 3 1673 1674 /* Flags for validation_bits above */ 1675 1676 #define ACPI_HEST_GEN_VALID_FRU_ID (1) 1677 #define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1) 1678 #define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2) 1679 1680 /* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */ 1681 1682 struct acpi_hest_ia_deferred_check { 1683 struct acpi_hest_header header; 1684 u16 reserved1; 1685 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1686 u8 enabled; 1687 u32 records_to_preallocate; 1688 u32 max_sections_per_record; 1689 struct acpi_hest_notify notify; 1690 u8 num_hardware_banks; 1691 u8 reserved2[3]; 1692 }; 1693 1694 /******************************************************************************* 1695 * 1696 * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.2) 1697 * Version 1 1698 * 1699 ******************************************************************************/ 1700 1701 struct acpi_table_hmat { 1702 struct acpi_table_header header; /* Common ACPI table header */ 1703 u32 reserved; 1704 }; 1705 1706 /* Values for HMAT structure types */ 1707 1708 enum acpi_hmat_type { 1709 ACPI_HMAT_TYPE_PROXIMITY = 0, /* Memory proximity domain attributes */ 1710 ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */ 1711 ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */ 1712 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */ 1713 }; 1714 1715 struct acpi_hmat_structure { 1716 u16 type; 1717 u16 reserved; 1718 u32 length; 1719 }; 1720 1721 /* 1722 * HMAT Structures, correspond to Type in struct acpi_hmat_structure 1723 */ 1724 1725 /* 0: Memory proximity domain attributes */ 1726 1727 struct acpi_hmat_proximity_domain { 1728 struct acpi_hmat_structure header; 1729 u16 flags; 1730 u16 reserved1; 1731 u32 processor_PD; /* Processor proximity domain */ 1732 u32 memory_PD; /* Memory proximity domain */ 1733 u32 reserved2; 1734 u64 reserved3; 1735 u64 reserved4; 1736 }; 1737 1738 /* Masks for Flags field above */ 1739 1740 #define ACPI_HMAT_PROCESSOR_PD_VALID (1) /* 1: processor_PD field is valid */ 1741 #define ACPI_HMAT_MEMORY_PD_VALID (1<<1) /* 1: memory_PD field is valid */ 1742 #define ACPI_HMAT_RESERVATION_HINT (1<<2) /* 1: Reservation hint */ 1743 1744 /* 1: System locality latency and bandwidth information */ 1745 1746 struct acpi_hmat_locality { 1747 struct acpi_hmat_structure header; 1748 u8 flags; 1749 u8 data_type; 1750 u8 min_transfer_size; 1751 u8 reserved1; 1752 u32 number_of_initiator_Pds; 1753 u32 number_of_target_Pds; 1754 u32 reserved2; 1755 u64 entry_base_unit; 1756 }; 1757 1758 /* Masks for Flags field above */ 1759 1760 #define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) /* Bits 0-3 */ 1761 1762 /* Values for Memory Hierarchy flags */ 1763 1764 #define ACPI_HMAT_MEMORY 0 1765 #define ACPI_HMAT_LAST_LEVEL_CACHE 1 1766 #define ACPI_HMAT_1ST_LEVEL_CACHE 2 1767 #define ACPI_HMAT_2ND_LEVEL_CACHE 3 1768 #define ACPI_HMAT_3RD_LEVEL_CACHE 4 1769 #define ACPI_HMAT_MINIMUM_XFER_SIZE 0x10 /* Bit 4: ACPI 6.4 */ 1770 #define ACPI_HMAT_NON_SEQUENTIAL_XFERS 0x20 /* Bit 5: ACPI 6.4 */ 1771 1772 1773 /* Values for data_type field above */ 1774 1775 #define ACPI_HMAT_ACCESS_LATENCY 0 1776 #define ACPI_HMAT_READ_LATENCY 1 1777 #define ACPI_HMAT_WRITE_LATENCY 2 1778 #define ACPI_HMAT_ACCESS_BANDWIDTH 3 1779 #define ACPI_HMAT_READ_BANDWIDTH 4 1780 #define ACPI_HMAT_WRITE_BANDWIDTH 5 1781 1782 /* 2: Memory side cache information */ 1783 1784 struct acpi_hmat_cache { 1785 struct acpi_hmat_structure header; 1786 u32 memory_PD; 1787 u32 reserved1; 1788 u64 cache_size; 1789 u32 cache_attributes; 1790 u16 reserved2; 1791 u16 number_of_SMBIOShandles; 1792 }; 1793 1794 /* Masks for cache_attributes field above */ 1795 1796 #define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F) 1797 #define ACPI_HMAT_CACHE_LEVEL (0x000000F0) 1798 #define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00) 1799 #define ACPI_HMAT_WRITE_POLICY (0x0000F000) 1800 #define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000) 1801 1802 /* Values for cache associativity flag */ 1803 1804 #define ACPI_HMAT_CA_NONE (0) 1805 #define ACPI_HMAT_CA_DIRECT_MAPPED (1) 1806 #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2) 1807 1808 /* Values for write policy flag */ 1809 1810 #define ACPI_HMAT_CP_NONE (0) 1811 #define ACPI_HMAT_CP_WB (1) 1812 #define ACPI_HMAT_CP_WT (2) 1813 1814 /******************************************************************************* 1815 * 1816 * HPET - High Precision Event Timer table 1817 * Version 1 1818 * 1819 * Conforms to "IA-PC HPET (High Precision Event Timers) Specification", 1820 * Version 1.0a, October 2004 1821 * 1822 ******************************************************************************/ 1823 1824 struct acpi_table_hpet { 1825 struct acpi_table_header header; /* Common ACPI table header */ 1826 u32 id; /* Hardware ID of event timer block */ 1827 struct acpi_generic_address address; /* Address of event timer block */ 1828 u8 sequence; /* HPET sequence number */ 1829 u16 minimum_tick; /* Main counter min tick, periodic mode */ 1830 u8 flags; 1831 }; 1832 1833 /* Masks for Flags field above */ 1834 1835 #define ACPI_HPET_PAGE_PROTECT_MASK (3) 1836 1837 /* Values for Page Protect flags */ 1838 1839 enum acpi_hpet_page_protect { 1840 ACPI_HPET_NO_PAGE_PROTECT = 0, 1841 ACPI_HPET_PAGE_PROTECT4 = 1, 1842 ACPI_HPET_PAGE_PROTECT64 = 2 1843 }; 1844 1845 /******************************************************************************* 1846 * 1847 * IBFT - Boot Firmware Table 1848 * Version 1 1849 * 1850 * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b 1851 * Specification", Version 1.01, March 1, 2007 1852 * 1853 * Note: It appears that this table is not intended to appear in the RSDT/XSDT. 1854 * Therefore, it is not currently supported by the disassembler. 1855 * 1856 ******************************************************************************/ 1857 1858 struct acpi_table_ibft { 1859 struct acpi_table_header header; /* Common ACPI table header */ 1860 u8 reserved[12]; 1861 }; 1862 1863 /* IBFT common subtable header */ 1864 1865 struct acpi_ibft_header { 1866 u8 type; 1867 u8 version; 1868 u16 length; 1869 u8 index; 1870 u8 flags; 1871 }; 1872 1873 /* Values for Type field above */ 1874 1875 enum acpi_ibft_type { 1876 ACPI_IBFT_TYPE_NOT_USED = 0, 1877 ACPI_IBFT_TYPE_CONTROL = 1, 1878 ACPI_IBFT_TYPE_INITIATOR = 2, 1879 ACPI_IBFT_TYPE_NIC = 3, 1880 ACPI_IBFT_TYPE_TARGET = 4, 1881 ACPI_IBFT_TYPE_EXTENSIONS = 5, 1882 ACPI_IBFT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1883 }; 1884 1885 /* IBFT subtables */ 1886 1887 struct acpi_ibft_control { 1888 struct acpi_ibft_header header; 1889 u16 extensions; 1890 u16 initiator_offset; 1891 u16 nic0_offset; 1892 u16 target0_offset; 1893 u16 nic1_offset; 1894 u16 target1_offset; 1895 }; 1896 1897 struct acpi_ibft_initiator { 1898 struct acpi_ibft_header header; 1899 u8 sns_server[16]; 1900 u8 slp_server[16]; 1901 u8 primary_server[16]; 1902 u8 secondary_server[16]; 1903 u16 name_length; 1904 u16 name_offset; 1905 }; 1906 1907 struct acpi_ibft_nic { 1908 struct acpi_ibft_header header; 1909 u8 ip_address[16]; 1910 u8 subnet_mask_prefix; 1911 u8 origin; 1912 u8 gateway[16]; 1913 u8 primary_dns[16]; 1914 u8 secondary_dns[16]; 1915 u8 dhcp[16]; 1916 u16 vlan; 1917 u8 mac_address[6]; 1918 u16 pci_address; 1919 u16 name_length; 1920 u16 name_offset; 1921 }; 1922 1923 struct acpi_ibft_target { 1924 struct acpi_ibft_header header; 1925 u8 target_ip_address[16]; 1926 u16 target_ip_socket; 1927 u8 target_boot_lun[8]; 1928 u8 chap_type; 1929 u8 nic_association; 1930 u16 target_name_length; 1931 u16 target_name_offset; 1932 u16 chap_name_length; 1933 u16 chap_name_offset; 1934 u16 chap_secret_length; 1935 u16 chap_secret_offset; 1936 u16 reverse_chap_name_length; 1937 u16 reverse_chap_name_offset; 1938 u16 reverse_chap_secret_length; 1939 u16 reverse_chap_secret_offset; 1940 }; 1941 1942 /* Reset to default packing */ 1943 1944 #pragma pack() 1945 1946 #endif /* __ACTBL1_H__ */ 1947