1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Xen event channels 4 * 5 * Xen models interrupts with abstract event channels. Because each 6 * domain gets 1024 event channels, but NR_IRQ is not that large, we 7 * must dynamically map irqs<->event channels. The event channels 8 * interface with the rest of the kernel by defining a xen interrupt 9 * chip. When an event is received, it is mapped to an irq and sent 10 * through the normal interrupt processing path. 11 * 12 * There are four kinds of events which can be mapped to an event 13 * channel: 14 * 15 * 1. Inter-domain notifications. This includes all the virtual 16 * device events, since they're driven by front-ends in another domain 17 * (typically dom0). 18 * 2. VIRQs, typically used for timers. These are per-cpu events. 19 * 3. IPIs. 20 * 4. PIRQs - Hardware interrupts. 21 * 22 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 23 */ 24 25 #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt 26 27 #include <linux/linkage.h> 28 #include <linux/interrupt.h> 29 #include <linux/irq.h> 30 #include <linux/moduleparam.h> 31 #include <linux/string.h> 32 #include <linux/memblock.h> 33 #include <linux/slab.h> 34 #include <linux/irqnr.h> 35 #include <linux/pci.h> 36 #include <linux/spinlock.h> 37 #include <linux/cpuhotplug.h> 38 #include <linux/atomic.h> 39 #include <linux/ktime.h> 40 41 #ifdef CONFIG_X86 42 #include <asm/desc.h> 43 #include <asm/ptrace.h> 44 #include <asm/idtentry.h> 45 #include <asm/irq.h> 46 #include <asm/io_apic.h> 47 #include <asm/i8259.h> 48 #include <asm/xen/pci.h> 49 #endif 50 #include <asm/sync_bitops.h> 51 #include <asm/xen/hypercall.h> 52 #include <asm/xen/hypervisor.h> 53 #include <xen/page.h> 54 55 #include <xen/xen.h> 56 #include <xen/hvm.h> 57 #include <xen/xen-ops.h> 58 #include <xen/events.h> 59 #include <xen/interface/xen.h> 60 #include <xen/interface/event_channel.h> 61 #include <xen/interface/hvm/hvm_op.h> 62 #include <xen/interface/hvm/params.h> 63 #include <xen/interface/physdev.h> 64 #include <xen/interface/sched.h> 65 #include <xen/interface/vcpu.h> 66 #include <xen/xenbus.h> 67 #include <asm/hw_irq.h> 68 69 #include "events_internal.h" 70 71 #undef MODULE_PARAM_PREFIX 72 #define MODULE_PARAM_PREFIX "xen." 73 74 /* Interrupt types. */ 75 enum xen_irq_type { 76 IRQT_UNBOUND = 0, 77 IRQT_PIRQ, 78 IRQT_VIRQ, 79 IRQT_IPI, 80 IRQT_EVTCHN 81 }; 82 83 /* 84 * Packed IRQ information: 85 * type - enum xen_irq_type 86 * event channel - irq->event channel mapping 87 * cpu - cpu this event channel is bound to 88 * index - type-specific information: 89 * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM 90 * guest, or GSI (real passthrough IRQ) of the device. 91 * VIRQ - virq number 92 * IPI - IPI vector 93 * EVTCHN - 94 */ 95 struct irq_info { 96 struct list_head list; 97 struct list_head eoi_list; 98 short refcnt; 99 u8 spurious_cnt; 100 u8 is_accounted; 101 enum xen_irq_type type; /* type */ 102 unsigned irq; 103 evtchn_port_t evtchn; /* event channel */ 104 unsigned short cpu; /* cpu bound */ 105 unsigned short eoi_cpu; /* EOI must happen on this cpu-1 */ 106 unsigned int irq_epoch; /* If eoi_cpu valid: irq_epoch of event */ 107 u64 eoi_time; /* Time in jiffies when to EOI. */ 108 109 union { 110 unsigned short virq; 111 enum ipi_vector ipi; 112 struct { 113 unsigned short pirq; 114 unsigned short gsi; 115 unsigned char vector; 116 unsigned char flags; 117 uint16_t domid; 118 } pirq; 119 struct xenbus_device *interdomain; 120 } u; 121 }; 122 123 #define PIRQ_NEEDS_EOI (1 << 0) 124 #define PIRQ_SHAREABLE (1 << 1) 125 #define PIRQ_MSI_GROUP (1 << 2) 126 127 static uint __read_mostly event_loop_timeout = 2; 128 module_param(event_loop_timeout, uint, 0644); 129 130 static uint __read_mostly event_eoi_delay = 10; 131 module_param(event_eoi_delay, uint, 0644); 132 133 const struct evtchn_ops *evtchn_ops; 134 135 /* 136 * This lock protects updates to the following mapping and reference-count 137 * arrays. The lock does not need to be acquired to read the mapping tables. 138 */ 139 static DEFINE_MUTEX(irq_mapping_update_lock); 140 141 /* 142 * Lock protecting event handling loop against removing event channels. 143 * Adding of event channels is no issue as the associated IRQ becomes active 144 * only after everything is setup (before request_[threaded_]irq() the handler 145 * can't be entered for an event, as the event channel will be unmasked only 146 * then). 147 */ 148 static DEFINE_RWLOCK(evtchn_rwlock); 149 150 /* 151 * Lock hierarchy: 152 * 153 * irq_mapping_update_lock 154 * evtchn_rwlock 155 * IRQ-desc lock 156 * percpu eoi_list_lock 157 */ 158 159 static LIST_HEAD(xen_irq_list_head); 160 161 /* IRQ <-> VIRQ mapping. */ 162 static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1}; 163 164 /* IRQ <-> IPI mapping */ 165 static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1}; 166 167 /* Event channel distribution data */ 168 static atomic_t channels_on_cpu[NR_CPUS]; 169 170 static int **evtchn_to_irq; 171 #ifdef CONFIG_X86 172 static unsigned long *pirq_eoi_map; 173 #endif 174 static bool (*pirq_needs_eoi)(unsigned irq); 175 176 #define EVTCHN_ROW(e) (e / (PAGE_SIZE/sizeof(**evtchn_to_irq))) 177 #define EVTCHN_COL(e) (e % (PAGE_SIZE/sizeof(**evtchn_to_irq))) 178 #define EVTCHN_PER_ROW (PAGE_SIZE / sizeof(**evtchn_to_irq)) 179 180 /* Xen will never allocate port zero for any purpose. */ 181 #define VALID_EVTCHN(chn) ((chn) != 0) 182 183 static struct irq_info *legacy_info_ptrs[NR_IRQS_LEGACY]; 184 185 static struct irq_chip xen_dynamic_chip; 186 static struct irq_chip xen_lateeoi_chip; 187 static struct irq_chip xen_percpu_chip; 188 static struct irq_chip xen_pirq_chip; 189 static void enable_dynirq(struct irq_data *data); 190 static void disable_dynirq(struct irq_data *data); 191 192 static DEFINE_PER_CPU(unsigned int, irq_epoch); 193 194 static void clear_evtchn_to_irq_row(unsigned row) 195 { 196 unsigned col; 197 198 for (col = 0; col < EVTCHN_PER_ROW; col++) 199 WRITE_ONCE(evtchn_to_irq[row][col], -1); 200 } 201 202 static void clear_evtchn_to_irq_all(void) 203 { 204 unsigned row; 205 206 for (row = 0; row < EVTCHN_ROW(xen_evtchn_max_channels()); row++) { 207 if (evtchn_to_irq[row] == NULL) 208 continue; 209 clear_evtchn_to_irq_row(row); 210 } 211 } 212 213 static int set_evtchn_to_irq(evtchn_port_t evtchn, unsigned int irq) 214 { 215 unsigned row; 216 unsigned col; 217 218 if (evtchn >= xen_evtchn_max_channels()) 219 return -EINVAL; 220 221 row = EVTCHN_ROW(evtchn); 222 col = EVTCHN_COL(evtchn); 223 224 if (evtchn_to_irq[row] == NULL) { 225 /* Unallocated irq entries return -1 anyway */ 226 if (irq == -1) 227 return 0; 228 229 evtchn_to_irq[row] = (int *)get_zeroed_page(GFP_KERNEL); 230 if (evtchn_to_irq[row] == NULL) 231 return -ENOMEM; 232 233 clear_evtchn_to_irq_row(row); 234 } 235 236 WRITE_ONCE(evtchn_to_irq[row][col], irq); 237 return 0; 238 } 239 240 int get_evtchn_to_irq(evtchn_port_t evtchn) 241 { 242 if (evtchn >= xen_evtchn_max_channels()) 243 return -1; 244 if (evtchn_to_irq[EVTCHN_ROW(evtchn)] == NULL) 245 return -1; 246 return READ_ONCE(evtchn_to_irq[EVTCHN_ROW(evtchn)][EVTCHN_COL(evtchn)]); 247 } 248 249 /* Get info for IRQ */ 250 static struct irq_info *info_for_irq(unsigned irq) 251 { 252 if (irq < nr_legacy_irqs()) 253 return legacy_info_ptrs[irq]; 254 else 255 return irq_get_chip_data(irq); 256 } 257 258 static void set_info_for_irq(unsigned int irq, struct irq_info *info) 259 { 260 if (irq < nr_legacy_irqs()) 261 legacy_info_ptrs[irq] = info; 262 else 263 irq_set_chip_data(irq, info); 264 } 265 266 /* Per CPU channel accounting */ 267 static void channels_on_cpu_dec(struct irq_info *info) 268 { 269 if (!info->is_accounted) 270 return; 271 272 info->is_accounted = 0; 273 274 if (WARN_ON_ONCE(info->cpu >= nr_cpu_ids)) 275 return; 276 277 WARN_ON_ONCE(!atomic_add_unless(&channels_on_cpu[info->cpu], -1 , 0)); 278 } 279 280 static void channels_on_cpu_inc(struct irq_info *info) 281 { 282 if (WARN_ON_ONCE(info->cpu >= nr_cpu_ids)) 283 return; 284 285 if (WARN_ON_ONCE(!atomic_add_unless(&channels_on_cpu[info->cpu], 1, 286 INT_MAX))) 287 return; 288 289 info->is_accounted = 1; 290 } 291 292 /* Constructors for packed IRQ information. */ 293 static int xen_irq_info_common_setup(struct irq_info *info, 294 unsigned irq, 295 enum xen_irq_type type, 296 evtchn_port_t evtchn, 297 unsigned short cpu) 298 { 299 int ret; 300 301 BUG_ON(info->type != IRQT_UNBOUND && info->type != type); 302 303 info->type = type; 304 info->irq = irq; 305 info->evtchn = evtchn; 306 info->cpu = cpu; 307 308 ret = set_evtchn_to_irq(evtchn, irq); 309 if (ret < 0) 310 return ret; 311 312 irq_clear_status_flags(irq, IRQ_NOREQUEST|IRQ_NOAUTOEN); 313 314 return xen_evtchn_port_setup(evtchn); 315 } 316 317 static int xen_irq_info_evtchn_setup(unsigned irq, 318 evtchn_port_t evtchn, 319 struct xenbus_device *dev) 320 { 321 struct irq_info *info = info_for_irq(irq); 322 int ret; 323 324 ret = xen_irq_info_common_setup(info, irq, IRQT_EVTCHN, evtchn, 0); 325 info->u.interdomain = dev; 326 327 return ret; 328 } 329 330 static int xen_irq_info_ipi_setup(unsigned cpu, 331 unsigned irq, 332 evtchn_port_t evtchn, 333 enum ipi_vector ipi) 334 { 335 struct irq_info *info = info_for_irq(irq); 336 337 info->u.ipi = ipi; 338 339 per_cpu(ipi_to_irq, cpu)[ipi] = irq; 340 341 return xen_irq_info_common_setup(info, irq, IRQT_IPI, evtchn, 0); 342 } 343 344 static int xen_irq_info_virq_setup(unsigned cpu, 345 unsigned irq, 346 evtchn_port_t evtchn, 347 unsigned virq) 348 { 349 struct irq_info *info = info_for_irq(irq); 350 351 info->u.virq = virq; 352 353 per_cpu(virq_to_irq, cpu)[virq] = irq; 354 355 return xen_irq_info_common_setup(info, irq, IRQT_VIRQ, evtchn, 0); 356 } 357 358 static int xen_irq_info_pirq_setup(unsigned irq, 359 evtchn_port_t evtchn, 360 unsigned pirq, 361 unsigned gsi, 362 uint16_t domid, 363 unsigned char flags) 364 { 365 struct irq_info *info = info_for_irq(irq); 366 367 info->u.pirq.pirq = pirq; 368 info->u.pirq.gsi = gsi; 369 info->u.pirq.domid = domid; 370 info->u.pirq.flags = flags; 371 372 return xen_irq_info_common_setup(info, irq, IRQT_PIRQ, evtchn, 0); 373 } 374 375 static void xen_irq_info_cleanup(struct irq_info *info) 376 { 377 set_evtchn_to_irq(info->evtchn, -1); 378 info->evtchn = 0; 379 channels_on_cpu_dec(info); 380 } 381 382 /* 383 * Accessors for packed IRQ information. 384 */ 385 evtchn_port_t evtchn_from_irq(unsigned irq) 386 { 387 const struct irq_info *info = NULL; 388 389 if (likely(irq < nr_irqs)) 390 info = info_for_irq(irq); 391 if (!info) 392 return 0; 393 394 return info->evtchn; 395 } 396 397 unsigned int irq_from_evtchn(evtchn_port_t evtchn) 398 { 399 return get_evtchn_to_irq(evtchn); 400 } 401 EXPORT_SYMBOL_GPL(irq_from_evtchn); 402 403 int irq_from_virq(unsigned int cpu, unsigned int virq) 404 { 405 return per_cpu(virq_to_irq, cpu)[virq]; 406 } 407 408 static enum ipi_vector ipi_from_irq(unsigned irq) 409 { 410 struct irq_info *info = info_for_irq(irq); 411 412 BUG_ON(info == NULL); 413 BUG_ON(info->type != IRQT_IPI); 414 415 return info->u.ipi; 416 } 417 418 static unsigned virq_from_irq(unsigned irq) 419 { 420 struct irq_info *info = info_for_irq(irq); 421 422 BUG_ON(info == NULL); 423 BUG_ON(info->type != IRQT_VIRQ); 424 425 return info->u.virq; 426 } 427 428 static unsigned pirq_from_irq(unsigned irq) 429 { 430 struct irq_info *info = info_for_irq(irq); 431 432 BUG_ON(info == NULL); 433 BUG_ON(info->type != IRQT_PIRQ); 434 435 return info->u.pirq.pirq; 436 } 437 438 static enum xen_irq_type type_from_irq(unsigned irq) 439 { 440 return info_for_irq(irq)->type; 441 } 442 443 static unsigned cpu_from_irq(unsigned irq) 444 { 445 return info_for_irq(irq)->cpu; 446 } 447 448 unsigned int cpu_from_evtchn(evtchn_port_t evtchn) 449 { 450 int irq = get_evtchn_to_irq(evtchn); 451 unsigned ret = 0; 452 453 if (irq != -1) 454 ret = cpu_from_irq(irq); 455 456 return ret; 457 } 458 459 #ifdef CONFIG_X86 460 static bool pirq_check_eoi_map(unsigned irq) 461 { 462 return test_bit(pirq_from_irq(irq), pirq_eoi_map); 463 } 464 #endif 465 466 static bool pirq_needs_eoi_flag(unsigned irq) 467 { 468 struct irq_info *info = info_for_irq(irq); 469 BUG_ON(info->type != IRQT_PIRQ); 470 471 return info->u.pirq.flags & PIRQ_NEEDS_EOI; 472 } 473 474 static void bind_evtchn_to_cpu(evtchn_port_t evtchn, unsigned int cpu, 475 bool force_affinity) 476 { 477 int irq = get_evtchn_to_irq(evtchn); 478 struct irq_info *info = info_for_irq(irq); 479 480 BUG_ON(irq == -1); 481 482 if (IS_ENABLED(CONFIG_SMP) && force_affinity) { 483 cpumask_copy(irq_get_affinity_mask(irq), cpumask_of(cpu)); 484 cpumask_copy(irq_get_effective_affinity_mask(irq), 485 cpumask_of(cpu)); 486 } 487 488 xen_evtchn_port_bind_to_cpu(evtchn, cpu, info->cpu); 489 490 channels_on_cpu_dec(info); 491 info->cpu = cpu; 492 channels_on_cpu_inc(info); 493 } 494 495 /** 496 * notify_remote_via_irq - send event to remote end of event channel via irq 497 * @irq: irq of event channel to send event to 498 * 499 * Unlike notify_remote_via_evtchn(), this is safe to use across 500 * save/restore. Notifications on a broken connection are silently 501 * dropped. 502 */ 503 void notify_remote_via_irq(int irq) 504 { 505 evtchn_port_t evtchn = evtchn_from_irq(irq); 506 507 if (VALID_EVTCHN(evtchn)) 508 notify_remote_via_evtchn(evtchn); 509 } 510 EXPORT_SYMBOL_GPL(notify_remote_via_irq); 511 512 struct lateeoi_work { 513 struct delayed_work delayed; 514 spinlock_t eoi_list_lock; 515 struct list_head eoi_list; 516 }; 517 518 static DEFINE_PER_CPU(struct lateeoi_work, lateeoi); 519 520 static void lateeoi_list_del(struct irq_info *info) 521 { 522 struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu); 523 unsigned long flags; 524 525 spin_lock_irqsave(&eoi->eoi_list_lock, flags); 526 list_del_init(&info->eoi_list); 527 spin_unlock_irqrestore(&eoi->eoi_list_lock, flags); 528 } 529 530 static void lateeoi_list_add(struct irq_info *info) 531 { 532 struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu); 533 struct irq_info *elem; 534 u64 now = get_jiffies_64(); 535 unsigned long delay; 536 unsigned long flags; 537 538 if (now < info->eoi_time) 539 delay = info->eoi_time - now; 540 else 541 delay = 1; 542 543 spin_lock_irqsave(&eoi->eoi_list_lock, flags); 544 545 if (list_empty(&eoi->eoi_list)) { 546 list_add(&info->eoi_list, &eoi->eoi_list); 547 mod_delayed_work_on(info->eoi_cpu, system_wq, 548 &eoi->delayed, delay); 549 } else { 550 list_for_each_entry_reverse(elem, &eoi->eoi_list, eoi_list) { 551 if (elem->eoi_time <= info->eoi_time) 552 break; 553 } 554 list_add(&info->eoi_list, &elem->eoi_list); 555 } 556 557 spin_unlock_irqrestore(&eoi->eoi_list_lock, flags); 558 } 559 560 static void xen_irq_lateeoi_locked(struct irq_info *info, bool spurious) 561 { 562 evtchn_port_t evtchn; 563 unsigned int cpu; 564 unsigned int delay = 0; 565 566 evtchn = info->evtchn; 567 if (!VALID_EVTCHN(evtchn) || !list_empty(&info->eoi_list)) 568 return; 569 570 if (spurious) { 571 if ((1 << info->spurious_cnt) < (HZ << 2)) { 572 if (info->spurious_cnt != 0xFF) 573 info->spurious_cnt++; 574 } 575 if (info->spurious_cnt > 1) { 576 delay = 1 << (info->spurious_cnt - 2); 577 if (delay > HZ) 578 delay = HZ; 579 if (!info->eoi_time) 580 info->eoi_cpu = smp_processor_id(); 581 info->eoi_time = get_jiffies_64() + delay; 582 } 583 } else { 584 info->spurious_cnt = 0; 585 } 586 587 cpu = info->eoi_cpu; 588 if (info->eoi_time && 589 (info->irq_epoch == per_cpu(irq_epoch, cpu) || delay)) { 590 lateeoi_list_add(info); 591 return; 592 } 593 594 info->eoi_time = 0; 595 unmask_evtchn(evtchn); 596 } 597 598 static void xen_irq_lateeoi_worker(struct work_struct *work) 599 { 600 struct lateeoi_work *eoi; 601 struct irq_info *info; 602 u64 now = get_jiffies_64(); 603 unsigned long flags; 604 605 eoi = container_of(to_delayed_work(work), struct lateeoi_work, delayed); 606 607 read_lock_irqsave(&evtchn_rwlock, flags); 608 609 while (true) { 610 spin_lock(&eoi->eoi_list_lock); 611 612 info = list_first_entry_or_null(&eoi->eoi_list, struct irq_info, 613 eoi_list); 614 615 if (info == NULL || now < info->eoi_time) { 616 spin_unlock(&eoi->eoi_list_lock); 617 break; 618 } 619 620 list_del_init(&info->eoi_list); 621 622 spin_unlock(&eoi->eoi_list_lock); 623 624 info->eoi_time = 0; 625 626 xen_irq_lateeoi_locked(info, false); 627 } 628 629 if (info) 630 mod_delayed_work_on(info->eoi_cpu, system_wq, 631 &eoi->delayed, info->eoi_time - now); 632 633 read_unlock_irqrestore(&evtchn_rwlock, flags); 634 } 635 636 static void xen_cpu_init_eoi(unsigned int cpu) 637 { 638 struct lateeoi_work *eoi = &per_cpu(lateeoi, cpu); 639 640 INIT_DELAYED_WORK(&eoi->delayed, xen_irq_lateeoi_worker); 641 spin_lock_init(&eoi->eoi_list_lock); 642 INIT_LIST_HEAD(&eoi->eoi_list); 643 } 644 645 void xen_irq_lateeoi(unsigned int irq, unsigned int eoi_flags) 646 { 647 struct irq_info *info; 648 unsigned long flags; 649 650 read_lock_irqsave(&evtchn_rwlock, flags); 651 652 info = info_for_irq(irq); 653 654 if (info) 655 xen_irq_lateeoi_locked(info, eoi_flags & XEN_EOI_FLAG_SPURIOUS); 656 657 read_unlock_irqrestore(&evtchn_rwlock, flags); 658 } 659 EXPORT_SYMBOL_GPL(xen_irq_lateeoi); 660 661 static void xen_irq_init(unsigned irq) 662 { 663 struct irq_info *info; 664 665 info = kzalloc(sizeof(*info), GFP_KERNEL); 666 if (info == NULL) 667 panic("Unable to allocate metadata for IRQ%d\n", irq); 668 669 info->type = IRQT_UNBOUND; 670 info->refcnt = -1; 671 672 set_info_for_irq(irq, info); 673 /* 674 * Interrupt affinity setting can be immediate. No point 675 * in delaying it until an interrupt is handled. 676 */ 677 irq_set_status_flags(irq, IRQ_MOVE_PCNTXT); 678 679 INIT_LIST_HEAD(&info->eoi_list); 680 list_add_tail(&info->list, &xen_irq_list_head); 681 } 682 683 static int __must_check xen_allocate_irqs_dynamic(int nvec) 684 { 685 int i, irq = irq_alloc_descs(-1, 0, nvec, -1); 686 687 if (irq >= 0) { 688 for (i = 0; i < nvec; i++) 689 xen_irq_init(irq + i); 690 } 691 692 return irq; 693 } 694 695 static inline int __must_check xen_allocate_irq_dynamic(void) 696 { 697 698 return xen_allocate_irqs_dynamic(1); 699 } 700 701 static int __must_check xen_allocate_irq_gsi(unsigned gsi) 702 { 703 int irq; 704 705 /* 706 * A PV guest has no concept of a GSI (since it has no ACPI 707 * nor access to/knowledge of the physical APICs). Therefore 708 * all IRQs are dynamically allocated from the entire IRQ 709 * space. 710 */ 711 if (xen_pv_domain() && !xen_initial_domain()) 712 return xen_allocate_irq_dynamic(); 713 714 /* Legacy IRQ descriptors are already allocated by the arch. */ 715 if (gsi < nr_legacy_irqs()) 716 irq = gsi; 717 else 718 irq = irq_alloc_desc_at(gsi, -1); 719 720 xen_irq_init(irq); 721 722 return irq; 723 } 724 725 static void xen_free_irq(unsigned irq) 726 { 727 struct irq_info *info = info_for_irq(irq); 728 unsigned long flags; 729 730 if (WARN_ON(!info)) 731 return; 732 733 write_lock_irqsave(&evtchn_rwlock, flags); 734 735 if (!list_empty(&info->eoi_list)) 736 lateeoi_list_del(info); 737 738 list_del(&info->list); 739 740 set_info_for_irq(irq, NULL); 741 742 WARN_ON(info->refcnt > 0); 743 744 write_unlock_irqrestore(&evtchn_rwlock, flags); 745 746 kfree(info); 747 748 /* Legacy IRQ descriptors are managed by the arch. */ 749 if (irq < nr_legacy_irqs()) 750 return; 751 752 irq_free_desc(irq); 753 } 754 755 static void xen_evtchn_close(evtchn_port_t port) 756 { 757 struct evtchn_close close; 758 759 close.port = port; 760 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0) 761 BUG(); 762 } 763 764 static void pirq_query_unmask(int irq) 765 { 766 struct physdev_irq_status_query irq_status; 767 struct irq_info *info = info_for_irq(irq); 768 769 BUG_ON(info->type != IRQT_PIRQ); 770 771 irq_status.irq = pirq_from_irq(irq); 772 if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status)) 773 irq_status.flags = 0; 774 775 info->u.pirq.flags &= ~PIRQ_NEEDS_EOI; 776 if (irq_status.flags & XENIRQSTAT_needs_eoi) 777 info->u.pirq.flags |= PIRQ_NEEDS_EOI; 778 } 779 780 static void eoi_pirq(struct irq_data *data) 781 { 782 evtchn_port_t evtchn = evtchn_from_irq(data->irq); 783 struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) }; 784 int rc = 0; 785 786 if (!VALID_EVTCHN(evtchn)) 787 return; 788 789 clear_evtchn(evtchn); 790 791 if (pirq_needs_eoi(data->irq)) { 792 rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi); 793 WARN_ON(rc); 794 } 795 } 796 797 static void mask_ack_pirq(struct irq_data *data) 798 { 799 disable_dynirq(data); 800 eoi_pirq(data); 801 } 802 803 static unsigned int __startup_pirq(unsigned int irq) 804 { 805 struct evtchn_bind_pirq bind_pirq; 806 struct irq_info *info = info_for_irq(irq); 807 evtchn_port_t evtchn = evtchn_from_irq(irq); 808 int rc; 809 810 BUG_ON(info->type != IRQT_PIRQ); 811 812 if (VALID_EVTCHN(evtchn)) 813 goto out; 814 815 bind_pirq.pirq = pirq_from_irq(irq); 816 /* NB. We are happy to share unless we are probing. */ 817 bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ? 818 BIND_PIRQ__WILL_SHARE : 0; 819 rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq); 820 if (rc != 0) { 821 pr_warn("Failed to obtain physical IRQ %d\n", irq); 822 return 0; 823 } 824 evtchn = bind_pirq.port; 825 826 pirq_query_unmask(irq); 827 828 rc = set_evtchn_to_irq(evtchn, irq); 829 if (rc) 830 goto err; 831 832 info->evtchn = evtchn; 833 bind_evtchn_to_cpu(evtchn, 0, false); 834 835 rc = xen_evtchn_port_setup(evtchn); 836 if (rc) 837 goto err; 838 839 out: 840 unmask_evtchn(evtchn); 841 eoi_pirq(irq_get_irq_data(irq)); 842 843 return 0; 844 845 err: 846 pr_err("irq%d: Failed to set port to irq mapping (%d)\n", irq, rc); 847 xen_evtchn_close(evtchn); 848 return 0; 849 } 850 851 static unsigned int startup_pirq(struct irq_data *data) 852 { 853 return __startup_pirq(data->irq); 854 } 855 856 static void shutdown_pirq(struct irq_data *data) 857 { 858 unsigned int irq = data->irq; 859 struct irq_info *info = info_for_irq(irq); 860 evtchn_port_t evtchn = evtchn_from_irq(irq); 861 862 BUG_ON(info->type != IRQT_PIRQ); 863 864 if (!VALID_EVTCHN(evtchn)) 865 return; 866 867 mask_evtchn(evtchn); 868 xen_evtchn_close(evtchn); 869 xen_irq_info_cleanup(info); 870 } 871 872 static void enable_pirq(struct irq_data *data) 873 { 874 enable_dynirq(data); 875 } 876 877 static void disable_pirq(struct irq_data *data) 878 { 879 disable_dynirq(data); 880 } 881 882 int xen_irq_from_gsi(unsigned gsi) 883 { 884 struct irq_info *info; 885 886 list_for_each_entry(info, &xen_irq_list_head, list) { 887 if (info->type != IRQT_PIRQ) 888 continue; 889 890 if (info->u.pirq.gsi == gsi) 891 return info->irq; 892 } 893 894 return -1; 895 } 896 EXPORT_SYMBOL_GPL(xen_irq_from_gsi); 897 898 static void __unbind_from_irq(unsigned int irq) 899 { 900 evtchn_port_t evtchn = evtchn_from_irq(irq); 901 struct irq_info *info = info_for_irq(irq); 902 903 if (info->refcnt > 0) { 904 info->refcnt--; 905 if (info->refcnt != 0) 906 return; 907 } 908 909 if (VALID_EVTCHN(evtchn)) { 910 unsigned int cpu = cpu_from_irq(irq); 911 912 xen_evtchn_close(evtchn); 913 914 switch (type_from_irq(irq)) { 915 case IRQT_VIRQ: 916 per_cpu(virq_to_irq, cpu)[virq_from_irq(irq)] = -1; 917 break; 918 case IRQT_IPI: 919 per_cpu(ipi_to_irq, cpu)[ipi_from_irq(irq)] = -1; 920 break; 921 default: 922 break; 923 } 924 925 xen_irq_info_cleanup(info); 926 } 927 928 xen_free_irq(irq); 929 } 930 931 /* 932 * Do not make any assumptions regarding the relationship between the 933 * IRQ number returned here and the Xen pirq argument. 934 * 935 * Note: We don't assign an event channel until the irq actually started 936 * up. Return an existing irq if we've already got one for the gsi. 937 * 938 * Shareable implies level triggered, not shareable implies edge 939 * triggered here. 940 */ 941 int xen_bind_pirq_gsi_to_irq(unsigned gsi, 942 unsigned pirq, int shareable, char *name) 943 { 944 int irq = -1; 945 struct physdev_irq irq_op; 946 int ret; 947 948 mutex_lock(&irq_mapping_update_lock); 949 950 irq = xen_irq_from_gsi(gsi); 951 if (irq != -1) { 952 pr_info("%s: returning irq %d for gsi %u\n", 953 __func__, irq, gsi); 954 goto out; 955 } 956 957 irq = xen_allocate_irq_gsi(gsi); 958 if (irq < 0) 959 goto out; 960 961 irq_op.irq = irq; 962 irq_op.vector = 0; 963 964 /* Only the privileged domain can do this. For non-priv, the pcifront 965 * driver provides a PCI bus that does the call to do exactly 966 * this in the priv domain. */ 967 if (xen_initial_domain() && 968 HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) { 969 xen_free_irq(irq); 970 irq = -ENOSPC; 971 goto out; 972 } 973 974 ret = xen_irq_info_pirq_setup(irq, 0, pirq, gsi, DOMID_SELF, 975 shareable ? PIRQ_SHAREABLE : 0); 976 if (ret < 0) { 977 __unbind_from_irq(irq); 978 irq = ret; 979 goto out; 980 } 981 982 pirq_query_unmask(irq); 983 /* We try to use the handler with the appropriate semantic for the 984 * type of interrupt: if the interrupt is an edge triggered 985 * interrupt we use handle_edge_irq. 986 * 987 * On the other hand if the interrupt is level triggered we use 988 * handle_fasteoi_irq like the native code does for this kind of 989 * interrupts. 990 * 991 * Depending on the Xen version, pirq_needs_eoi might return true 992 * not only for level triggered interrupts but for edge triggered 993 * interrupts too. In any case Xen always honors the eoi mechanism, 994 * not injecting any more pirqs of the same kind if the first one 995 * hasn't received an eoi yet. Therefore using the fasteoi handler 996 * is the right choice either way. 997 */ 998 if (shareable) 999 irq_set_chip_and_handler_name(irq, &xen_pirq_chip, 1000 handle_fasteoi_irq, name); 1001 else 1002 irq_set_chip_and_handler_name(irq, &xen_pirq_chip, 1003 handle_edge_irq, name); 1004 1005 out: 1006 mutex_unlock(&irq_mapping_update_lock); 1007 1008 return irq; 1009 } 1010 1011 #ifdef CONFIG_PCI_MSI 1012 int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc) 1013 { 1014 int rc; 1015 struct physdev_get_free_pirq op_get_free_pirq; 1016 1017 op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI; 1018 rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq); 1019 1020 WARN_ONCE(rc == -ENOSYS, 1021 "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n"); 1022 1023 return rc ? -1 : op_get_free_pirq.pirq; 1024 } 1025 1026 int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc, 1027 int pirq, int nvec, const char *name, domid_t domid) 1028 { 1029 int i, irq, ret; 1030 1031 mutex_lock(&irq_mapping_update_lock); 1032 1033 irq = xen_allocate_irqs_dynamic(nvec); 1034 if (irq < 0) 1035 goto out; 1036 1037 for (i = 0; i < nvec; i++) { 1038 irq_set_chip_and_handler_name(irq + i, &xen_pirq_chip, handle_edge_irq, name); 1039 1040 ret = xen_irq_info_pirq_setup(irq + i, 0, pirq + i, 0, domid, 1041 i == 0 ? 0 : PIRQ_MSI_GROUP); 1042 if (ret < 0) 1043 goto error_irq; 1044 } 1045 1046 ret = irq_set_msi_desc(irq, msidesc); 1047 if (ret < 0) 1048 goto error_irq; 1049 out: 1050 mutex_unlock(&irq_mapping_update_lock); 1051 return irq; 1052 error_irq: 1053 while (nvec--) 1054 __unbind_from_irq(irq + nvec); 1055 mutex_unlock(&irq_mapping_update_lock); 1056 return ret; 1057 } 1058 #endif 1059 1060 int xen_destroy_irq(int irq) 1061 { 1062 struct physdev_unmap_pirq unmap_irq; 1063 struct irq_info *info = info_for_irq(irq); 1064 int rc = -ENOENT; 1065 1066 mutex_lock(&irq_mapping_update_lock); 1067 1068 /* 1069 * If trying to remove a vector in a MSI group different 1070 * than the first one skip the PIRQ unmap unless this vector 1071 * is the first one in the group. 1072 */ 1073 if (xen_initial_domain() && !(info->u.pirq.flags & PIRQ_MSI_GROUP)) { 1074 unmap_irq.pirq = info->u.pirq.pirq; 1075 unmap_irq.domid = info->u.pirq.domid; 1076 rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq); 1077 /* If another domain quits without making the pci_disable_msix 1078 * call, the Xen hypervisor takes care of freeing the PIRQs 1079 * (free_domain_pirqs). 1080 */ 1081 if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF)) 1082 pr_info("domain %d does not have %d anymore\n", 1083 info->u.pirq.domid, info->u.pirq.pirq); 1084 else if (rc) { 1085 pr_warn("unmap irq failed %d\n", rc); 1086 goto out; 1087 } 1088 } 1089 1090 xen_free_irq(irq); 1091 1092 out: 1093 mutex_unlock(&irq_mapping_update_lock); 1094 return rc; 1095 } 1096 1097 int xen_irq_from_pirq(unsigned pirq) 1098 { 1099 int irq; 1100 1101 struct irq_info *info; 1102 1103 mutex_lock(&irq_mapping_update_lock); 1104 1105 list_for_each_entry(info, &xen_irq_list_head, list) { 1106 if (info->type != IRQT_PIRQ) 1107 continue; 1108 irq = info->irq; 1109 if (info->u.pirq.pirq == pirq) 1110 goto out; 1111 } 1112 irq = -1; 1113 out: 1114 mutex_unlock(&irq_mapping_update_lock); 1115 1116 return irq; 1117 } 1118 1119 1120 int xen_pirq_from_irq(unsigned irq) 1121 { 1122 return pirq_from_irq(irq); 1123 } 1124 EXPORT_SYMBOL_GPL(xen_pirq_from_irq); 1125 1126 static int bind_evtchn_to_irq_chip(evtchn_port_t evtchn, struct irq_chip *chip, 1127 struct xenbus_device *dev) 1128 { 1129 int irq; 1130 int ret; 1131 1132 if (evtchn >= xen_evtchn_max_channels()) 1133 return -ENOMEM; 1134 1135 mutex_lock(&irq_mapping_update_lock); 1136 1137 irq = get_evtchn_to_irq(evtchn); 1138 1139 if (irq == -1) { 1140 irq = xen_allocate_irq_dynamic(); 1141 if (irq < 0) 1142 goto out; 1143 1144 irq_set_chip_and_handler_name(irq, chip, 1145 handle_edge_irq, "event"); 1146 1147 ret = xen_irq_info_evtchn_setup(irq, evtchn, dev); 1148 if (ret < 0) { 1149 __unbind_from_irq(irq); 1150 irq = ret; 1151 goto out; 1152 } 1153 /* 1154 * New interdomain events are initially bound to vCPU0 This 1155 * is required to setup the event channel in the first 1156 * place and also important for UP guests because the 1157 * affinity setting is not invoked on them so nothing would 1158 * bind the channel. 1159 */ 1160 bind_evtchn_to_cpu(evtchn, 0, false); 1161 } else { 1162 struct irq_info *info = info_for_irq(irq); 1163 WARN_ON(info == NULL || info->type != IRQT_EVTCHN); 1164 } 1165 1166 out: 1167 mutex_unlock(&irq_mapping_update_lock); 1168 1169 return irq; 1170 } 1171 1172 int bind_evtchn_to_irq(evtchn_port_t evtchn) 1173 { 1174 return bind_evtchn_to_irq_chip(evtchn, &xen_dynamic_chip, NULL); 1175 } 1176 EXPORT_SYMBOL_GPL(bind_evtchn_to_irq); 1177 1178 static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu) 1179 { 1180 struct evtchn_bind_ipi bind_ipi; 1181 evtchn_port_t evtchn; 1182 int ret, irq; 1183 1184 mutex_lock(&irq_mapping_update_lock); 1185 1186 irq = per_cpu(ipi_to_irq, cpu)[ipi]; 1187 1188 if (irq == -1) { 1189 irq = xen_allocate_irq_dynamic(); 1190 if (irq < 0) 1191 goto out; 1192 1193 irq_set_chip_and_handler_name(irq, &xen_percpu_chip, 1194 handle_percpu_irq, "ipi"); 1195 1196 bind_ipi.vcpu = xen_vcpu_nr(cpu); 1197 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi, 1198 &bind_ipi) != 0) 1199 BUG(); 1200 evtchn = bind_ipi.port; 1201 1202 ret = xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi); 1203 if (ret < 0) { 1204 __unbind_from_irq(irq); 1205 irq = ret; 1206 goto out; 1207 } 1208 /* 1209 * Force the affinity mask to the target CPU so proc shows 1210 * the correct target. 1211 */ 1212 bind_evtchn_to_cpu(evtchn, cpu, true); 1213 } else { 1214 struct irq_info *info = info_for_irq(irq); 1215 WARN_ON(info == NULL || info->type != IRQT_IPI); 1216 } 1217 1218 out: 1219 mutex_unlock(&irq_mapping_update_lock); 1220 return irq; 1221 } 1222 1223 static int bind_interdomain_evtchn_to_irq_chip(struct xenbus_device *dev, 1224 evtchn_port_t remote_port, 1225 struct irq_chip *chip) 1226 { 1227 struct evtchn_bind_interdomain bind_interdomain; 1228 int err; 1229 1230 bind_interdomain.remote_dom = dev->otherend_id; 1231 bind_interdomain.remote_port = remote_port; 1232 1233 err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain, 1234 &bind_interdomain); 1235 1236 return err ? : bind_evtchn_to_irq_chip(bind_interdomain.local_port, 1237 chip, dev); 1238 } 1239 1240 int bind_interdomain_evtchn_to_irq_lateeoi(struct xenbus_device *dev, 1241 evtchn_port_t remote_port) 1242 { 1243 return bind_interdomain_evtchn_to_irq_chip(dev, remote_port, 1244 &xen_lateeoi_chip); 1245 } 1246 EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irq_lateeoi); 1247 1248 static int find_virq(unsigned int virq, unsigned int cpu, evtchn_port_t *evtchn) 1249 { 1250 struct evtchn_status status; 1251 evtchn_port_t port; 1252 int rc = -ENOENT; 1253 1254 memset(&status, 0, sizeof(status)); 1255 for (port = 0; port < xen_evtchn_max_channels(); port++) { 1256 status.dom = DOMID_SELF; 1257 status.port = port; 1258 rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status); 1259 if (rc < 0) 1260 continue; 1261 if (status.status != EVTCHNSTAT_virq) 1262 continue; 1263 if (status.u.virq == virq && status.vcpu == xen_vcpu_nr(cpu)) { 1264 *evtchn = port; 1265 break; 1266 } 1267 } 1268 return rc; 1269 } 1270 1271 /** 1272 * xen_evtchn_nr_channels - number of usable event channel ports 1273 * 1274 * This may be less than the maximum supported by the current 1275 * hypervisor ABI. Use xen_evtchn_max_channels() for the maximum 1276 * supported. 1277 */ 1278 unsigned xen_evtchn_nr_channels(void) 1279 { 1280 return evtchn_ops->nr_channels(); 1281 } 1282 EXPORT_SYMBOL_GPL(xen_evtchn_nr_channels); 1283 1284 int bind_virq_to_irq(unsigned int virq, unsigned int cpu, bool percpu) 1285 { 1286 struct evtchn_bind_virq bind_virq; 1287 evtchn_port_t evtchn = 0; 1288 int irq, ret; 1289 1290 mutex_lock(&irq_mapping_update_lock); 1291 1292 irq = per_cpu(virq_to_irq, cpu)[virq]; 1293 1294 if (irq == -1) { 1295 irq = xen_allocate_irq_dynamic(); 1296 if (irq < 0) 1297 goto out; 1298 1299 if (percpu) 1300 irq_set_chip_and_handler_name(irq, &xen_percpu_chip, 1301 handle_percpu_irq, "virq"); 1302 else 1303 irq_set_chip_and_handler_name(irq, &xen_dynamic_chip, 1304 handle_edge_irq, "virq"); 1305 1306 bind_virq.virq = virq; 1307 bind_virq.vcpu = xen_vcpu_nr(cpu); 1308 ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq, 1309 &bind_virq); 1310 if (ret == 0) 1311 evtchn = bind_virq.port; 1312 else { 1313 if (ret == -EEXIST) 1314 ret = find_virq(virq, cpu, &evtchn); 1315 BUG_ON(ret < 0); 1316 } 1317 1318 ret = xen_irq_info_virq_setup(cpu, irq, evtchn, virq); 1319 if (ret < 0) { 1320 __unbind_from_irq(irq); 1321 irq = ret; 1322 goto out; 1323 } 1324 1325 /* 1326 * Force the affinity mask for percpu interrupts so proc 1327 * shows the correct target. 1328 */ 1329 bind_evtchn_to_cpu(evtchn, cpu, percpu); 1330 } else { 1331 struct irq_info *info = info_for_irq(irq); 1332 WARN_ON(info == NULL || info->type != IRQT_VIRQ); 1333 } 1334 1335 out: 1336 mutex_unlock(&irq_mapping_update_lock); 1337 1338 return irq; 1339 } 1340 1341 static void unbind_from_irq(unsigned int irq) 1342 { 1343 mutex_lock(&irq_mapping_update_lock); 1344 __unbind_from_irq(irq); 1345 mutex_unlock(&irq_mapping_update_lock); 1346 } 1347 1348 static int bind_evtchn_to_irqhandler_chip(evtchn_port_t evtchn, 1349 irq_handler_t handler, 1350 unsigned long irqflags, 1351 const char *devname, void *dev_id, 1352 struct irq_chip *chip) 1353 { 1354 int irq, retval; 1355 1356 irq = bind_evtchn_to_irq_chip(evtchn, chip, NULL); 1357 if (irq < 0) 1358 return irq; 1359 retval = request_irq(irq, handler, irqflags, devname, dev_id); 1360 if (retval != 0) { 1361 unbind_from_irq(irq); 1362 return retval; 1363 } 1364 1365 return irq; 1366 } 1367 1368 int bind_evtchn_to_irqhandler(evtchn_port_t evtchn, 1369 irq_handler_t handler, 1370 unsigned long irqflags, 1371 const char *devname, void *dev_id) 1372 { 1373 return bind_evtchn_to_irqhandler_chip(evtchn, handler, irqflags, 1374 devname, dev_id, 1375 &xen_dynamic_chip); 1376 } 1377 EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler); 1378 1379 int bind_evtchn_to_irqhandler_lateeoi(evtchn_port_t evtchn, 1380 irq_handler_t handler, 1381 unsigned long irqflags, 1382 const char *devname, void *dev_id) 1383 { 1384 return bind_evtchn_to_irqhandler_chip(evtchn, handler, irqflags, 1385 devname, dev_id, 1386 &xen_lateeoi_chip); 1387 } 1388 EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler_lateeoi); 1389 1390 static int bind_interdomain_evtchn_to_irqhandler_chip( 1391 struct xenbus_device *dev, evtchn_port_t remote_port, 1392 irq_handler_t handler, unsigned long irqflags, 1393 const char *devname, void *dev_id, struct irq_chip *chip) 1394 { 1395 int irq, retval; 1396 1397 irq = bind_interdomain_evtchn_to_irq_chip(dev, remote_port, chip); 1398 if (irq < 0) 1399 return irq; 1400 1401 retval = request_irq(irq, handler, irqflags, devname, dev_id); 1402 if (retval != 0) { 1403 unbind_from_irq(irq); 1404 return retval; 1405 } 1406 1407 return irq; 1408 } 1409 1410 int bind_interdomain_evtchn_to_irqhandler_lateeoi(struct xenbus_device *dev, 1411 evtchn_port_t remote_port, 1412 irq_handler_t handler, 1413 unsigned long irqflags, 1414 const char *devname, 1415 void *dev_id) 1416 { 1417 return bind_interdomain_evtchn_to_irqhandler_chip(dev, 1418 remote_port, handler, irqflags, devname, 1419 dev_id, &xen_lateeoi_chip); 1420 } 1421 EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler_lateeoi); 1422 1423 int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu, 1424 irq_handler_t handler, 1425 unsigned long irqflags, const char *devname, void *dev_id) 1426 { 1427 int irq, retval; 1428 1429 irq = bind_virq_to_irq(virq, cpu, irqflags & IRQF_PERCPU); 1430 if (irq < 0) 1431 return irq; 1432 retval = request_irq(irq, handler, irqflags, devname, dev_id); 1433 if (retval != 0) { 1434 unbind_from_irq(irq); 1435 return retval; 1436 } 1437 1438 return irq; 1439 } 1440 EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler); 1441 1442 int bind_ipi_to_irqhandler(enum ipi_vector ipi, 1443 unsigned int cpu, 1444 irq_handler_t handler, 1445 unsigned long irqflags, 1446 const char *devname, 1447 void *dev_id) 1448 { 1449 int irq, retval; 1450 1451 irq = bind_ipi_to_irq(ipi, cpu); 1452 if (irq < 0) 1453 return irq; 1454 1455 irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME; 1456 retval = request_irq(irq, handler, irqflags, devname, dev_id); 1457 if (retval != 0) { 1458 unbind_from_irq(irq); 1459 return retval; 1460 } 1461 1462 return irq; 1463 } 1464 1465 void unbind_from_irqhandler(unsigned int irq, void *dev_id) 1466 { 1467 struct irq_info *info = info_for_irq(irq); 1468 1469 if (WARN_ON(!info)) 1470 return; 1471 free_irq(irq, dev_id); 1472 unbind_from_irq(irq); 1473 } 1474 EXPORT_SYMBOL_GPL(unbind_from_irqhandler); 1475 1476 /** 1477 * xen_set_irq_priority() - set an event channel priority. 1478 * @irq:irq bound to an event channel. 1479 * @priority: priority between XEN_IRQ_PRIORITY_MAX and XEN_IRQ_PRIORITY_MIN. 1480 */ 1481 int xen_set_irq_priority(unsigned irq, unsigned priority) 1482 { 1483 struct evtchn_set_priority set_priority; 1484 1485 set_priority.port = evtchn_from_irq(irq); 1486 set_priority.priority = priority; 1487 1488 return HYPERVISOR_event_channel_op(EVTCHNOP_set_priority, 1489 &set_priority); 1490 } 1491 EXPORT_SYMBOL_GPL(xen_set_irq_priority); 1492 1493 int evtchn_make_refcounted(evtchn_port_t evtchn) 1494 { 1495 int irq = get_evtchn_to_irq(evtchn); 1496 struct irq_info *info; 1497 1498 if (irq == -1) 1499 return -ENOENT; 1500 1501 info = info_for_irq(irq); 1502 1503 if (!info) 1504 return -ENOENT; 1505 1506 WARN_ON(info->refcnt != -1); 1507 1508 info->refcnt = 1; 1509 1510 return 0; 1511 } 1512 EXPORT_SYMBOL_GPL(evtchn_make_refcounted); 1513 1514 int evtchn_get(evtchn_port_t evtchn) 1515 { 1516 int irq; 1517 struct irq_info *info; 1518 int err = -ENOENT; 1519 1520 if (evtchn >= xen_evtchn_max_channels()) 1521 return -EINVAL; 1522 1523 mutex_lock(&irq_mapping_update_lock); 1524 1525 irq = get_evtchn_to_irq(evtchn); 1526 if (irq == -1) 1527 goto done; 1528 1529 info = info_for_irq(irq); 1530 1531 if (!info) 1532 goto done; 1533 1534 err = -EINVAL; 1535 if (info->refcnt <= 0 || info->refcnt == SHRT_MAX) 1536 goto done; 1537 1538 info->refcnt++; 1539 err = 0; 1540 done: 1541 mutex_unlock(&irq_mapping_update_lock); 1542 1543 return err; 1544 } 1545 EXPORT_SYMBOL_GPL(evtchn_get); 1546 1547 void evtchn_put(evtchn_port_t evtchn) 1548 { 1549 int irq = get_evtchn_to_irq(evtchn); 1550 if (WARN_ON(irq == -1)) 1551 return; 1552 unbind_from_irq(irq); 1553 } 1554 EXPORT_SYMBOL_GPL(evtchn_put); 1555 1556 void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector) 1557 { 1558 int irq; 1559 1560 #ifdef CONFIG_X86 1561 if (unlikely(vector == XEN_NMI_VECTOR)) { 1562 int rc = HYPERVISOR_vcpu_op(VCPUOP_send_nmi, xen_vcpu_nr(cpu), 1563 NULL); 1564 if (rc < 0) 1565 printk(KERN_WARNING "Sending nmi to CPU%d failed (rc:%d)\n", cpu, rc); 1566 return; 1567 } 1568 #endif 1569 irq = per_cpu(ipi_to_irq, cpu)[vector]; 1570 BUG_ON(irq < 0); 1571 notify_remote_via_irq(irq); 1572 } 1573 1574 struct evtchn_loop_ctrl { 1575 ktime_t timeout; 1576 unsigned count; 1577 bool defer_eoi; 1578 }; 1579 1580 void handle_irq_for_port(evtchn_port_t port, struct evtchn_loop_ctrl *ctrl) 1581 { 1582 int irq; 1583 struct irq_info *info; 1584 1585 irq = get_evtchn_to_irq(port); 1586 if (irq == -1) 1587 return; 1588 1589 /* 1590 * Check for timeout every 256 events. 1591 * We are setting the timeout value only after the first 256 1592 * events in order to not hurt the common case of few loop 1593 * iterations. The 256 is basically an arbitrary value. 1594 * 1595 * In case we are hitting the timeout we need to defer all further 1596 * EOIs in order to ensure to leave the event handling loop rather 1597 * sooner than later. 1598 */ 1599 if (!ctrl->defer_eoi && !(++ctrl->count & 0xff)) { 1600 ktime_t kt = ktime_get(); 1601 1602 if (!ctrl->timeout) { 1603 kt = ktime_add_ms(kt, 1604 jiffies_to_msecs(event_loop_timeout)); 1605 ctrl->timeout = kt; 1606 } else if (kt > ctrl->timeout) { 1607 ctrl->defer_eoi = true; 1608 } 1609 } 1610 1611 info = info_for_irq(irq); 1612 1613 if (ctrl->defer_eoi) { 1614 info->eoi_cpu = smp_processor_id(); 1615 info->irq_epoch = __this_cpu_read(irq_epoch); 1616 info->eoi_time = get_jiffies_64() + event_eoi_delay; 1617 } 1618 1619 generic_handle_irq(irq); 1620 } 1621 1622 static void __xen_evtchn_do_upcall(void) 1623 { 1624 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu); 1625 int cpu = smp_processor_id(); 1626 struct evtchn_loop_ctrl ctrl = { 0 }; 1627 1628 read_lock(&evtchn_rwlock); 1629 1630 do { 1631 vcpu_info->evtchn_upcall_pending = 0; 1632 1633 xen_evtchn_handle_events(cpu, &ctrl); 1634 1635 BUG_ON(!irqs_disabled()); 1636 1637 virt_rmb(); /* Hypervisor can set upcall pending. */ 1638 1639 } while (vcpu_info->evtchn_upcall_pending); 1640 1641 read_unlock(&evtchn_rwlock); 1642 1643 /* 1644 * Increment irq_epoch only now to defer EOIs only for 1645 * xen_irq_lateeoi() invocations occurring from inside the loop 1646 * above. 1647 */ 1648 __this_cpu_inc(irq_epoch); 1649 } 1650 1651 void xen_evtchn_do_upcall(struct pt_regs *regs) 1652 { 1653 struct pt_regs *old_regs = set_irq_regs(regs); 1654 1655 irq_enter(); 1656 1657 __xen_evtchn_do_upcall(); 1658 1659 irq_exit(); 1660 set_irq_regs(old_regs); 1661 } 1662 1663 void xen_hvm_evtchn_do_upcall(void) 1664 { 1665 __xen_evtchn_do_upcall(); 1666 } 1667 EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall); 1668 1669 /* Rebind a new event channel to an existing irq. */ 1670 void rebind_evtchn_irq(evtchn_port_t evtchn, int irq) 1671 { 1672 struct irq_info *info = info_for_irq(irq); 1673 1674 if (WARN_ON(!info)) 1675 return; 1676 1677 /* Make sure the irq is masked, since the new event channel 1678 will also be masked. */ 1679 disable_irq(irq); 1680 1681 mutex_lock(&irq_mapping_update_lock); 1682 1683 /* After resume the irq<->evtchn mappings are all cleared out */ 1684 BUG_ON(get_evtchn_to_irq(evtchn) != -1); 1685 /* Expect irq to have been bound before, 1686 so there should be a proper type */ 1687 BUG_ON(info->type == IRQT_UNBOUND); 1688 1689 (void)xen_irq_info_evtchn_setup(irq, evtchn, NULL); 1690 1691 mutex_unlock(&irq_mapping_update_lock); 1692 1693 bind_evtchn_to_cpu(evtchn, info->cpu, false); 1694 1695 /* Unmask the event channel. */ 1696 enable_irq(irq); 1697 } 1698 1699 /* Rebind an evtchn so that it gets delivered to a specific cpu */ 1700 static int xen_rebind_evtchn_to_cpu(evtchn_port_t evtchn, unsigned int tcpu) 1701 { 1702 struct evtchn_bind_vcpu bind_vcpu; 1703 int masked; 1704 1705 if (!VALID_EVTCHN(evtchn)) 1706 return -1; 1707 1708 if (!xen_support_evtchn_rebind()) 1709 return -1; 1710 1711 /* Send future instances of this interrupt to other vcpu. */ 1712 bind_vcpu.port = evtchn; 1713 bind_vcpu.vcpu = xen_vcpu_nr(tcpu); 1714 1715 /* 1716 * Mask the event while changing the VCPU binding to prevent 1717 * it being delivered on an unexpected VCPU. 1718 */ 1719 masked = test_and_set_mask(evtchn); 1720 1721 /* 1722 * If this fails, it usually just indicates that we're dealing with a 1723 * virq or IPI channel, which don't actually need to be rebound. Ignore 1724 * it, but don't do the xenlinux-level rebind in that case. 1725 */ 1726 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0) 1727 bind_evtchn_to_cpu(evtchn, tcpu, false); 1728 1729 if (!masked) 1730 unmask_evtchn(evtchn); 1731 1732 return 0; 1733 } 1734 1735 /* 1736 * Find the CPU within @dest mask which has the least number of channels 1737 * assigned. This is not precise as the per cpu counts can be modified 1738 * concurrently. 1739 */ 1740 static unsigned int select_target_cpu(const struct cpumask *dest) 1741 { 1742 unsigned int cpu, best_cpu = UINT_MAX, minch = UINT_MAX; 1743 1744 for_each_cpu_and(cpu, dest, cpu_online_mask) { 1745 unsigned int curch = atomic_read(&channels_on_cpu[cpu]); 1746 1747 if (curch < minch) { 1748 minch = curch; 1749 best_cpu = cpu; 1750 } 1751 } 1752 1753 /* 1754 * Catch the unlikely case that dest contains no online CPUs. Can't 1755 * recurse. 1756 */ 1757 if (best_cpu == UINT_MAX) 1758 return select_target_cpu(cpu_online_mask); 1759 1760 return best_cpu; 1761 } 1762 1763 static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest, 1764 bool force) 1765 { 1766 unsigned int tcpu = select_target_cpu(dest); 1767 int ret; 1768 1769 ret = xen_rebind_evtchn_to_cpu(evtchn_from_irq(data->irq), tcpu); 1770 if (!ret) 1771 irq_data_update_effective_affinity(data, cpumask_of(tcpu)); 1772 1773 return ret; 1774 } 1775 1776 static void enable_dynirq(struct irq_data *data) 1777 { 1778 evtchn_port_t evtchn = evtchn_from_irq(data->irq); 1779 1780 if (VALID_EVTCHN(evtchn)) 1781 unmask_evtchn(evtchn); 1782 } 1783 1784 static void disable_dynirq(struct irq_data *data) 1785 { 1786 evtchn_port_t evtchn = evtchn_from_irq(data->irq); 1787 1788 if (VALID_EVTCHN(evtchn)) 1789 mask_evtchn(evtchn); 1790 } 1791 1792 static void ack_dynirq(struct irq_data *data) 1793 { 1794 evtchn_port_t evtchn = evtchn_from_irq(data->irq); 1795 1796 if (!VALID_EVTCHN(evtchn)) 1797 return; 1798 1799 clear_evtchn(evtchn); 1800 } 1801 1802 static void mask_ack_dynirq(struct irq_data *data) 1803 { 1804 disable_dynirq(data); 1805 ack_dynirq(data); 1806 } 1807 1808 static int retrigger_dynirq(struct irq_data *data) 1809 { 1810 evtchn_port_t evtchn = evtchn_from_irq(data->irq); 1811 int masked; 1812 1813 if (!VALID_EVTCHN(evtchn)) 1814 return 0; 1815 1816 masked = test_and_set_mask(evtchn); 1817 set_evtchn(evtchn); 1818 if (!masked) 1819 unmask_evtchn(evtchn); 1820 1821 return 1; 1822 } 1823 1824 static void restore_pirqs(void) 1825 { 1826 int pirq, rc, irq, gsi; 1827 struct physdev_map_pirq map_irq; 1828 struct irq_info *info; 1829 1830 list_for_each_entry(info, &xen_irq_list_head, list) { 1831 if (info->type != IRQT_PIRQ) 1832 continue; 1833 1834 pirq = info->u.pirq.pirq; 1835 gsi = info->u.pirq.gsi; 1836 irq = info->irq; 1837 1838 /* save/restore of PT devices doesn't work, so at this point the 1839 * only devices present are GSI based emulated devices */ 1840 if (!gsi) 1841 continue; 1842 1843 map_irq.domid = DOMID_SELF; 1844 map_irq.type = MAP_PIRQ_TYPE_GSI; 1845 map_irq.index = gsi; 1846 map_irq.pirq = pirq; 1847 1848 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq); 1849 if (rc) { 1850 pr_warn("xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n", 1851 gsi, irq, pirq, rc); 1852 xen_free_irq(irq); 1853 continue; 1854 } 1855 1856 printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq); 1857 1858 __startup_pirq(irq); 1859 } 1860 } 1861 1862 static void restore_cpu_virqs(unsigned int cpu) 1863 { 1864 struct evtchn_bind_virq bind_virq; 1865 evtchn_port_t evtchn; 1866 int virq, irq; 1867 1868 for (virq = 0; virq < NR_VIRQS; virq++) { 1869 if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1) 1870 continue; 1871 1872 BUG_ON(virq_from_irq(irq) != virq); 1873 1874 /* Get a new binding from Xen. */ 1875 bind_virq.virq = virq; 1876 bind_virq.vcpu = xen_vcpu_nr(cpu); 1877 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq, 1878 &bind_virq) != 0) 1879 BUG(); 1880 evtchn = bind_virq.port; 1881 1882 /* Record the new mapping. */ 1883 (void)xen_irq_info_virq_setup(cpu, irq, evtchn, virq); 1884 /* The affinity mask is still valid */ 1885 bind_evtchn_to_cpu(evtchn, cpu, false); 1886 } 1887 } 1888 1889 static void restore_cpu_ipis(unsigned int cpu) 1890 { 1891 struct evtchn_bind_ipi bind_ipi; 1892 evtchn_port_t evtchn; 1893 int ipi, irq; 1894 1895 for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) { 1896 if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1) 1897 continue; 1898 1899 BUG_ON(ipi_from_irq(irq) != ipi); 1900 1901 /* Get a new binding from Xen. */ 1902 bind_ipi.vcpu = xen_vcpu_nr(cpu); 1903 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi, 1904 &bind_ipi) != 0) 1905 BUG(); 1906 evtchn = bind_ipi.port; 1907 1908 /* Record the new mapping. */ 1909 (void)xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi); 1910 /* The affinity mask is still valid */ 1911 bind_evtchn_to_cpu(evtchn, cpu, false); 1912 } 1913 } 1914 1915 /* Clear an irq's pending state, in preparation for polling on it */ 1916 void xen_clear_irq_pending(int irq) 1917 { 1918 evtchn_port_t evtchn = evtchn_from_irq(irq); 1919 1920 if (VALID_EVTCHN(evtchn)) 1921 clear_evtchn(evtchn); 1922 } 1923 EXPORT_SYMBOL(xen_clear_irq_pending); 1924 void xen_set_irq_pending(int irq) 1925 { 1926 evtchn_port_t evtchn = evtchn_from_irq(irq); 1927 1928 if (VALID_EVTCHN(evtchn)) 1929 set_evtchn(evtchn); 1930 } 1931 1932 bool xen_test_irq_pending(int irq) 1933 { 1934 evtchn_port_t evtchn = evtchn_from_irq(irq); 1935 bool ret = false; 1936 1937 if (VALID_EVTCHN(evtchn)) 1938 ret = test_evtchn(evtchn); 1939 1940 return ret; 1941 } 1942 1943 /* Poll waiting for an irq to become pending with timeout. In the usual case, 1944 * the irq will be disabled so it won't deliver an interrupt. */ 1945 void xen_poll_irq_timeout(int irq, u64 timeout) 1946 { 1947 evtchn_port_t evtchn = evtchn_from_irq(irq); 1948 1949 if (VALID_EVTCHN(evtchn)) { 1950 struct sched_poll poll; 1951 1952 poll.nr_ports = 1; 1953 poll.timeout = timeout; 1954 set_xen_guest_handle(poll.ports, &evtchn); 1955 1956 if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0) 1957 BUG(); 1958 } 1959 } 1960 EXPORT_SYMBOL(xen_poll_irq_timeout); 1961 /* Poll waiting for an irq to become pending. In the usual case, the 1962 * irq will be disabled so it won't deliver an interrupt. */ 1963 void xen_poll_irq(int irq) 1964 { 1965 xen_poll_irq_timeout(irq, 0 /* no timeout */); 1966 } 1967 1968 /* Check whether the IRQ line is shared with other guests. */ 1969 int xen_test_irq_shared(int irq) 1970 { 1971 struct irq_info *info = info_for_irq(irq); 1972 struct physdev_irq_status_query irq_status; 1973 1974 if (WARN_ON(!info)) 1975 return -ENOENT; 1976 1977 irq_status.irq = info->u.pirq.pirq; 1978 1979 if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status)) 1980 return 0; 1981 return !(irq_status.flags & XENIRQSTAT_shared); 1982 } 1983 EXPORT_SYMBOL_GPL(xen_test_irq_shared); 1984 1985 void xen_irq_resume(void) 1986 { 1987 unsigned int cpu; 1988 struct irq_info *info; 1989 1990 /* New event-channel space is not 'live' yet. */ 1991 xen_evtchn_resume(); 1992 1993 /* No IRQ <-> event-channel mappings. */ 1994 list_for_each_entry(info, &xen_irq_list_head, list) { 1995 /* Zap event-channel binding */ 1996 info->evtchn = 0; 1997 /* Adjust accounting */ 1998 channels_on_cpu_dec(info); 1999 } 2000 2001 clear_evtchn_to_irq_all(); 2002 2003 for_each_possible_cpu(cpu) { 2004 restore_cpu_virqs(cpu); 2005 restore_cpu_ipis(cpu); 2006 } 2007 2008 restore_pirqs(); 2009 } 2010 2011 static struct irq_chip xen_dynamic_chip __read_mostly = { 2012 .name = "xen-dyn", 2013 2014 .irq_disable = disable_dynirq, 2015 .irq_mask = disable_dynirq, 2016 .irq_unmask = enable_dynirq, 2017 2018 .irq_ack = ack_dynirq, 2019 .irq_mask_ack = mask_ack_dynirq, 2020 2021 .irq_set_affinity = set_affinity_irq, 2022 .irq_retrigger = retrigger_dynirq, 2023 }; 2024 2025 static struct irq_chip xen_lateeoi_chip __read_mostly = { 2026 /* The chip name needs to contain "xen-dyn" for irqbalance to work. */ 2027 .name = "xen-dyn-lateeoi", 2028 2029 .irq_disable = disable_dynirq, 2030 .irq_mask = disable_dynirq, 2031 .irq_unmask = enable_dynirq, 2032 2033 .irq_ack = mask_ack_dynirq, 2034 .irq_mask_ack = mask_ack_dynirq, 2035 2036 .irq_set_affinity = set_affinity_irq, 2037 .irq_retrigger = retrigger_dynirq, 2038 }; 2039 2040 static struct irq_chip xen_pirq_chip __read_mostly = { 2041 .name = "xen-pirq", 2042 2043 .irq_startup = startup_pirq, 2044 .irq_shutdown = shutdown_pirq, 2045 .irq_enable = enable_pirq, 2046 .irq_disable = disable_pirq, 2047 2048 .irq_mask = disable_dynirq, 2049 .irq_unmask = enable_dynirq, 2050 2051 .irq_ack = eoi_pirq, 2052 .irq_eoi = eoi_pirq, 2053 .irq_mask_ack = mask_ack_pirq, 2054 2055 .irq_set_affinity = set_affinity_irq, 2056 2057 .irq_retrigger = retrigger_dynirq, 2058 }; 2059 2060 static struct irq_chip xen_percpu_chip __read_mostly = { 2061 .name = "xen-percpu", 2062 2063 .irq_disable = disable_dynirq, 2064 .irq_mask = disable_dynirq, 2065 .irq_unmask = enable_dynirq, 2066 2067 .irq_ack = ack_dynirq, 2068 }; 2069 2070 #ifdef CONFIG_XEN_PVHVM 2071 /* Vector callbacks are better than PCI interrupts to receive event 2072 * channel notifications because we can receive vector callbacks on any 2073 * vcpu and we don't need PCI support or APIC interactions. */ 2074 void xen_setup_callback_vector(void) 2075 { 2076 uint64_t callback_via; 2077 2078 if (xen_have_vector_callback) { 2079 callback_via = HVM_CALLBACK_VECTOR(HYPERVISOR_CALLBACK_VECTOR); 2080 if (xen_set_callback_via(callback_via)) { 2081 pr_err("Request for Xen HVM callback vector failed\n"); 2082 xen_have_vector_callback = 0; 2083 } 2084 } 2085 } 2086 2087 static __init void xen_alloc_callback_vector(void) 2088 { 2089 if (!xen_have_vector_callback) 2090 return; 2091 2092 pr_info("Xen HVM callback vector for event delivery is enabled\n"); 2093 alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, asm_sysvec_xen_hvm_callback); 2094 } 2095 #else 2096 void xen_setup_callback_vector(void) {} 2097 static inline void xen_alloc_callback_vector(void) {} 2098 #endif 2099 2100 bool xen_fifo_events = true; 2101 module_param_named(fifo_events, xen_fifo_events, bool, 0); 2102 2103 static int xen_evtchn_cpu_prepare(unsigned int cpu) 2104 { 2105 int ret = 0; 2106 2107 xen_cpu_init_eoi(cpu); 2108 2109 if (evtchn_ops->percpu_init) 2110 ret = evtchn_ops->percpu_init(cpu); 2111 2112 return ret; 2113 } 2114 2115 static int xen_evtchn_cpu_dead(unsigned int cpu) 2116 { 2117 int ret = 0; 2118 2119 if (evtchn_ops->percpu_deinit) 2120 ret = evtchn_ops->percpu_deinit(cpu); 2121 2122 return ret; 2123 } 2124 2125 void __init xen_init_IRQ(void) 2126 { 2127 int ret = -EINVAL; 2128 evtchn_port_t evtchn; 2129 2130 if (xen_fifo_events) 2131 ret = xen_evtchn_fifo_init(); 2132 if (ret < 0) { 2133 xen_evtchn_2l_init(); 2134 xen_fifo_events = false; 2135 } 2136 2137 xen_cpu_init_eoi(smp_processor_id()); 2138 2139 cpuhp_setup_state_nocalls(CPUHP_XEN_EVTCHN_PREPARE, 2140 "xen/evtchn:prepare", 2141 xen_evtchn_cpu_prepare, xen_evtchn_cpu_dead); 2142 2143 evtchn_to_irq = kcalloc(EVTCHN_ROW(xen_evtchn_max_channels()), 2144 sizeof(*evtchn_to_irq), GFP_KERNEL); 2145 BUG_ON(!evtchn_to_irq); 2146 2147 /* No event channels are 'live' right now. */ 2148 for (evtchn = 0; evtchn < xen_evtchn_nr_channels(); evtchn++) 2149 mask_evtchn(evtchn); 2150 2151 pirq_needs_eoi = pirq_needs_eoi_flag; 2152 2153 #ifdef CONFIG_X86 2154 if (xen_pv_domain()) { 2155 if (xen_initial_domain()) 2156 pci_xen_initial_domain(); 2157 } 2158 if (xen_feature(XENFEAT_hvm_callback_vector)) { 2159 xen_setup_callback_vector(); 2160 xen_alloc_callback_vector(); 2161 } 2162 2163 if (xen_hvm_domain()) { 2164 native_init_IRQ(); 2165 /* pci_xen_hvm_init must be called after native_init_IRQ so that 2166 * __acpi_register_gsi can point at the right function */ 2167 pci_xen_hvm_init(); 2168 } else { 2169 int rc; 2170 struct physdev_pirq_eoi_gmfn eoi_gmfn; 2171 2172 pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO); 2173 eoi_gmfn.gmfn = virt_to_gfn(pirq_eoi_map); 2174 rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn); 2175 if (rc != 0) { 2176 free_page((unsigned long) pirq_eoi_map); 2177 pirq_eoi_map = NULL; 2178 } else 2179 pirq_needs_eoi = pirq_check_eoi_map; 2180 } 2181 #endif 2182 } 2183