xref: /linux/drivers/xen/events/events_2l.c (revision d91517839e5d95adc0cf4b28caa7af62a71de526)
1 /*
2  * Xen event channels (2-level ABI)
3  *
4  * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
5  */
6 
7 #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
8 
9 #include <linux/linkage.h>
10 #include <linux/interrupt.h>
11 #include <linux/irq.h>
12 #include <linux/module.h>
13 
14 #include <asm/sync_bitops.h>
15 #include <asm/xen/hypercall.h>
16 #include <asm/xen/hypervisor.h>
17 
18 #include <xen/xen.h>
19 #include <xen/xen-ops.h>
20 #include <xen/events.h>
21 #include <xen/interface/xen.h>
22 #include <xen/interface/event_channel.h>
23 
24 #include "events_internal.h"
25 
26 /*
27  * Note sizeof(xen_ulong_t) can be more than sizeof(unsigned long). Be
28  * careful to only use bitops which allow for this (e.g
29  * test_bit/find_first_bit and friends but not __ffs) and to pass
30  * BITS_PER_EVTCHN_WORD as the bitmask length.
31  */
32 #define BITS_PER_EVTCHN_WORD (sizeof(xen_ulong_t)*8)
33 /*
34  * Make a bitmask (i.e. unsigned long *) of a xen_ulong_t
35  * array. Primarily to avoid long lines (hence the terse name).
36  */
37 #define BM(x) (unsigned long *)(x)
38 /* Find the first set bit in a evtchn mask */
39 #define EVTCHN_FIRST_BIT(w) find_first_bit(BM(&(w)), BITS_PER_EVTCHN_WORD)
40 
41 static DEFINE_PER_CPU(xen_ulong_t [EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD],
42 		      cpu_evtchn_mask);
43 
44 static unsigned evtchn_2l_max_channels(void)
45 {
46 	return EVTCHN_2L_NR_CHANNELS;
47 }
48 
49 static void evtchn_2l_bind_to_cpu(struct irq_info *info, unsigned cpu)
50 {
51 	clear_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, info->cpu)));
52 	set_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, cpu)));
53 }
54 
55 static void evtchn_2l_clear_pending(unsigned port)
56 {
57 	struct shared_info *s = HYPERVISOR_shared_info;
58 	sync_clear_bit(port, BM(&s->evtchn_pending[0]));
59 }
60 
61 static void evtchn_2l_set_pending(unsigned port)
62 {
63 	struct shared_info *s = HYPERVISOR_shared_info;
64 	sync_set_bit(port, BM(&s->evtchn_pending[0]));
65 }
66 
67 static bool evtchn_2l_is_pending(unsigned port)
68 {
69 	struct shared_info *s = HYPERVISOR_shared_info;
70 	return sync_test_bit(port, BM(&s->evtchn_pending[0]));
71 }
72 
73 static bool evtchn_2l_test_and_set_mask(unsigned port)
74 {
75 	struct shared_info *s = HYPERVISOR_shared_info;
76 	return sync_test_and_set_bit(port, BM(&s->evtchn_mask[0]));
77 }
78 
79 static void evtchn_2l_mask(unsigned port)
80 {
81 	struct shared_info *s = HYPERVISOR_shared_info;
82 	sync_set_bit(port, BM(&s->evtchn_mask[0]));
83 }
84 
85 static void evtchn_2l_unmask(unsigned port)
86 {
87 	struct shared_info *s = HYPERVISOR_shared_info;
88 	unsigned int cpu = get_cpu();
89 	int do_hypercall = 0, evtchn_pending = 0;
90 
91 	BUG_ON(!irqs_disabled());
92 
93 	if (unlikely((cpu != cpu_from_evtchn(port))))
94 		do_hypercall = 1;
95 	else {
96 		/*
97 		 * Need to clear the mask before checking pending to
98 		 * avoid a race with an event becoming pending.
99 		 *
100 		 * EVTCHNOP_unmask will only trigger an upcall if the
101 		 * mask bit was set, so if a hypercall is needed
102 		 * remask the event.
103 		 */
104 		sync_clear_bit(port, BM(&s->evtchn_mask[0]));
105 		evtchn_pending = sync_test_bit(port, BM(&s->evtchn_pending[0]));
106 
107 		if (unlikely(evtchn_pending && xen_hvm_domain())) {
108 			sync_set_bit(port, BM(&s->evtchn_mask[0]));
109 			do_hypercall = 1;
110 		}
111 	}
112 
113 	/* Slow path (hypercall) if this is a non-local port or if this is
114 	 * an hvm domain and an event is pending (hvm domains don't have
115 	 * their own implementation of irq_enable). */
116 	if (do_hypercall) {
117 		struct evtchn_unmask unmask = { .port = port };
118 		(void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
119 	} else {
120 		struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
121 
122 		/*
123 		 * The following is basically the equivalent of
124 		 * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
125 		 * the interrupt edge' if the channel is masked.
126 		 */
127 		if (evtchn_pending &&
128 		    !sync_test_and_set_bit(port / BITS_PER_EVTCHN_WORD,
129 					   BM(&vcpu_info->evtchn_pending_sel)))
130 			vcpu_info->evtchn_upcall_pending = 1;
131 	}
132 
133 	put_cpu();
134 }
135 
136 static DEFINE_PER_CPU(unsigned int, current_word_idx);
137 static DEFINE_PER_CPU(unsigned int, current_bit_idx);
138 
139 /*
140  * Mask out the i least significant bits of w
141  */
142 #define MASK_LSBS(w, i) (w & ((~((xen_ulong_t)0UL)) << i))
143 
144 static inline xen_ulong_t active_evtchns(unsigned int cpu,
145 					 struct shared_info *sh,
146 					 unsigned int idx)
147 {
148 	return sh->evtchn_pending[idx] &
149 		per_cpu(cpu_evtchn_mask, cpu)[idx] &
150 		~sh->evtchn_mask[idx];
151 }
152 
153 /*
154  * Search the CPU's pending events bitmasks.  For each one found, map
155  * the event number to an irq, and feed it into do_IRQ() for handling.
156  *
157  * Xen uses a two-level bitmap to speed searching.  The first level is
158  * a bitset of words which contain pending event bits.  The second
159  * level is a bitset of pending events themselves.
160  */
161 static void evtchn_2l_handle_events(unsigned cpu)
162 {
163 	int irq;
164 	xen_ulong_t pending_words;
165 	xen_ulong_t pending_bits;
166 	int start_word_idx, start_bit_idx;
167 	int word_idx, bit_idx;
168 	int i;
169 	struct irq_desc *desc;
170 	struct shared_info *s = HYPERVISOR_shared_info;
171 	struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
172 
173 	/* Timer interrupt has highest priority. */
174 	irq = irq_from_virq(cpu, VIRQ_TIMER);
175 	if (irq != -1) {
176 		unsigned int evtchn = evtchn_from_irq(irq);
177 		word_idx = evtchn / BITS_PER_LONG;
178 		bit_idx = evtchn % BITS_PER_LONG;
179 		if (active_evtchns(cpu, s, word_idx) & (1ULL << bit_idx)) {
180 			desc = irq_to_desc(irq);
181 			if (desc)
182 				generic_handle_irq_desc(irq, desc);
183 		}
184 	}
185 
186 	/*
187 	 * Master flag must be cleared /before/ clearing
188 	 * selector flag. xchg_xen_ulong must contain an
189 	 * appropriate barrier.
190 	 */
191 	pending_words = xchg_xen_ulong(&vcpu_info->evtchn_pending_sel, 0);
192 
193 	start_word_idx = __this_cpu_read(current_word_idx);
194 	start_bit_idx = __this_cpu_read(current_bit_idx);
195 
196 	word_idx = start_word_idx;
197 
198 	for (i = 0; pending_words != 0; i++) {
199 		xen_ulong_t words;
200 
201 		words = MASK_LSBS(pending_words, word_idx);
202 
203 		/*
204 		 * If we masked out all events, wrap to beginning.
205 		 */
206 		if (words == 0) {
207 			word_idx = 0;
208 			bit_idx = 0;
209 			continue;
210 		}
211 		word_idx = EVTCHN_FIRST_BIT(words);
212 
213 		pending_bits = active_evtchns(cpu, s, word_idx);
214 		bit_idx = 0; /* usually scan entire word from start */
215 		/*
216 		 * We scan the starting word in two parts.
217 		 *
218 		 * 1st time: start in the middle, scanning the
219 		 * upper bits.
220 		 *
221 		 * 2nd time: scan the whole word (not just the
222 		 * parts skipped in the first pass) -- if an
223 		 * event in the previously scanned bits is
224 		 * pending again it would just be scanned on
225 		 * the next loop anyway.
226 		 */
227 		if (word_idx == start_word_idx) {
228 			if (i == 0)
229 				bit_idx = start_bit_idx;
230 		}
231 
232 		do {
233 			xen_ulong_t bits;
234 			int port;
235 
236 			bits = MASK_LSBS(pending_bits, bit_idx);
237 
238 			/* If we masked out all events, move on. */
239 			if (bits == 0)
240 				break;
241 
242 			bit_idx = EVTCHN_FIRST_BIT(bits);
243 
244 			/* Process port. */
245 			port = (word_idx * BITS_PER_EVTCHN_WORD) + bit_idx;
246 			irq = get_evtchn_to_irq(port);
247 
248 			if (irq != -1) {
249 				desc = irq_to_desc(irq);
250 				if (desc)
251 					generic_handle_irq_desc(irq, desc);
252 			}
253 
254 			bit_idx = (bit_idx + 1) % BITS_PER_EVTCHN_WORD;
255 
256 			/* Next caller starts at last processed + 1 */
257 			__this_cpu_write(current_word_idx,
258 					 bit_idx ? word_idx :
259 					 (word_idx+1) % BITS_PER_EVTCHN_WORD);
260 			__this_cpu_write(current_bit_idx, bit_idx);
261 		} while (bit_idx != 0);
262 
263 		/* Scan start_l1i twice; all others once. */
264 		if ((word_idx != start_word_idx) || (i != 0))
265 			pending_words &= ~(1UL << word_idx);
266 
267 		word_idx = (word_idx + 1) % BITS_PER_EVTCHN_WORD;
268 	}
269 }
270 
271 irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
272 {
273 	struct shared_info *sh = HYPERVISOR_shared_info;
274 	int cpu = smp_processor_id();
275 	xen_ulong_t *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
276 	int i;
277 	unsigned long flags;
278 	static DEFINE_SPINLOCK(debug_lock);
279 	struct vcpu_info *v;
280 
281 	spin_lock_irqsave(&debug_lock, flags);
282 
283 	printk("\nvcpu %d\n  ", cpu);
284 
285 	for_each_online_cpu(i) {
286 		int pending;
287 		v = per_cpu(xen_vcpu, i);
288 		pending = (get_irq_regs() && i == cpu)
289 			? xen_irqs_disabled(get_irq_regs())
290 			: v->evtchn_upcall_mask;
291 		printk("%d: masked=%d pending=%d event_sel %0*"PRI_xen_ulong"\n  ", i,
292 		       pending, v->evtchn_upcall_pending,
293 		       (int)(sizeof(v->evtchn_pending_sel)*2),
294 		       v->evtchn_pending_sel);
295 	}
296 	v = per_cpu(xen_vcpu, cpu);
297 
298 	printk("\npending:\n   ");
299 	for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
300 		printk("%0*"PRI_xen_ulong"%s",
301 		       (int)sizeof(sh->evtchn_pending[0])*2,
302 		       sh->evtchn_pending[i],
303 		       i % 8 == 0 ? "\n   " : " ");
304 	printk("\nglobal mask:\n   ");
305 	for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
306 		printk("%0*"PRI_xen_ulong"%s",
307 		       (int)(sizeof(sh->evtchn_mask[0])*2),
308 		       sh->evtchn_mask[i],
309 		       i % 8 == 0 ? "\n   " : " ");
310 
311 	printk("\nglobally unmasked:\n   ");
312 	for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
313 		printk("%0*"PRI_xen_ulong"%s",
314 		       (int)(sizeof(sh->evtchn_mask[0])*2),
315 		       sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
316 		       i % 8 == 0 ? "\n   " : " ");
317 
318 	printk("\nlocal cpu%d mask:\n   ", cpu);
319 	for (i = (EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD)-1; i >= 0; i--)
320 		printk("%0*"PRI_xen_ulong"%s", (int)(sizeof(cpu_evtchn[0])*2),
321 		       cpu_evtchn[i],
322 		       i % 8 == 0 ? "\n   " : " ");
323 
324 	printk("\nlocally unmasked:\n   ");
325 	for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
326 		xen_ulong_t pending = sh->evtchn_pending[i]
327 			& ~sh->evtchn_mask[i]
328 			& cpu_evtchn[i];
329 		printk("%0*"PRI_xen_ulong"%s",
330 		       (int)(sizeof(sh->evtchn_mask[0])*2),
331 		       pending, i % 8 == 0 ? "\n   " : " ");
332 	}
333 
334 	printk("\npending list:\n");
335 	for (i = 0; i < EVTCHN_2L_NR_CHANNELS; i++) {
336 		if (sync_test_bit(i, BM(sh->evtchn_pending))) {
337 			int word_idx = i / BITS_PER_EVTCHN_WORD;
338 			printk("  %d: event %d -> irq %d%s%s%s\n",
339 			       cpu_from_evtchn(i), i,
340 			       get_evtchn_to_irq(i),
341 			       sync_test_bit(word_idx, BM(&v->evtchn_pending_sel))
342 			       ? "" : " l2-clear",
343 			       !sync_test_bit(i, BM(sh->evtchn_mask))
344 			       ? "" : " globally-masked",
345 			       sync_test_bit(i, BM(cpu_evtchn))
346 			       ? "" : " locally-masked");
347 		}
348 	}
349 
350 	spin_unlock_irqrestore(&debug_lock, flags);
351 
352 	return IRQ_HANDLED;
353 }
354 
355 static const struct evtchn_ops evtchn_ops_2l = {
356 	.max_channels      = evtchn_2l_max_channels,
357 	.nr_channels       = evtchn_2l_max_channels,
358 	.bind_to_cpu       = evtchn_2l_bind_to_cpu,
359 	.clear_pending     = evtchn_2l_clear_pending,
360 	.set_pending       = evtchn_2l_set_pending,
361 	.is_pending        = evtchn_2l_is_pending,
362 	.test_and_set_mask = evtchn_2l_test_and_set_mask,
363 	.mask              = evtchn_2l_mask,
364 	.unmask            = evtchn_2l_unmask,
365 	.handle_events     = evtchn_2l_handle_events,
366 };
367 
368 void __init xen_evtchn_2l_init(void)
369 {
370 	pr_info("Using 2-level ABI\n");
371 	evtchn_ops = &evtchn_ops_2l;
372 }
373