1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * sunplus Watchdog Driver 4 * 5 * Copyright (C) 2021 Sunplus Technology Co., Ltd. 6 * 7 */ 8 9 #include <linux/clk.h> 10 #include <linux/io.h> 11 #include <linux/module.h> 12 #include <linux/platform_device.h> 13 #include <linux/reset.h> 14 #include <linux/watchdog.h> 15 16 #define WDT_CTRL 0x00 17 #define WDT_CNT 0x04 18 19 #define WDT_STOP 0x3877 20 #define WDT_RESUME 0x4A4B 21 #define WDT_CLRIRQ 0x7482 22 #define WDT_UNLOCK 0xAB00 23 #define WDT_LOCK 0xAB01 24 #define WDT_CONMAX 0xDEAF 25 26 /* TIMEOUT_MAX = ffff0/90kHz =11.65, so longer than 11 seconds will time out. */ 27 #define SP_WDT_MAX_TIMEOUT 11U 28 #define SP_WDT_DEFAULT_TIMEOUT 10 29 30 #define STC_CLK 90000 31 32 #define DEVICE_NAME "sunplus-wdt" 33 34 static unsigned int timeout; 35 module_param(timeout, int, 0); 36 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds"); 37 38 static bool nowayout = WATCHDOG_NOWAYOUT; 39 module_param(nowayout, bool, 0); 40 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" 41 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 42 43 struct sp_wdt_priv { 44 struct watchdog_device wdev; 45 void __iomem *base; 46 struct clk *clk; 47 struct reset_control *rstc; 48 }; 49 50 static int sp_wdt_restart(struct watchdog_device *wdev, 51 unsigned long action, void *data) 52 { 53 struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev); 54 void __iomem *base = priv->base; 55 56 writel(WDT_STOP, base + WDT_CTRL); 57 writel(WDT_UNLOCK, base + WDT_CTRL); 58 writel(0x0001, base + WDT_CNT); 59 writel(WDT_LOCK, base + WDT_CTRL); 60 writel(WDT_RESUME, base + WDT_CTRL); 61 62 return 0; 63 } 64 65 static int sp_wdt_ping(struct watchdog_device *wdev) 66 { 67 struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev); 68 void __iomem *base = priv->base; 69 u32 count; 70 71 if (wdev->timeout > SP_WDT_MAX_TIMEOUT) { 72 /* WDT_CONMAX sets the count to the maximum (down-counting). */ 73 writel(WDT_CONMAX, base + WDT_CTRL); 74 } else { 75 writel(WDT_UNLOCK, base + WDT_CTRL); 76 /* 77 * Watchdog timer is a 20-bit down-counting based on STC_CLK. 78 * This register bits[16:0] is from bit[19:4] of the watchdog 79 * timer counter. 80 */ 81 count = (wdev->timeout * STC_CLK) >> 4; 82 writel(count, base + WDT_CNT); 83 writel(WDT_LOCK, base + WDT_CTRL); 84 } 85 86 return 0; 87 } 88 89 static int sp_wdt_stop(struct watchdog_device *wdev) 90 { 91 struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev); 92 void __iomem *base = priv->base; 93 94 writel(WDT_STOP, base + WDT_CTRL); 95 96 return 0; 97 } 98 99 static int sp_wdt_start(struct watchdog_device *wdev) 100 { 101 struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev); 102 void __iomem *base = priv->base; 103 104 writel(WDT_RESUME, base + WDT_CTRL); 105 106 return 0; 107 } 108 109 static unsigned int sp_wdt_get_timeleft(struct watchdog_device *wdev) 110 { 111 struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev); 112 void __iomem *base = priv->base; 113 u32 val; 114 115 val = readl(base + WDT_CNT); 116 val &= 0xffff; 117 val = val << 4; 118 119 return val; 120 } 121 122 static const struct watchdog_info sp_wdt_info = { 123 .identity = DEVICE_NAME, 124 .options = WDIOF_SETTIMEOUT | 125 WDIOF_MAGICCLOSE | 126 WDIOF_KEEPALIVEPING, 127 }; 128 129 static const struct watchdog_ops sp_wdt_ops = { 130 .owner = THIS_MODULE, 131 .start = sp_wdt_start, 132 .stop = sp_wdt_stop, 133 .ping = sp_wdt_ping, 134 .get_timeleft = sp_wdt_get_timeleft, 135 .restart = sp_wdt_restart, 136 }; 137 138 static void sp_reset_control_assert(void *data) 139 { 140 reset_control_assert(data); 141 } 142 143 static int sp_wdt_probe(struct platform_device *pdev) 144 { 145 struct device *dev = &pdev->dev; 146 struct sp_wdt_priv *priv; 147 int ret; 148 149 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 150 if (!priv) 151 return -ENOMEM; 152 153 priv->clk = devm_clk_get_enabled(dev, NULL); 154 if (IS_ERR(priv->clk)) 155 return dev_err_probe(dev, PTR_ERR(priv->clk), "Failed to enable clock\n"); 156 157 /* The timer and watchdog shared the STC reset */ 158 priv->rstc = devm_reset_control_get_shared(dev, NULL); 159 if (IS_ERR(priv->rstc)) 160 return dev_err_probe(dev, PTR_ERR(priv->rstc), "Failed to get reset\n"); 161 162 reset_control_deassert(priv->rstc); 163 164 ret = devm_add_action_or_reset(dev, sp_reset_control_assert, priv->rstc); 165 if (ret) 166 return ret; 167 168 priv->base = devm_platform_ioremap_resource(pdev, 0); 169 if (IS_ERR(priv->base)) 170 return PTR_ERR(priv->base); 171 172 priv->wdev.info = &sp_wdt_info; 173 priv->wdev.ops = &sp_wdt_ops; 174 priv->wdev.timeout = SP_WDT_DEFAULT_TIMEOUT; 175 priv->wdev.max_hw_heartbeat_ms = SP_WDT_MAX_TIMEOUT * 1000; 176 priv->wdev.min_timeout = 1; 177 priv->wdev.parent = dev; 178 179 watchdog_set_drvdata(&priv->wdev, priv); 180 watchdog_init_timeout(&priv->wdev, timeout, dev); 181 watchdog_set_nowayout(&priv->wdev, nowayout); 182 watchdog_stop_on_reboot(&priv->wdev); 183 watchdog_set_restart_priority(&priv->wdev, 128); 184 185 return devm_watchdog_register_device(dev, &priv->wdev); 186 } 187 188 static const struct of_device_id sp_wdt_of_match[] = { 189 {.compatible = "sunplus,sp7021-wdt", }, 190 { /* sentinel */ } 191 }; 192 MODULE_DEVICE_TABLE(of, sp_wdt_of_match); 193 194 static struct platform_driver sp_wdt_driver = { 195 .probe = sp_wdt_probe, 196 .driver = { 197 .name = DEVICE_NAME, 198 .of_match_table = sp_wdt_of_match, 199 }, 200 }; 201 202 module_platform_driver(sp_wdt_driver); 203 204 MODULE_AUTHOR("Xiantao Hu <xt.hu@cqplus1.com>"); 205 MODULE_DESCRIPTION("Sunplus Watchdog Timer Driver"); 206 MODULE_LICENSE("GPL"); 207