xref: /linux/drivers/watchdog/sp805_wdt.c (revision 26b0d14106954ae46d2f4f7eec3481828a210f7d) 
1 /*
2  * drivers/char/watchdog/sp805-wdt.c
3  *
4  * Watchdog driver for ARM SP805 watchdog module
5  *
6  * Copyright (C) 2010 ST Microelectronics
7  * Viresh Kumar <viresh.linux@gmail.com>
8  *
9  * This file is licensed under the terms of the GNU General Public
10  * License version 2 or later. This program is licensed "as is" without any
11  * warranty of any kind, whether express or implied.
12  */
13 
14 #include <linux/device.h>
15 #include <linux/resource.h>
16 #include <linux/amba/bus.h>
17 #include <linux/bitops.h>
18 #include <linux/clk.h>
19 #include <linux/init.h>
20 #include <linux/io.h>
21 #include <linux/ioport.h>
22 #include <linux/kernel.h>
23 #include <linux/math64.h>
24 #include <linux/module.h>
25 #include <linux/moduleparam.h>
26 #include <linux/pm.h>
27 #include <linux/slab.h>
28 #include <linux/spinlock.h>
29 #include <linux/types.h>
30 #include <linux/watchdog.h>
31 
32 /* default timeout in seconds */
33 #define DEFAULT_TIMEOUT		60
34 
35 #define MODULE_NAME		"sp805-wdt"
36 
37 /* watchdog register offsets and masks */
38 #define WDTLOAD			0x000
39 	#define LOAD_MIN	0x00000001
40 	#define LOAD_MAX	0xFFFFFFFF
41 #define WDTVALUE		0x004
42 #define WDTCONTROL		0x008
43 	/* control register masks */
44 	#define	INT_ENABLE	(1 << 0)
45 	#define	RESET_ENABLE	(1 << 1)
46 #define WDTINTCLR		0x00C
47 #define WDTRIS			0x010
48 #define WDTMIS			0x014
49 	#define INT_MASK	(1 << 0)
50 #define WDTLOCK			0xC00
51 	#define	UNLOCK		0x1ACCE551
52 	#define	LOCK		0x00000001
53 
54 /**
55  * struct sp805_wdt: sp805 wdt device structure
56  * @wdd: instance of struct watchdog_device
57  * @lock: spin lock protecting dev structure and io access
58  * @base: base address of wdt
59  * @clk: clock structure of wdt
60  * @adev: amba device structure of wdt
61  * @status: current status of wdt
62  * @load_val: load value to be set for current timeout
63  * @timeout: current programmed timeout
64  */
65 struct sp805_wdt {
66 	struct watchdog_device		wdd;
67 	spinlock_t			lock;
68 	void __iomem			*base;
69 	struct clk			*clk;
70 	struct amba_device		*adev;
71 	unsigned int			load_val;
72 	unsigned int			timeout;
73 };
74 
75 static bool nowayout = WATCHDOG_NOWAYOUT;
76 module_param(nowayout, bool, 0);
77 MODULE_PARM_DESC(nowayout,
78 		"Set to 1 to keep watchdog running after device release");
79 
80 /* This routine finds load value that will reset system in required timout */
81 static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
82 {
83 	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
84 	u64 load, rate;
85 
86 	rate = clk_get_rate(wdt->clk);
87 
88 	/*
89 	 * sp805 runs counter with given value twice, after the end of first
90 	 * counter it gives an interrupt and then starts counter again. If
91 	 * interrupt already occurred then it resets the system. This is why
92 	 * load is half of what should be required.
93 	 */
94 	load = div_u64(rate, 2) * timeout - 1;
95 
96 	load = (load > LOAD_MAX) ? LOAD_MAX : load;
97 	load = (load < LOAD_MIN) ? LOAD_MIN : load;
98 
99 	spin_lock(&wdt->lock);
100 	wdt->load_val = load;
101 	/* roundup timeout to closest positive integer value */
102 	wdt->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
103 	spin_unlock(&wdt->lock);
104 
105 	return 0;
106 }
107 
108 /* returns number of seconds left for reset to occur */
109 static unsigned int wdt_timeleft(struct watchdog_device *wdd)
110 {
111 	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
112 	u64 load, rate;
113 
114 	rate = clk_get_rate(wdt->clk);
115 
116 	spin_lock(&wdt->lock);
117 	load = readl_relaxed(wdt->base + WDTVALUE);
118 
119 	/*If the interrupt is inactive then time left is WDTValue + WDTLoad. */
120 	if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK))
121 		load += wdt->load_val + 1;
122 	spin_unlock(&wdt->lock);
123 
124 	return div_u64(load, rate);
125 }
126 
127 static int wdt_config(struct watchdog_device *wdd, bool ping)
128 {
129 	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
130 	int ret;
131 
132 	if (!ping) {
133 		ret = clk_prepare(wdt->clk);
134 		if (ret) {
135 			dev_err(&wdt->adev->dev, "clock prepare fail");
136 			return ret;
137 		}
138 
139 		ret = clk_enable(wdt->clk);
140 		if (ret) {
141 			dev_err(&wdt->adev->dev, "clock enable fail");
142 			clk_unprepare(wdt->clk);
143 			return ret;
144 		}
145 	}
146 
147 	spin_lock(&wdt->lock);
148 
149 	writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
150 	writel_relaxed(wdt->load_val, wdt->base + WDTLOAD);
151 
152 	if (!ping) {
153 		writel_relaxed(INT_MASK, wdt->base + WDTINTCLR);
154 		writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base +
155 				WDTCONTROL);
156 	}
157 
158 	writel_relaxed(LOCK, wdt->base + WDTLOCK);
159 
160 	/* Flush posted writes. */
161 	readl_relaxed(wdt->base + WDTLOCK);
162 	spin_unlock(&wdt->lock);
163 
164 	return 0;
165 }
166 
167 static int wdt_ping(struct watchdog_device *wdd)
168 {
169 	return wdt_config(wdd, true);
170 }
171 
172 /* enables watchdog timers reset */
173 static int wdt_enable(struct watchdog_device *wdd)
174 {
175 	return wdt_config(wdd, false);
176 }
177 
178 /* disables watchdog timers reset */
179 static int wdt_disable(struct watchdog_device *wdd)
180 {
181 	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
182 
183 	spin_lock(&wdt->lock);
184 
185 	writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
186 	writel_relaxed(0, wdt->base + WDTCONTROL);
187 	writel_relaxed(LOCK, wdt->base + WDTLOCK);
188 
189 	/* Flush posted writes. */
190 	readl_relaxed(wdt->base + WDTLOCK);
191 	spin_unlock(&wdt->lock);
192 
193 	clk_disable(wdt->clk);
194 	clk_unprepare(wdt->clk);
195 
196 	return 0;
197 }
198 
199 static const struct watchdog_info wdt_info = {
200 	.options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
201 	.identity = MODULE_NAME,
202 };
203 
204 static const struct watchdog_ops wdt_ops = {
205 	.owner		= THIS_MODULE,
206 	.start		= wdt_enable,
207 	.stop		= wdt_disable,
208 	.ping		= wdt_ping,
209 	.set_timeout	= wdt_setload,
210 	.get_timeleft	= wdt_timeleft,
211 };
212 
213 static int __devinit
214 sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
215 {
216 	struct sp805_wdt *wdt;
217 	int ret = 0;
218 
219 	if (!devm_request_mem_region(&adev->dev, adev->res.start,
220 				resource_size(&adev->res), "sp805_wdt")) {
221 		dev_warn(&adev->dev, "Failed to get memory region resource\n");
222 		ret = -ENOENT;
223 		goto err;
224 	}
225 
226 	wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL);
227 	if (!wdt) {
228 		dev_warn(&adev->dev, "Kzalloc failed\n");
229 		ret = -ENOMEM;
230 		goto err;
231 	}
232 
233 	wdt->base = devm_ioremap(&adev->dev, adev->res.start,
234 			resource_size(&adev->res));
235 	if (!wdt->base) {
236 		ret = -ENOMEM;
237 		dev_warn(&adev->dev, "ioremap fail\n");
238 		goto err;
239 	}
240 
241 	wdt->clk = clk_get(&adev->dev, NULL);
242 	if (IS_ERR(wdt->clk)) {
243 		dev_warn(&adev->dev, "Clock not found\n");
244 		ret = PTR_ERR(wdt->clk);
245 		goto err;
246 	}
247 
248 	wdt->adev = adev;
249 	wdt->wdd.info = &wdt_info;
250 	wdt->wdd.ops = &wdt_ops;
251 
252 	spin_lock_init(&wdt->lock);
253 	watchdog_set_nowayout(&wdt->wdd, nowayout);
254 	watchdog_set_drvdata(&wdt->wdd, wdt);
255 	wdt_setload(&wdt->wdd, DEFAULT_TIMEOUT);
256 
257 	ret = watchdog_register_device(&wdt->wdd);
258 	if (ret) {
259 		dev_err(&adev->dev, "watchdog_register_device() failed: %d\n",
260 				ret);
261 		goto err_register;
262 	}
263 	amba_set_drvdata(adev, wdt);
264 
265 	dev_info(&adev->dev, "registration successful\n");
266 	return 0;
267 
268 err_register:
269 	clk_put(wdt->clk);
270 err:
271 	dev_err(&adev->dev, "Probe Failed!!!\n");
272 	return ret;
273 }
274 
275 static int __devexit sp805_wdt_remove(struct amba_device *adev)
276 {
277 	struct sp805_wdt *wdt = amba_get_drvdata(adev);
278 
279 	watchdog_unregister_device(&wdt->wdd);
280 	amba_set_drvdata(adev, NULL);
281 	watchdog_set_drvdata(&wdt->wdd, NULL);
282 	clk_put(wdt->clk);
283 
284 	return 0;
285 }
286 
287 #ifdef CONFIG_PM
288 static int sp805_wdt_suspend(struct device *dev)
289 {
290 	struct sp805_wdt *wdt = dev_get_drvdata(dev);
291 
292 	if (watchdog_active(&wdt->wdd))
293 		return wdt_disable(&wdt->wdd);
294 
295 	return 0;
296 }
297 
298 static int sp805_wdt_resume(struct device *dev)
299 {
300 	struct sp805_wdt *wdt = dev_get_drvdata(dev);
301 
302 	if (watchdog_active(&wdt->wdd))
303 		return wdt_enable(&wdt->wdd);
304 
305 	return 0;
306 }
307 #endif /* CONFIG_PM */
308 
309 static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend,
310 		sp805_wdt_resume);
311 
312 static struct amba_id sp805_wdt_ids[] = {
313 	{
314 		.id	= 0x00141805,
315 		.mask	= 0x00ffffff,
316 	},
317 	{ 0, 0 },
318 };
319 
320 MODULE_DEVICE_TABLE(amba, sp805_wdt_ids);
321 
322 static struct amba_driver sp805_wdt_driver = {
323 	.drv = {
324 		.name	= MODULE_NAME,
325 		.pm	= &sp805_wdt_dev_pm_ops,
326 	},
327 	.id_table	= sp805_wdt_ids,
328 	.probe		= sp805_wdt_probe,
329 	.remove = __devexit_p(sp805_wdt_remove),
330 };
331 
332 module_amba_driver(sp805_wdt_driver);
333 
334 MODULE_AUTHOR("Viresh Kumar <viresh.linux@gmail.com>");
335 MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
336 MODULE_LICENSE("GPL");
337