1 /* 2 * omap_wdt.c 3 * 4 * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog 5 * 6 * Author: MontaVista Software, Inc. 7 * <gdavis@mvista.com> or <source@mvista.com> 8 * 9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the 10 * terms of the GNU General Public License version 2. This program is 11 * licensed "as is" without any warranty of any kind, whether express 12 * or implied. 13 * 14 * History: 15 * 16 * 20030527: George G. Davis <gdavis@mvista.com> 17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c 18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu> 19 * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk> 20 * 21 * Copyright (c) 2004 Texas Instruments. 22 * 1. Modified to support OMAP1610 32-KHz watchdog timer 23 * 2. Ported to 2.6 kernel 24 * 25 * Copyright (c) 2005 David Brownell 26 * Use the driver model and standard identifiers; handle bigger timeouts. 27 */ 28 29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 30 31 #include <linux/module.h> 32 #include <linux/types.h> 33 #include <linux/kernel.h> 34 #include <linux/fs.h> 35 #include <linux/mm.h> 36 #include <linux/miscdevice.h> 37 #include <linux/watchdog.h> 38 #include <linux/reboot.h> 39 #include <linux/init.h> 40 #include <linux/err.h> 41 #include <linux/platform_device.h> 42 #include <linux/moduleparam.h> 43 #include <linux/bitops.h> 44 #include <linux/io.h> 45 #include <linux/uaccess.h> 46 #include <linux/slab.h> 47 #include <linux/pm_runtime.h> 48 #include <linux/platform_data/omap-wd-timer.h> 49 50 #include "omap_wdt.h" 51 52 static struct platform_device *omap_wdt_dev; 53 54 static unsigned timer_margin; 55 module_param(timer_margin, uint, 0); 56 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)"); 57 58 static unsigned int wdt_trgr_pattern = 0x1234; 59 static DEFINE_SPINLOCK(wdt_lock); 60 61 struct omap_wdt_dev { 62 void __iomem *base; /* physical */ 63 struct device *dev; 64 int omap_wdt_users; 65 struct resource *mem; 66 struct miscdevice omap_wdt_miscdev; 67 }; 68 69 static void omap_wdt_ping(struct omap_wdt_dev *wdev) 70 { 71 void __iomem *base = wdev->base; 72 73 /* wait for posted write to complete */ 74 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08) 75 cpu_relax(); 76 77 wdt_trgr_pattern = ~wdt_trgr_pattern; 78 __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR)); 79 80 /* wait for posted write to complete */ 81 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08) 82 cpu_relax(); 83 /* reloaded WCRR from WLDR */ 84 } 85 86 static void omap_wdt_enable(struct omap_wdt_dev *wdev) 87 { 88 void __iomem *base = wdev->base; 89 90 /* Sequence to enable the watchdog */ 91 __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR); 92 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10) 93 cpu_relax(); 94 95 __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR); 96 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10) 97 cpu_relax(); 98 } 99 100 static void omap_wdt_disable(struct omap_wdt_dev *wdev) 101 { 102 void __iomem *base = wdev->base; 103 104 /* sequence required to disable watchdog */ 105 __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */ 106 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10) 107 cpu_relax(); 108 109 __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */ 110 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10) 111 cpu_relax(); 112 } 113 114 static void omap_wdt_adjust_timeout(unsigned new_timeout) 115 { 116 if (new_timeout < TIMER_MARGIN_MIN) 117 new_timeout = TIMER_MARGIN_DEFAULT; 118 if (new_timeout > TIMER_MARGIN_MAX) 119 new_timeout = TIMER_MARGIN_MAX; 120 timer_margin = new_timeout; 121 } 122 123 static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev) 124 { 125 u32 pre_margin = GET_WLDR_VAL(timer_margin); 126 void __iomem *base = wdev->base; 127 128 /* just count up at 32 KHz */ 129 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04) 130 cpu_relax(); 131 132 __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR); 133 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04) 134 cpu_relax(); 135 } 136 137 /* 138 * Allow only one task to hold it open 139 */ 140 static int omap_wdt_open(struct inode *inode, struct file *file) 141 { 142 struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev); 143 void __iomem *base = wdev->base; 144 145 if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users))) 146 return -EBUSY; 147 148 pm_runtime_get_sync(wdev->dev); 149 150 /* initialize prescaler */ 151 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01) 152 cpu_relax(); 153 154 __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL); 155 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01) 156 cpu_relax(); 157 158 file->private_data = (void *) wdev; 159 160 omap_wdt_set_timeout(wdev); 161 omap_wdt_ping(wdev); /* trigger loading of new timeout value */ 162 omap_wdt_enable(wdev); 163 164 return nonseekable_open(inode, file); 165 } 166 167 static int omap_wdt_release(struct inode *inode, struct file *file) 168 { 169 struct omap_wdt_dev *wdev = file->private_data; 170 171 /* 172 * Shut off the timer unless NOWAYOUT is defined. 173 */ 174 #ifndef CONFIG_WATCHDOG_NOWAYOUT 175 omap_wdt_disable(wdev); 176 177 pm_runtime_put_sync(wdev->dev); 178 #else 179 pr_crit("Unexpected close, not stopping!\n"); 180 #endif 181 wdev->omap_wdt_users = 0; 182 183 return 0; 184 } 185 186 static ssize_t omap_wdt_write(struct file *file, const char __user *data, 187 size_t len, loff_t *ppos) 188 { 189 struct omap_wdt_dev *wdev = file->private_data; 190 191 /* Refresh LOAD_TIME. */ 192 if (len) { 193 spin_lock(&wdt_lock); 194 omap_wdt_ping(wdev); 195 spin_unlock(&wdt_lock); 196 } 197 return len; 198 } 199 200 static long omap_wdt_ioctl(struct file *file, unsigned int cmd, 201 unsigned long arg) 202 { 203 struct omap_wd_timer_platform_data *pdata; 204 struct omap_wdt_dev *wdev; 205 u32 rs; 206 int new_margin, bs; 207 static const struct watchdog_info ident = { 208 .identity = "OMAP Watchdog", 209 .options = WDIOF_SETTIMEOUT, 210 .firmware_version = 0, 211 }; 212 213 wdev = file->private_data; 214 pdata = wdev->dev->platform_data; 215 216 switch (cmd) { 217 case WDIOC_GETSUPPORT: 218 return copy_to_user((struct watchdog_info __user *)arg, &ident, 219 sizeof(ident)); 220 case WDIOC_GETSTATUS: 221 return put_user(0, (int __user *)arg); 222 case WDIOC_GETBOOTSTATUS: 223 if (!pdata || !pdata->read_reset_sources) 224 return put_user(0, (int __user *)arg); 225 rs = pdata->read_reset_sources(); 226 bs = (rs & (1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT)) ? 227 WDIOF_CARDRESET : 0; 228 return put_user(bs, (int __user *)arg); 229 case WDIOC_KEEPALIVE: 230 spin_lock(&wdt_lock); 231 omap_wdt_ping(wdev); 232 spin_unlock(&wdt_lock); 233 return 0; 234 case WDIOC_SETTIMEOUT: 235 if (get_user(new_margin, (int __user *)arg)) 236 return -EFAULT; 237 omap_wdt_adjust_timeout(new_margin); 238 239 spin_lock(&wdt_lock); 240 omap_wdt_disable(wdev); 241 omap_wdt_set_timeout(wdev); 242 omap_wdt_enable(wdev); 243 244 omap_wdt_ping(wdev); 245 spin_unlock(&wdt_lock); 246 /* Fall */ 247 case WDIOC_GETTIMEOUT: 248 return put_user(timer_margin, (int __user *)arg); 249 default: 250 return -ENOTTY; 251 } 252 } 253 254 static const struct file_operations omap_wdt_fops = { 255 .owner = THIS_MODULE, 256 .write = omap_wdt_write, 257 .unlocked_ioctl = omap_wdt_ioctl, 258 .open = omap_wdt_open, 259 .release = omap_wdt_release, 260 .llseek = no_llseek, 261 }; 262 263 static int omap_wdt_probe(struct platform_device *pdev) 264 { 265 struct resource *res, *mem; 266 struct omap_wdt_dev *wdev; 267 int ret; 268 269 /* reserve static register mappings */ 270 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 271 if (!res) { 272 ret = -ENOENT; 273 goto err_get_resource; 274 } 275 276 if (omap_wdt_dev) { 277 ret = -EBUSY; 278 goto err_busy; 279 } 280 281 mem = request_mem_region(res->start, resource_size(res), pdev->name); 282 if (!mem) { 283 ret = -EBUSY; 284 goto err_busy; 285 } 286 287 wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL); 288 if (!wdev) { 289 ret = -ENOMEM; 290 goto err_kzalloc; 291 } 292 293 wdev->omap_wdt_users = 0; 294 wdev->mem = mem; 295 wdev->dev = &pdev->dev; 296 297 wdev->base = ioremap(res->start, resource_size(res)); 298 if (!wdev->base) { 299 ret = -ENOMEM; 300 goto err_ioremap; 301 } 302 303 platform_set_drvdata(pdev, wdev); 304 305 pm_runtime_enable(wdev->dev); 306 pm_runtime_get_sync(wdev->dev); 307 308 omap_wdt_disable(wdev); 309 omap_wdt_adjust_timeout(timer_margin); 310 311 wdev->omap_wdt_miscdev.parent = &pdev->dev; 312 wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR; 313 wdev->omap_wdt_miscdev.name = "watchdog"; 314 wdev->omap_wdt_miscdev.fops = &omap_wdt_fops; 315 316 ret = misc_register(&(wdev->omap_wdt_miscdev)); 317 if (ret) 318 goto err_misc; 319 320 pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n", 321 __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF, 322 timer_margin); 323 324 pm_runtime_put_sync(wdev->dev); 325 326 omap_wdt_dev = pdev; 327 328 return 0; 329 330 err_misc: 331 pm_runtime_disable(wdev->dev); 332 platform_set_drvdata(pdev, NULL); 333 iounmap(wdev->base); 334 335 err_ioremap: 336 wdev->base = NULL; 337 kfree(wdev); 338 339 err_kzalloc: 340 release_mem_region(res->start, resource_size(res)); 341 342 err_busy: 343 err_get_resource: 344 345 return ret; 346 } 347 348 static void omap_wdt_shutdown(struct platform_device *pdev) 349 { 350 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); 351 352 if (wdev->omap_wdt_users) { 353 omap_wdt_disable(wdev); 354 pm_runtime_put_sync(wdev->dev); 355 } 356 } 357 358 static int omap_wdt_remove(struct platform_device *pdev) 359 { 360 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); 361 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 362 363 pm_runtime_disable(wdev->dev); 364 if (!res) 365 return -ENOENT; 366 367 misc_deregister(&(wdev->omap_wdt_miscdev)); 368 release_mem_region(res->start, resource_size(res)); 369 platform_set_drvdata(pdev, NULL); 370 371 iounmap(wdev->base); 372 373 kfree(wdev); 374 omap_wdt_dev = NULL; 375 376 return 0; 377 } 378 379 #ifdef CONFIG_PM 380 381 /* REVISIT ... not clear this is the best way to handle system suspend; and 382 * it's very inappropriate for selective device suspend (e.g. suspending this 383 * through sysfs rather than by stopping the watchdog daemon). Also, this 384 * may not play well enough with NOWAYOUT... 385 */ 386 387 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state) 388 { 389 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); 390 391 if (wdev->omap_wdt_users) { 392 omap_wdt_disable(wdev); 393 pm_runtime_put_sync(wdev->dev); 394 } 395 396 return 0; 397 } 398 399 static int omap_wdt_resume(struct platform_device *pdev) 400 { 401 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); 402 403 if (wdev->omap_wdt_users) { 404 pm_runtime_get_sync(wdev->dev); 405 omap_wdt_enable(wdev); 406 omap_wdt_ping(wdev); 407 } 408 409 return 0; 410 } 411 412 #else 413 #define omap_wdt_suspend NULL 414 #define omap_wdt_resume NULL 415 #endif 416 417 static const struct of_device_id omap_wdt_of_match[] = { 418 { .compatible = "ti,omap3-wdt", }, 419 {}, 420 }; 421 MODULE_DEVICE_TABLE(of, omap_wdt_of_match); 422 423 static struct platform_driver omap_wdt_driver = { 424 .probe = omap_wdt_probe, 425 .remove = omap_wdt_remove, 426 .shutdown = omap_wdt_shutdown, 427 .suspend = omap_wdt_suspend, 428 .resume = omap_wdt_resume, 429 .driver = { 430 .owner = THIS_MODULE, 431 .name = "omap_wdt", 432 .of_match_table = omap_wdt_of_match, 433 }, 434 }; 435 436 module_platform_driver(omap_wdt_driver); 437 438 MODULE_AUTHOR("George G. Davis"); 439 MODULE_LICENSE("GPL"); 440 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); 441 MODULE_ALIAS("platform:omap_wdt"); 442