1 /* 2 * Copyright (C) 2010, Paul Cercueil <paul@crapouillou.net> 3 * JZ4740 Watchdog driver 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License as published by the 7 * Free Software Foundation; either version 2 of the License, or (at your 8 * option) any later version. 9 * 10 * You should have received a copy of the GNU General Public License along 11 * with this program; if not, write to the Free Software Foundation, Inc., 12 * 675 Mass Ave, Cambridge, MA 02139, USA. 13 * 14 */ 15 16 #include <linux/module.h> 17 #include <linux/moduleparam.h> 18 #include <linux/types.h> 19 #include <linux/kernel.h> 20 #include <linux/miscdevice.h> 21 #include <linux/watchdog.h> 22 #include <linux/init.h> 23 #include <linux/platform_device.h> 24 #include <linux/io.h> 25 #include <linux/device.h> 26 #include <linux/clk.h> 27 #include <linux/slab.h> 28 #include <linux/err.h> 29 30 #include <asm/mach-jz4740/timer.h> 31 32 #define JZ_REG_WDT_TIMER_DATA 0x0 33 #define JZ_REG_WDT_COUNTER_ENABLE 0x4 34 #define JZ_REG_WDT_TIMER_COUNTER 0x8 35 #define JZ_REG_WDT_TIMER_CONTROL 0xC 36 37 #define JZ_WDT_CLOCK_PCLK 0x1 38 #define JZ_WDT_CLOCK_RTC 0x2 39 #define JZ_WDT_CLOCK_EXT 0x4 40 41 #define JZ_WDT_CLOCK_DIV_SHIFT 3 42 43 #define JZ_WDT_CLOCK_DIV_1 (0 << JZ_WDT_CLOCK_DIV_SHIFT) 44 #define JZ_WDT_CLOCK_DIV_4 (1 << JZ_WDT_CLOCK_DIV_SHIFT) 45 #define JZ_WDT_CLOCK_DIV_16 (2 << JZ_WDT_CLOCK_DIV_SHIFT) 46 #define JZ_WDT_CLOCK_DIV_64 (3 << JZ_WDT_CLOCK_DIV_SHIFT) 47 #define JZ_WDT_CLOCK_DIV_256 (4 << JZ_WDT_CLOCK_DIV_SHIFT) 48 #define JZ_WDT_CLOCK_DIV_1024 (5 << JZ_WDT_CLOCK_DIV_SHIFT) 49 50 #define DEFAULT_HEARTBEAT 5 51 #define MAX_HEARTBEAT 2048 52 53 static bool nowayout = WATCHDOG_NOWAYOUT; 54 module_param(nowayout, bool, 0); 55 MODULE_PARM_DESC(nowayout, 56 "Watchdog cannot be stopped once started (default=" 57 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 58 59 static unsigned int heartbeat = DEFAULT_HEARTBEAT; 60 module_param(heartbeat, uint, 0); 61 MODULE_PARM_DESC(heartbeat, 62 "Watchdog heartbeat period in seconds from 1 to " 63 __MODULE_STRING(MAX_HEARTBEAT) ", default " 64 __MODULE_STRING(DEFAULT_HEARTBEAT)); 65 66 struct jz4740_wdt_drvdata { 67 struct watchdog_device wdt; 68 void __iomem *base; 69 struct clk *rtc_clk; 70 }; 71 72 static int jz4740_wdt_ping(struct watchdog_device *wdt_dev) 73 { 74 struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); 75 76 writew(0x0, drvdata->base + JZ_REG_WDT_TIMER_COUNTER); 77 return 0; 78 } 79 80 static int jz4740_wdt_set_timeout(struct watchdog_device *wdt_dev, 81 unsigned int new_timeout) 82 { 83 struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); 84 unsigned int rtc_clk_rate; 85 unsigned int timeout_value; 86 unsigned short clock_div = JZ_WDT_CLOCK_DIV_1; 87 88 rtc_clk_rate = clk_get_rate(drvdata->rtc_clk); 89 90 timeout_value = rtc_clk_rate * new_timeout; 91 while (timeout_value > 0xffff) { 92 if (clock_div == JZ_WDT_CLOCK_DIV_1024) { 93 /* Requested timeout too high; 94 * use highest possible value. */ 95 timeout_value = 0xffff; 96 break; 97 } 98 timeout_value >>= 2; 99 clock_div += (1 << JZ_WDT_CLOCK_DIV_SHIFT); 100 } 101 102 writeb(0x0, drvdata->base + JZ_REG_WDT_COUNTER_ENABLE); 103 writew(clock_div, drvdata->base + JZ_REG_WDT_TIMER_CONTROL); 104 105 writew((u16)timeout_value, drvdata->base + JZ_REG_WDT_TIMER_DATA); 106 writew(0x0, drvdata->base + JZ_REG_WDT_TIMER_COUNTER); 107 writew(clock_div | JZ_WDT_CLOCK_RTC, 108 drvdata->base + JZ_REG_WDT_TIMER_CONTROL); 109 110 writeb(0x1, drvdata->base + JZ_REG_WDT_COUNTER_ENABLE); 111 112 wdt_dev->timeout = new_timeout; 113 return 0; 114 } 115 116 static int jz4740_wdt_start(struct watchdog_device *wdt_dev) 117 { 118 jz4740_timer_enable_watchdog(); 119 jz4740_wdt_set_timeout(wdt_dev, wdt_dev->timeout); 120 121 return 0; 122 } 123 124 static int jz4740_wdt_stop(struct watchdog_device *wdt_dev) 125 { 126 struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); 127 128 jz4740_timer_disable_watchdog(); 129 writeb(0x0, drvdata->base + JZ_REG_WDT_COUNTER_ENABLE); 130 131 return 0; 132 } 133 134 static const struct watchdog_info jz4740_wdt_info = { 135 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, 136 .identity = "jz4740 Watchdog", 137 }; 138 139 static const struct watchdog_ops jz4740_wdt_ops = { 140 .owner = THIS_MODULE, 141 .start = jz4740_wdt_start, 142 .stop = jz4740_wdt_stop, 143 .ping = jz4740_wdt_ping, 144 .set_timeout = jz4740_wdt_set_timeout, 145 }; 146 147 static int jz4740_wdt_probe(struct platform_device *pdev) 148 { 149 struct jz4740_wdt_drvdata *drvdata; 150 struct watchdog_device *jz4740_wdt; 151 struct resource *res; 152 int ret; 153 154 drvdata = devm_kzalloc(&pdev->dev, sizeof(struct jz4740_wdt_drvdata), 155 GFP_KERNEL); 156 if (!drvdata) { 157 dev_err(&pdev->dev, "Unable to alloacate watchdog device\n"); 158 return -ENOMEM; 159 } 160 161 if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT) 162 heartbeat = DEFAULT_HEARTBEAT; 163 164 jz4740_wdt = &drvdata->wdt; 165 jz4740_wdt->info = &jz4740_wdt_info; 166 jz4740_wdt->ops = &jz4740_wdt_ops; 167 jz4740_wdt->timeout = heartbeat; 168 jz4740_wdt->min_timeout = 1; 169 jz4740_wdt->max_timeout = MAX_HEARTBEAT; 170 watchdog_set_nowayout(jz4740_wdt, nowayout); 171 watchdog_set_drvdata(jz4740_wdt, drvdata); 172 173 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 174 drvdata->base = devm_ioremap_resource(&pdev->dev, res); 175 if (IS_ERR(drvdata->base)) { 176 ret = PTR_ERR(drvdata->base); 177 goto err_out; 178 } 179 180 drvdata->rtc_clk = clk_get(&pdev->dev, "rtc"); 181 if (IS_ERR(drvdata->rtc_clk)) { 182 dev_err(&pdev->dev, "cannot find RTC clock\n"); 183 ret = PTR_ERR(drvdata->rtc_clk); 184 goto err_out; 185 } 186 187 ret = watchdog_register_device(&drvdata->wdt); 188 if (ret < 0) 189 goto err_disable_clk; 190 191 platform_set_drvdata(pdev, drvdata); 192 return 0; 193 194 err_disable_clk: 195 clk_put(drvdata->rtc_clk); 196 err_out: 197 return ret; 198 } 199 200 static int jz4740_wdt_remove(struct platform_device *pdev) 201 { 202 struct jz4740_wdt_drvdata *drvdata = platform_get_drvdata(pdev); 203 204 jz4740_wdt_stop(&drvdata->wdt); 205 watchdog_unregister_device(&drvdata->wdt); 206 clk_put(drvdata->rtc_clk); 207 208 return 0; 209 } 210 211 static struct platform_driver jz4740_wdt_driver = { 212 .probe = jz4740_wdt_probe, 213 .remove = jz4740_wdt_remove, 214 .driver = { 215 .name = "jz4740-wdt", 216 .owner = THIS_MODULE, 217 }, 218 }; 219 220 module_platform_driver(jz4740_wdt_driver); 221 222 MODULE_AUTHOR("Paul Cercueil <paul@crapouillou.net>"); 223 MODULE_DESCRIPTION("jz4740 Watchdog Driver"); 224 MODULE_LICENSE("GPL"); 225 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); 226 MODULE_ALIAS("platform:jz4740-wdt"); 227