1 /* 2 * intel TCO vendor specific watchdog driver support 3 * 4 * (c) Copyright 2006-2009 Wim Van Sebroeck <wim@iguana.be>. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 * 11 * Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor 12 * provide warranty for any of this software. This material is 13 * provided "AS-IS" and at no charge. 14 */ 15 16 /* 17 * Includes, defines, variables, module parameters, ... 18 */ 19 20 /* Module and version information */ 21 #define DRV_NAME "iTCO_vendor_support" 22 #define DRV_VERSION "1.03" 23 #define PFX DRV_NAME ": " 24 25 /* Includes */ 26 #include <linux/module.h> /* For module specific items */ 27 #include <linux/moduleparam.h> /* For new moduleparam's */ 28 #include <linux/types.h> /* For standard types (like size_t) */ 29 #include <linux/errno.h> /* For the -ENODEV/... values */ 30 #include <linux/kernel.h> /* For printk/panic/... */ 31 #include <linux/init.h> /* For __init/__exit/... */ 32 #include <linux/ioport.h> /* For io-port access */ 33 #include <linux/io.h> /* For inb/outb/... */ 34 35 #include "iTCO_vendor.h" 36 37 /* iTCO defines */ 38 #define SMI_EN acpibase + 0x30 /* SMI Control and Enable Register */ 39 #define TCOBASE acpibase + 0x60 /* TCO base address */ 40 #define TCO1_STS TCOBASE + 0x04 /* TCO1 Status Register */ 41 42 /* List of vendor support modes */ 43 /* SuperMicro Pentium 3 Era 370SSE+-OEM1/P3TSSE */ 44 #define SUPERMICRO_OLD_BOARD 1 45 /* SuperMicro Pentium 4 / Xeon 4 / EMT64T Era Systems */ 46 #define SUPERMICRO_NEW_BOARD 2 47 48 static int vendorsupport; 49 module_param(vendorsupport, int, 0); 50 MODULE_PARM_DESC(vendorsupport, "iTCO vendor specific support mode, default=0 (none), 1=SuperMicro Pent3, 2=SuperMicro Pent4+"); 51 52 /* 53 * Vendor Specific Support 54 */ 55 56 /* 57 * Vendor Support: 1 58 * Board: Super Micro Computer Inc. 370SSE+-OEM1/P3TSSE 59 * iTCO chipset: ICH2 60 * 61 * Code contributed by: R. Seretny <lkpatches@paypc.com> 62 * Documentation obtained by R. Seretny from SuperMicro Technical Support 63 * 64 * To enable Watchdog function: 65 * BIOS setup -> Power -> TCO Logic SMI Enable -> Within5Minutes 66 * This setting enables SMI to clear the watchdog expired flag. 67 * If BIOS or CPU fail which may cause SMI hang, then system will 68 * reboot. When application starts to use watchdog function, 69 * application has to take over the control from SMI. 70 * 71 * For P3TSSE, J36 jumper needs to be removed to enable the Watchdog 72 * function. 73 * 74 * Note: The system will reboot when Expire Flag is set TWICE. 75 * So, if the watchdog timer is 20 seconds, then the maximum hang 76 * time is about 40 seconds, and the minimum hang time is about 77 * 20.6 seconds. 78 */ 79 80 static void supermicro_old_pre_start(unsigned long acpibase) 81 { 82 unsigned long val32; 83 84 /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */ 85 val32 = inl(SMI_EN); 86 val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */ 87 outl(val32, SMI_EN); /* Needed to activate watchdog */ 88 } 89 90 static void supermicro_old_pre_stop(unsigned long acpibase) 91 { 92 unsigned long val32; 93 94 /* Bit 13: TCO_EN -> 1 = Enables the TCO logic to generate SMI# */ 95 val32 = inl(SMI_EN); 96 val32 |= 0x00002000; /* Turn on SMI clearing watchdog */ 97 outl(val32, SMI_EN); /* Needed to deactivate watchdog */ 98 } 99 100 static void supermicro_old_pre_keepalive(unsigned long acpibase) 101 { 102 /* Reload TCO Timer (done in iTCO_wdt_keepalive) + */ 103 /* Clear "Expire Flag" (Bit 3 of TC01_STS register) */ 104 outb(0x08, TCO1_STS); 105 } 106 107 /* 108 * Vendor Support: 2 109 * Board: Super Micro Computer Inc. P4SBx, P4DPx 110 * iTCO chipset: ICH4 111 * 112 * Code contributed by: R. Seretny <lkpatches@paypc.com> 113 * Documentation obtained by R. Seretny from SuperMicro Technical Support 114 * 115 * To enable Watchdog function: 116 * 1. BIOS 117 * For P4SBx: 118 * BIOS setup -> Advanced -> Integrated Peripherals -> Watch Dog Feature 119 * For P4DPx: 120 * BIOS setup -> Advanced -> I/O Device Configuration -> Watch Dog 121 * This setting enables or disables Watchdog function. When enabled, the 122 * default watchdog timer is set to be 5 minutes (about 4m35s). It is 123 * enough to load and run the OS. The application (service or driver) has 124 * to take over the control once OS is running up and before watchdog 125 * expires. 126 * 127 * 2. JUMPER 128 * For P4SBx: JP39 129 * For P4DPx: JP37 130 * This jumper is used for safety. Closed is enabled. This jumper 131 * prevents user enables watchdog in BIOS by accident. 132 * 133 * To enable Watch Dog function, both BIOS and JUMPER must be enabled. 134 * 135 * The documentation lists motherboards P4SBx and P4DPx series as of 136 * 20-March-2002. However, this code works flawlessly with much newer 137 * motherboards, such as my X6DHR-8G2 (SuperServer 6014H-82). 138 * 139 * The original iTCO driver as written does not actually reset the 140 * watchdog timer on these machines, as a result they reboot after five 141 * minutes. 142 * 143 * NOTE: You may leave the Watchdog function disabled in the SuperMicro 144 * BIOS to avoid a "boot-race"... This driver will enable watchdog 145 * functionality even if it's disabled in the BIOS once the /dev/watchdog 146 * file is opened. 147 */ 148 149 /* I/O Port's */ 150 #define SM_REGINDEX 0x2e /* SuperMicro ICH4+ Register Index */ 151 #define SM_DATAIO 0x2f /* SuperMicro ICH4+ Register Data I/O */ 152 153 /* Control Register's */ 154 #define SM_CTLPAGESW 0x07 /* SuperMicro ICH4+ Control Page Switch */ 155 #define SM_CTLPAGE 0x08 /* SuperMicro ICH4+ Control Page Num */ 156 157 #define SM_WATCHENABLE 0x30 /* Watchdog enable: Bit 0: 0=off, 1=on */ 158 159 #define SM_WATCHPAGE 0x87 /* Watchdog unlock control page */ 160 161 #define SM_ENDWATCH 0xAA /* Watchdog lock control page */ 162 163 #define SM_COUNTMODE 0xf5 /* Watchdog count mode select */ 164 /* (Bit 3: 0 = seconds, 1 = minutes */ 165 166 #define SM_WATCHTIMER 0xf6 /* 8-bits, Watchdog timer counter (RW) */ 167 168 #define SM_RESETCONTROL 0xf7 /* Watchdog reset control */ 169 /* Bit 6: timer is reset by kbd interrupt */ 170 /* Bit 7: timer is reset by mouse interrupt */ 171 172 static void supermicro_new_unlock_watchdog(void) 173 { 174 /* Write 0x87 to port 0x2e twice */ 175 outb(SM_WATCHPAGE, SM_REGINDEX); 176 outb(SM_WATCHPAGE, SM_REGINDEX); 177 /* Switch to watchdog control page */ 178 outb(SM_CTLPAGESW, SM_REGINDEX); 179 outb(SM_CTLPAGE, SM_DATAIO); 180 } 181 182 static void supermicro_new_lock_watchdog(void) 183 { 184 outb(SM_ENDWATCH, SM_REGINDEX); 185 } 186 187 static void supermicro_new_pre_start(unsigned int heartbeat) 188 { 189 unsigned int val; 190 191 supermicro_new_unlock_watchdog(); 192 193 /* Watchdog timer setting needs to be in seconds*/ 194 outb(SM_COUNTMODE, SM_REGINDEX); 195 val = inb(SM_DATAIO); 196 val &= 0xF7; 197 outb(val, SM_DATAIO); 198 199 /* Write heartbeat interval to WDOG */ 200 outb(SM_WATCHTIMER, SM_REGINDEX); 201 outb((heartbeat & 255), SM_DATAIO); 202 203 /* Make sure keyboard/mouse interrupts don't interfere */ 204 outb(SM_RESETCONTROL, SM_REGINDEX); 205 val = inb(SM_DATAIO); 206 val &= 0x3f; 207 outb(val, SM_DATAIO); 208 209 /* enable watchdog by setting bit 0 of Watchdog Enable to 1 */ 210 outb(SM_WATCHENABLE, SM_REGINDEX); 211 val = inb(SM_DATAIO); 212 val |= 0x01; 213 outb(val, SM_DATAIO); 214 215 supermicro_new_lock_watchdog(); 216 } 217 218 static void supermicro_new_pre_stop(void) 219 { 220 unsigned int val; 221 222 supermicro_new_unlock_watchdog(); 223 224 /* disable watchdog by setting bit 0 of Watchdog Enable to 0 */ 225 outb(SM_WATCHENABLE, SM_REGINDEX); 226 val = inb(SM_DATAIO); 227 val &= 0xFE; 228 outb(val, SM_DATAIO); 229 230 supermicro_new_lock_watchdog(); 231 } 232 233 static void supermicro_new_pre_set_heartbeat(unsigned int heartbeat) 234 { 235 supermicro_new_unlock_watchdog(); 236 237 /* reset watchdog timeout to heartveat value */ 238 outb(SM_WATCHTIMER, SM_REGINDEX); 239 outb((heartbeat & 255), SM_DATAIO); 240 241 supermicro_new_lock_watchdog(); 242 } 243 244 /* 245 * Generic Support Functions 246 */ 247 248 void iTCO_vendor_pre_start(unsigned long acpibase, 249 unsigned int heartbeat) 250 { 251 if (vendorsupport == SUPERMICRO_OLD_BOARD) 252 supermicro_old_pre_start(acpibase); 253 else if (vendorsupport == SUPERMICRO_NEW_BOARD) 254 supermicro_new_pre_start(heartbeat); 255 } 256 EXPORT_SYMBOL(iTCO_vendor_pre_start); 257 258 void iTCO_vendor_pre_stop(unsigned long acpibase) 259 { 260 if (vendorsupport == SUPERMICRO_OLD_BOARD) 261 supermicro_old_pre_stop(acpibase); 262 else if (vendorsupport == SUPERMICRO_NEW_BOARD) 263 supermicro_new_pre_stop(); 264 } 265 EXPORT_SYMBOL(iTCO_vendor_pre_stop); 266 267 void iTCO_vendor_pre_keepalive(unsigned long acpibase, unsigned int heartbeat) 268 { 269 if (vendorsupport == SUPERMICRO_OLD_BOARD) 270 supermicro_old_pre_keepalive(acpibase); 271 else if (vendorsupport == SUPERMICRO_NEW_BOARD) 272 supermicro_new_pre_set_heartbeat(heartbeat); 273 } 274 EXPORT_SYMBOL(iTCO_vendor_pre_keepalive); 275 276 void iTCO_vendor_pre_set_heartbeat(unsigned int heartbeat) 277 { 278 if (vendorsupport == SUPERMICRO_NEW_BOARD) 279 supermicro_new_pre_set_heartbeat(heartbeat); 280 } 281 EXPORT_SYMBOL(iTCO_vendor_pre_set_heartbeat); 282 283 int iTCO_vendor_check_noreboot_on(void) 284 { 285 switch (vendorsupport) { 286 case SUPERMICRO_OLD_BOARD: 287 return 0; 288 default: 289 return 1; 290 } 291 } 292 EXPORT_SYMBOL(iTCO_vendor_check_noreboot_on); 293 294 static int __init iTCO_vendor_init_module(void) 295 { 296 printk(KERN_INFO PFX "vendor-support=%d\n", vendorsupport); 297 return 0; 298 } 299 300 static void __exit iTCO_vendor_exit_module(void) 301 { 302 printk(KERN_INFO PFX "Module Unloaded\n"); 303 } 304 305 module_init(iTCO_vendor_init_module); 306 module_exit(iTCO_vendor_exit_module); 307 308 MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>, R. Seretny <lkpatches@paypc.com>"); 309 MODULE_DESCRIPTION("Intel TCO Vendor Specific WatchDog Timer Driver Support"); 310 MODULE_VERSION(DRV_VERSION); 311 MODULE_LICENSE("GPL"); 312 313