xref: /linux/drivers/watchdog/i6300esb.c (revision 6a3335b43342b42dd6c69b4bbbde15d622cb49ca)
1 /*
2  *	i6300esb:	Watchdog timer driver for Intel 6300ESB chipset
3  *
4  *	(c) Copyright 2004 Google Inc.
5  *	(c) Copyright 2005 David Härdeman <david@2gen.com>
6  *
7  *	This program is free software; you can redistribute it and/or
8  *	modify it under the terms of the GNU General Public License
9  *	as published by the Free Software Foundation; either version
10  *	2 of the License, or (at your option) any later version.
11  *
12  *	based on i810-tco.c which is in turn based on softdog.c
13  *
14  *	The timer is implemented in the following I/O controller hubs:
15  *	(See the intel documentation on http://developer.intel.com.)
16  *	6300ESB chip : document number 300641-004
17  *
18  *  2004YYZZ Ross Biro
19  *	Initial version 0.01
20  *  2004YYZZ Ross Biro
21  *	Version 0.02
22  *  20050210 David Härdeman <david@2gen.com>
23  *	Ported driver to kernel 2.6
24  */
25 
26 /*
27  *      Includes, defines, variables, module parameters, ...
28  */
29 
30 #include <linux/module.h>
31 #include <linux/types.h>
32 #include <linux/kernel.h>
33 #include <linux/fs.h>
34 #include <linux/mm.h>
35 #include <linux/miscdevice.h>
36 #include <linux/watchdog.h>
37 #include <linux/platform_device.h>
38 #include <linux/init.h>
39 #include <linux/pci.h>
40 #include <linux/ioport.h>
41 #include <linux/uaccess.h>
42 #include <linux/io.h>
43 
44 /* Module and version information */
45 #define ESB_VERSION "0.04"
46 #define ESB_MODULE_NAME "i6300ESB timer"
47 #define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION
48 #define PFX ESB_MODULE_NAME ": "
49 
50 /* PCI configuration registers */
51 #define ESB_CONFIG_REG  0x60            /* Config register                   */
52 #define ESB_LOCK_REG    0x68            /* WDT lock register                 */
53 
54 /* Memory mapped registers */
55 #define ESB_TIMER1_REG  BASEADDR + 0x00 /* Timer1 value after each reset     */
56 #define ESB_TIMER2_REG  BASEADDR + 0x04 /* Timer2 value after each reset     */
57 #define ESB_GINTSR_REG  BASEADDR + 0x08 /* General Interrupt Status Register */
58 #define ESB_RELOAD_REG  BASEADDR + 0x0c /* Reload register                   */
59 
60 /* Lock register bits */
61 #define ESB_WDT_FUNC    (0x01 << 2)   /* Watchdog functionality            */
62 #define ESB_WDT_ENABLE  (0x01 << 1)   /* Enable WDT                        */
63 #define ESB_WDT_LOCK    (0x01 << 0)   /* Lock (nowayout)                   */
64 
65 /* Config register bits */
66 #define ESB_WDT_REBOOT  (0x01 << 5)   /* Enable reboot on timeout          */
67 #define ESB_WDT_FREQ    (0x01 << 2)   /* Decrement frequency               */
68 #define ESB_WDT_INTTYPE (0x11 << 0)   /* Interrupt type on timer1 timeout  */
69 
70 /* Reload register bits */
71 #define ESB_WDT_RELOAD  (0x01 << 8)    /* prevent timeout                   */
72 
73 /* Magic constants */
74 #define ESB_UNLOCK1     0x80            /* Step 1 to unlock reset registers  */
75 #define ESB_UNLOCK2     0x86            /* Step 2 to unlock reset registers  */
76 
77 /* internal variables */
78 static void __iomem *BASEADDR;
79 static DEFINE_SPINLOCK(esb_lock); /* Guards the hardware */
80 static unsigned long timer_alive;
81 static struct pci_dev *esb_pci;
82 static unsigned short triggered; /* The status of the watchdog upon boot */
83 static char esb_expect_close;
84 static struct platform_device *esb_platform_device;
85 
86 /* module parameters */
87 /* 30 sec default heartbeat (1 < heartbeat < 2*1023) */
88 #define WATCHDOG_HEARTBEAT 30
89 static int heartbeat = WATCHDOG_HEARTBEAT;  /* in seconds */
90 
91 module_param(heartbeat, int, 0);
92 MODULE_PARM_DESC(heartbeat,
93 		"Watchdog heartbeat in seconds. (1<heartbeat<2046, default="
94 				__MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
95 
96 static int nowayout = WATCHDOG_NOWAYOUT;
97 module_param(nowayout, int, 0);
98 MODULE_PARM_DESC(nowayout,
99 		"Watchdog cannot be stopped once started (default="
100 				__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
101 
102 /*
103  * Some i6300ESB specific functions
104  */
105 
106 /*
107  * Prepare for reloading the timer by unlocking the proper registers.
108  * This is performed by first writing 0x80 followed by 0x86 to the
109  * reload register. After this the appropriate registers can be written
110  * to once before they need to be unlocked again.
111  */
112 static inline void esb_unlock_registers(void)
113 {
114 	writeb(ESB_UNLOCK1, ESB_RELOAD_REG);
115 	writeb(ESB_UNLOCK2, ESB_RELOAD_REG);
116 }
117 
118 static int esb_timer_start(void)
119 {
120 	u8 val;
121 
122 	spin_lock(&esb_lock);
123 	esb_unlock_registers();
124 	writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
125 	/* Enable or Enable + Lock? */
126 	val = 0x02 | (nowayout ? 0x01 : 0x00);
127 	pci_write_config_byte(esb_pci, ESB_LOCK_REG, val);
128 	spin_unlock(&esb_lock);
129 	return 0;
130 }
131 
132 static int esb_timer_stop(void)
133 {
134 	u8 val;
135 
136 	spin_lock(&esb_lock);
137 	/* First, reset timers as suggested by the docs */
138 	esb_unlock_registers();
139 	writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
140 	/* Then disable the WDT */
141 	pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x0);
142 	pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val);
143 	spin_unlock(&esb_lock);
144 
145 	/* Returns 0 if the timer was disabled, non-zero otherwise */
146 	return (val & 0x01);
147 }
148 
149 static void esb_timer_keepalive(void)
150 {
151 	spin_lock(&esb_lock);
152 	esb_unlock_registers();
153 	writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
154 	/* FIXME: Do we need to flush anything here? */
155 	spin_unlock(&esb_lock);
156 }
157 
158 static int esb_timer_set_heartbeat(int time)
159 {
160 	u32 val;
161 
162 	if (time < 0x1 || time > (2 * 0x03ff))
163 		return -EINVAL;
164 
165 	spin_lock(&esb_lock);
166 
167 	/* We shift by 9, so if we are passed a value of 1 sec,
168 	 * val will be 1 << 9 = 512, then write that to two
169 	 * timers => 2 * 512 = 1024 (which is decremented at 1KHz)
170 	 */
171 	val = time << 9;
172 
173 	/* Write timer 1 */
174 	esb_unlock_registers();
175 	writel(val, ESB_TIMER1_REG);
176 
177 	/* Write timer 2 */
178 	esb_unlock_registers();
179 	writel(val, ESB_TIMER2_REG);
180 
181 	/* Reload */
182 	esb_unlock_registers();
183 	writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
184 
185 	/* FIXME: Do we need to flush everything out? */
186 
187 	/* Done */
188 	heartbeat = time;
189 	spin_unlock(&esb_lock);
190 	return 0;
191 }
192 
193 static int esb_timer_read(void)
194 {
195 	u32 count;
196 
197 	/* This isn't documented, and doesn't take into
198 	 * acount which stage is running, but it looks
199 	 * like a 20 bit count down, so we might as well report it.
200 	 */
201 	pci_read_config_dword(esb_pci, 0x64, &count);
202 	return (int)count;
203 }
204 
205 /*
206  *	/dev/watchdog handling
207  */
208 
209 static int esb_open(struct inode *inode, struct file *file)
210 {
211 	/* /dev/watchdog can only be opened once */
212 	if (test_and_set_bit(0, &timer_alive))
213 		return -EBUSY;
214 
215 	/* Reload and activate timer */
216 	esb_timer_start();
217 
218 	return nonseekable_open(inode, file);
219 }
220 
221 static int esb_release(struct inode *inode, struct file *file)
222 {
223 	/* Shut off the timer. */
224 	if (esb_expect_close == 42)
225 		esb_timer_stop();
226 	else {
227 		printk(KERN_CRIT PFX
228 				"Unexpected close, not stopping watchdog!\n");
229 		esb_timer_keepalive();
230 	}
231 	clear_bit(0, &timer_alive);
232 	esb_expect_close = 0;
233 	return 0;
234 }
235 
236 static ssize_t esb_write(struct file *file, const char __user *data,
237 			  size_t len, loff_t *ppos)
238 {
239 	/* See if we got the magic character 'V' and reload the timer */
240 	if (len) {
241 		if (!nowayout) {
242 			size_t i;
243 
244 			/* note: just in case someone wrote the magic character
245 			 * five months ago... */
246 			esb_expect_close = 0;
247 
248 			/* scan to see whether or not we got the
249 			 * magic character */
250 			for (i = 0; i != len; i++) {
251 				char c;
252 				if (get_user(c, data + i))
253 					return -EFAULT;
254 				if (c == 'V')
255 					esb_expect_close = 42;
256 			}
257 		}
258 
259 		/* someone wrote to us, we should reload the timer */
260 		esb_timer_keepalive();
261 	}
262 	return len;
263 }
264 
265 static long esb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
266 {
267 	int new_options, retval = -EINVAL;
268 	int new_heartbeat;
269 	void __user *argp = (void __user *)arg;
270 	int __user *p = argp;
271 	static struct watchdog_info ident = {
272 		.options =		WDIOF_SETTIMEOUT |
273 					WDIOF_KEEPALIVEPING |
274 					WDIOF_MAGICCLOSE,
275 		.firmware_version =	0,
276 		.identity =		ESB_MODULE_NAME,
277 	};
278 
279 	switch (cmd) {
280 	case WDIOC_GETSUPPORT:
281 		return copy_to_user(argp, &ident,
282 					sizeof(ident)) ? -EFAULT : 0;
283 
284 	case WDIOC_GETSTATUS:
285 		return put_user(esb_timer_read(), p);
286 
287 	case WDIOC_GETBOOTSTATUS:
288 		return put_user(triggered, p);
289 
290 	case WDIOC_SETOPTIONS:
291 	{
292 		if (get_user(new_options, p))
293 			return -EFAULT;
294 
295 		if (new_options & WDIOS_DISABLECARD) {
296 			esb_timer_stop();
297 			retval = 0;
298 		}
299 
300 		if (new_options & WDIOS_ENABLECARD) {
301 			esb_timer_start();
302 			retval = 0;
303 		}
304 		return retval;
305 	}
306 	case WDIOC_KEEPALIVE:
307 		esb_timer_keepalive();
308 		return 0;
309 
310 	case WDIOC_SETTIMEOUT:
311 	{
312 		if (get_user(new_heartbeat, p))
313 			return -EFAULT;
314 		if (esb_timer_set_heartbeat(new_heartbeat))
315 			return -EINVAL;
316 		esb_timer_keepalive();
317 		/* Fall */
318 	}
319 	case WDIOC_GETTIMEOUT:
320 		return put_user(heartbeat, p);
321 	default:
322 		return -ENOTTY;
323 	}
324 }
325 
326 /*
327  *      Kernel Interfaces
328  */
329 
330 static const struct file_operations esb_fops = {
331 	.owner = THIS_MODULE,
332 	.llseek = no_llseek,
333 	.write = esb_write,
334 	.unlocked_ioctl = esb_ioctl,
335 	.open = esb_open,
336 	.release = esb_release,
337 };
338 
339 static struct miscdevice esb_miscdev = {
340 	.minor = WATCHDOG_MINOR,
341 	.name = "watchdog",
342 	.fops = &esb_fops,
343 };
344 
345 /*
346  * Data for PCI driver interface
347  *
348  * This data only exists for exporting the supported
349  * PCI ids via MODULE_DEVICE_TABLE.  We do not actually
350  * register a pci_driver, because someone else might one day
351  * want to register another driver on the same PCI id.
352  */
353 static struct pci_device_id esb_pci_tbl[] = {
354 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), },
355 	{ 0, },                 /* End of list */
356 };
357 MODULE_DEVICE_TABLE(pci, esb_pci_tbl);
358 
359 /*
360  *      Init & exit routines
361  */
362 
363 static unsigned char __devinit esb_getdevice(void)
364 {
365 	u8 val1;
366 	unsigned short val2;
367 	/*
368 	 *      Find the PCI device
369 	 */
370 
371 	esb_pci = pci_get_device(PCI_VENDOR_ID_INTEL,
372 					PCI_DEVICE_ID_INTEL_ESB_9, NULL);
373 
374 	if (esb_pci) {
375 		if (pci_enable_device(esb_pci)) {
376 			printk(KERN_ERR PFX "failed to enable device\n");
377 			goto err_devput;
378 		}
379 
380 		if (pci_request_region(esb_pci, 0, ESB_MODULE_NAME)) {
381 			printk(KERN_ERR PFX "failed to request region\n");
382 			goto err_disable;
383 		}
384 
385 		BASEADDR = pci_ioremap_bar(esb_pci, 0);
386 		if (BASEADDR == NULL) {
387 			/* Something's wrong here, BASEADDR has to be set */
388 			printk(KERN_ERR PFX "failed to get BASEADDR\n");
389 			goto err_release;
390 		}
391 
392 		/*
393 		 * The watchdog has two timers, it can be setup so that the
394 		 * expiry of timer1 results in an interrupt and the expiry of
395 		 * timer2 results in a reboot. We set it to not generate
396 		 * any interrupts as there is not much we can do with it
397 		 * right now.
398 		 *
399 		 * We also enable reboots and set the timer frequency to
400 		 * the PCI clock divided by 2^15 (approx 1KHz).
401 		 */
402 		pci_write_config_word(esb_pci, ESB_CONFIG_REG, 0x0003);
403 
404 		/* Check that the WDT isn't already locked */
405 		pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val1);
406 		if (val1 & ESB_WDT_LOCK)
407 			printk(KERN_WARNING PFX "nowayout already set\n");
408 
409 		/* Set the timer to watchdog mode and disable it for now */
410 		pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x00);
411 
412 		/* Check if the watchdog was previously triggered */
413 		esb_unlock_registers();
414 		val2 = readw(ESB_RELOAD_REG);
415 		triggered = (val2 & (0x01 << 9) >> 9);
416 
417 		/* Reset trigger flag and timers */
418 		esb_unlock_registers();
419 		writew((0x11 << 8), ESB_RELOAD_REG);
420 
421 		/* Done */
422 		return 1;
423 
424 err_release:
425 		pci_release_region(esb_pci, 0);
426 err_disable:
427 		pci_disable_device(esb_pci);
428 err_devput:
429 		pci_dev_put(esb_pci);
430 	}
431 	return 0;
432 }
433 
434 static int __devinit esb_probe(struct platform_device *dev)
435 {
436 	int ret;
437 
438 	/* Check whether or not the hardware watchdog is there */
439 	if (!esb_getdevice() || esb_pci == NULL)
440 		return -ENODEV;
441 
442 	/* Check that the heartbeat value is within it's range;
443 	   if not reset to the default */
444 	if (esb_timer_set_heartbeat(heartbeat)) {
445 		esb_timer_set_heartbeat(WATCHDOG_HEARTBEAT);
446 		printk(KERN_INFO PFX
447 			"heartbeat value must be 1<heartbeat<2046, using %d\n",
448 								heartbeat);
449 	}
450 
451 	ret = misc_register(&esb_miscdev);
452 	if (ret != 0) {
453 		printk(KERN_ERR PFX
454 			"cannot register miscdev on minor=%d (err=%d)\n",
455 							WATCHDOG_MINOR, ret);
456 		goto err_unmap;
457 	}
458 	esb_timer_stop();
459 	printk(KERN_INFO PFX
460 		"initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n",
461 						BASEADDR, heartbeat, nowayout);
462 	return 0;
463 
464 err_unmap:
465 	iounmap(BASEADDR);
466 /* err_release: */
467 	pci_release_region(esb_pci, 0);
468 /* err_disable: */
469 	pci_disable_device(esb_pci);
470 /* err_devput: */
471 	pci_dev_put(esb_pci);
472 	return ret;
473 }
474 
475 static int __devexit esb_remove(struct platform_device *dev)
476 {
477 	/* Stop the timer before we leave */
478 	if (!nowayout)
479 		esb_timer_stop();
480 
481 	/* Deregister */
482 	misc_deregister(&esb_miscdev);
483 	iounmap(BASEADDR);
484 	pci_release_region(esb_pci, 0);
485 	pci_disable_device(esb_pci);
486 	pci_dev_put(esb_pci);
487 	return 0;
488 }
489 
490 static void esb_shutdown(struct platform_device *dev)
491 {
492 	esb_timer_stop();
493 }
494 
495 static struct platform_driver esb_platform_driver = {
496 	.probe          = esb_probe,
497 	.remove         = __devexit_p(esb_remove),
498 	.shutdown       = esb_shutdown,
499 	.driver         = {
500 		.owner  = THIS_MODULE,
501 		.name   = ESB_MODULE_NAME,
502 	},
503 };
504 
505 static int __init watchdog_init(void)
506 {
507 	int err;
508 
509 	printk(KERN_INFO PFX "Intel 6300ESB WatchDog Timer Driver v%s\n",
510 		ESB_VERSION);
511 
512 	err = platform_driver_register(&esb_platform_driver);
513 	if (err)
514 		return err;
515 
516 	esb_platform_device = platform_device_register_simple(ESB_MODULE_NAME,
517 								-1, NULL, 0);
518 	if (IS_ERR(esb_platform_device)) {
519 		err = PTR_ERR(esb_platform_device);
520 		goto unreg_platform_driver;
521 	}
522 
523 	return 0;
524 
525 unreg_platform_driver:
526 	platform_driver_unregister(&esb_platform_driver);
527 	return err;
528 }
529 
530 static void __exit watchdog_cleanup(void)
531 {
532 	platform_device_unregister(esb_platform_device);
533 	platform_driver_unregister(&esb_platform_driver);
534 	printk(KERN_INFO PFX "Watchdog Module Unloaded.\n");
535 }
536 
537 module_init(watchdog_init);
538 module_exit(watchdog_cleanup);
539 
540 MODULE_AUTHOR("Ross Biro and David Härdeman");
541 MODULE_DESCRIPTION("Watchdog driver for Intel 6300ESB chipsets");
542 MODULE_LICENSE("GPL");
543 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
544