1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * HPE WatchDog Driver 4 * based on 5 * 6 * SoftDog 0.05: A Software Watchdog Device 7 * 8 * (c) Copyright 2018 Hewlett Packard Enterprise Development LP 9 * Thomas Mingarelli <thomas.mingarelli@hpe.com> 10 */ 11 12 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 13 14 #include <linux/device.h> 15 #include <linux/hex.h> 16 #include <linux/io.h> 17 #include <linux/kernel.h> 18 #include <linux/module.h> 19 #include <linux/moduleparam.h> 20 #include <linux/pci.h> 21 #include <linux/pci_ids.h> 22 #include <linux/types.h> 23 #include <linux/watchdog.h> 24 #ifdef CONFIG_HPWDT_NMI_DECODING 25 #include <asm/nmi.h> 26 #endif 27 #include <linux/crash_dump.h> 28 29 #define HPWDT_VERSION "2.0.4" 30 #define SECS_TO_TICKS(secs) ((secs) * 1000 / 128) 31 #define TICKS_TO_SECS(ticks) ((ticks) * 128 / 1000) 32 #define HPWDT_MAX_TICKS 65535 33 #define HPWDT_MAX_TIMER TICKS_TO_SECS(HPWDT_MAX_TICKS) 34 #define DEFAULT_MARGIN 30 35 #define PRETIMEOUT_SEC 9 36 37 static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */ 38 static bool nowayout = WATCHDOG_NOWAYOUT; 39 static bool pretimeout = IS_ENABLED(CONFIG_HPWDT_NMI_DECODING); 40 static int kdumptimeout = -1; 41 42 static void __iomem *pci_mem_addr; /* the PCI-memory address */ 43 static unsigned long __iomem *hpwdt_nmistat; 44 static unsigned long __iomem *hpwdt_timer_reg; 45 static unsigned long __iomem *hpwdt_timer_con; 46 47 static const struct pci_device_id hpwdt_devices[] = { 48 { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) }, /* iLO2 */ 49 { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) }, /* iLO3 */ 50 { PCI_DEVICE(PCI_VENDOR_ID_HP_3PAR, 0x0389) }, /* PCtrl */ 51 {0}, /* terminate list */ 52 }; 53 MODULE_DEVICE_TABLE(pci, hpwdt_devices); 54 55 static const struct pci_device_id hpwdt_blacklist[] = { 56 { PCI_DEVICE_SUB(PCI_VENDOR_ID_HP, 0x3306, PCI_VENDOR_ID_HP, 0x1979) }, /* auxilary iLO */ 57 { PCI_DEVICE_SUB(PCI_VENDOR_ID_HP, 0x3306, PCI_VENDOR_ID_HP_3PAR, 0x0289) }, /* CL */ 58 {0}, /* terminate list */ 59 }; 60 61 static struct watchdog_device hpwdt_dev; 62 /* 63 * Watchdog operations 64 */ 65 static int hpwdt_hw_is_running(void) 66 { 67 return ioread8(hpwdt_timer_con) & 0x01; 68 } 69 70 static int hpwdt_start(struct watchdog_device *wdd) 71 { 72 int control = 0x81 | (pretimeout ? 0x4 : 0); 73 int reload = SECS_TO_TICKS(min(wdd->timeout, wdd->max_hw_heartbeat_ms/1000)); 74 75 dev_dbg(wdd->parent, "start watchdog 0x%08x:0x%08x:0x%02x\n", wdd->timeout, reload, control); 76 iowrite16(reload, hpwdt_timer_reg); 77 iowrite8(control, hpwdt_timer_con); 78 79 return 0; 80 } 81 82 static void hpwdt_stop(void) 83 { 84 unsigned long data; 85 86 pr_debug("stop watchdog\n"); 87 88 data = ioread8(hpwdt_timer_con); 89 data &= 0xFE; 90 iowrite8(data, hpwdt_timer_con); 91 } 92 93 static int hpwdt_stop_core(struct watchdog_device *wdd) 94 { 95 hpwdt_stop(); 96 97 return 0; 98 } 99 100 static void hpwdt_ping_ticks(int val) 101 { 102 val = min(val, HPWDT_MAX_TICKS); 103 iowrite16(val, hpwdt_timer_reg); 104 } 105 106 static int hpwdt_ping(struct watchdog_device *wdd) 107 { 108 int reload = SECS_TO_TICKS(min(wdd->timeout, wdd->max_hw_heartbeat_ms/1000)); 109 110 dev_dbg(wdd->parent, "ping watchdog 0x%08x:0x%08x\n", wdd->timeout, reload); 111 hpwdt_ping_ticks(reload); 112 113 return 0; 114 } 115 116 static unsigned int hpwdt_gettimeleft(struct watchdog_device *wdd) 117 { 118 return TICKS_TO_SECS(ioread16(hpwdt_timer_reg)); 119 } 120 121 static int hpwdt_settimeout(struct watchdog_device *wdd, unsigned int val) 122 { 123 dev_dbg(wdd->parent, "set_timeout = %d\n", val); 124 125 wdd->timeout = val; 126 if (val <= wdd->pretimeout) { 127 dev_dbg(wdd->parent, "pretimeout < timeout. Setting to zero\n"); 128 wdd->pretimeout = 0; 129 pretimeout = false; 130 if (watchdog_active(wdd)) 131 hpwdt_start(wdd); 132 } 133 hpwdt_ping(wdd); 134 135 return 0; 136 } 137 138 #ifdef CONFIG_HPWDT_NMI_DECODING 139 static int hpwdt_set_pretimeout(struct watchdog_device *wdd, unsigned int req) 140 { 141 unsigned int val = 0; 142 143 dev_dbg(wdd->parent, "set_pretimeout = %d\n", req); 144 if (req) { 145 val = PRETIMEOUT_SEC; 146 if (val >= wdd->timeout) 147 return -EINVAL; 148 } 149 150 if (val != req) 151 dev_dbg(wdd->parent, "Rounding pretimeout to: %d\n", val); 152 153 wdd->pretimeout = val; 154 pretimeout = !!val; 155 156 if (watchdog_active(wdd)) 157 hpwdt_start(wdd); 158 159 return 0; 160 } 161 162 static int hpwdt_my_nmi(void) 163 { 164 return ioread8(hpwdt_nmistat) & 0x6; 165 } 166 167 /* 168 * NMI Handler 169 */ 170 static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs) 171 { 172 unsigned int mynmi = hpwdt_my_nmi(); 173 static char panic_msg[] = 174 "00: An NMI occurred. Depending on your system the reason " 175 "for the NMI is logged in any one of the following resources:\n" 176 "1. Integrated Management Log (IML)\n" 177 "2. OA Syslog\n" 178 "3. OA Forward Progress Log\n" 179 "4. iLO Event Log"; 180 181 if (ulReason == NMI_UNKNOWN && !mynmi) 182 return NMI_DONE; 183 184 if (kdumptimeout < 0) 185 hpwdt_stop(); 186 else if (kdumptimeout == 0) 187 ; 188 else { 189 unsigned int val = max((unsigned int)kdumptimeout, hpwdt_dev.timeout); 190 hpwdt_ping_ticks(SECS_TO_TICKS(val)); 191 } 192 193 hex_byte_pack(panic_msg, mynmi); 194 nmi_panic(regs, panic_msg); 195 196 return NMI_HANDLED; 197 } 198 #endif /* CONFIG_HPWDT_NMI_DECODING */ 199 200 201 static const struct watchdog_info ident = { 202 .options = WDIOF_PRETIMEOUT | 203 WDIOF_SETTIMEOUT | 204 WDIOF_KEEPALIVEPING | 205 WDIOF_MAGICCLOSE, 206 .identity = "HPE iLO2+ HW Watchdog Timer", 207 }; 208 209 /* 210 * Kernel interfaces 211 */ 212 213 static const struct watchdog_ops hpwdt_ops = { 214 .owner = THIS_MODULE, 215 .start = hpwdt_start, 216 .stop = hpwdt_stop_core, 217 .ping = hpwdt_ping, 218 .set_timeout = hpwdt_settimeout, 219 .get_timeleft = hpwdt_gettimeleft, 220 #ifdef CONFIG_HPWDT_NMI_DECODING 221 .set_pretimeout = hpwdt_set_pretimeout, 222 #endif 223 }; 224 225 static struct watchdog_device hpwdt_dev = { 226 .info = &ident, 227 .ops = &hpwdt_ops, 228 .min_timeout = 1, 229 .timeout = DEFAULT_MARGIN, 230 .pretimeout = PRETIMEOUT_SEC, 231 .max_hw_heartbeat_ms = HPWDT_MAX_TIMER * 1000, 232 }; 233 234 235 /* 236 * Init & Exit 237 */ 238 239 static int hpwdt_init_nmi_decoding(struct pci_dev *dev) 240 { 241 #ifdef CONFIG_HPWDT_NMI_DECODING 242 int retval; 243 /* 244 * Only one function can register for NMI_UNKNOWN 245 */ 246 retval = register_nmi_handler(NMI_UNKNOWN, hpwdt_pretimeout, 0, "hpwdt"); 247 if (retval) 248 goto error; 249 retval = register_nmi_handler(NMI_SERR, hpwdt_pretimeout, 0, "hpwdt"); 250 if (retval) 251 goto error1; 252 retval = register_nmi_handler(NMI_IO_CHECK, hpwdt_pretimeout, 0, "hpwdt"); 253 if (retval) 254 goto error2; 255 256 dev_info(&dev->dev, 257 "HPE Watchdog Timer Driver: NMI decoding initialized\n"); 258 259 return 0; 260 261 error2: 262 unregister_nmi_handler(NMI_SERR, "hpwdt"); 263 error1: 264 unregister_nmi_handler(NMI_UNKNOWN, "hpwdt"); 265 error: 266 dev_warn(&dev->dev, 267 "Unable to register a die notifier (err=%d).\n", 268 retval); 269 return retval; 270 #endif /* CONFIG_HPWDT_NMI_DECODING */ 271 return 0; 272 } 273 274 static void hpwdt_exit_nmi_decoding(void) 275 { 276 #ifdef CONFIG_HPWDT_NMI_DECODING 277 unregister_nmi_handler(NMI_UNKNOWN, "hpwdt"); 278 unregister_nmi_handler(NMI_SERR, "hpwdt"); 279 unregister_nmi_handler(NMI_IO_CHECK, "hpwdt"); 280 #endif 281 } 282 283 static int hpwdt_init_one(struct pci_dev *dev, 284 const struct pci_device_id *ent) 285 { 286 int retval; 287 288 /* 289 * First let's find out if we are on an iLO2+ server. We will 290 * not run on a legacy ASM box. 291 * So we only support the G5 ProLiant servers and higher. 292 */ 293 if (dev->subsystem_vendor != PCI_VENDOR_ID_HP && 294 dev->subsystem_vendor != PCI_VENDOR_ID_HP_3PAR) { 295 dev_warn(&dev->dev, 296 "This server does not have an iLO2+ ASIC.\n"); 297 return -ENODEV; 298 } 299 300 if (pci_match_id(hpwdt_blacklist, dev)) { 301 dev_dbg(&dev->dev, "Not supported on this device\n"); 302 return -ENODEV; 303 } 304 305 if (pci_enable_device(dev)) { 306 dev_warn(&dev->dev, 307 "Not possible to enable PCI Device: 0x%x:0x%x.\n", 308 ent->vendor, ent->device); 309 return -ENODEV; 310 } 311 312 pci_mem_addr = pci_iomap(dev, 1, 0x80); 313 if (!pci_mem_addr) { 314 dev_warn(&dev->dev, 315 "Unable to detect the iLO2+ server memory.\n"); 316 retval = -ENOMEM; 317 goto error_pci_iomap; 318 } 319 hpwdt_nmistat = pci_mem_addr + 0x6e; 320 hpwdt_timer_reg = pci_mem_addr + 0x70; 321 hpwdt_timer_con = pci_mem_addr + 0x72; 322 323 /* Have the core update running timer until user space is ready */ 324 if (hpwdt_hw_is_running()) { 325 dev_info(&dev->dev, "timer is running\n"); 326 set_bit(WDOG_HW_RUNNING, &hpwdt_dev.status); 327 } 328 329 /* Initialize NMI Decoding functionality */ 330 retval = hpwdt_init_nmi_decoding(dev); 331 if (retval != 0) 332 goto error_init_nmi_decoding; 333 334 watchdog_stop_on_unregister(&hpwdt_dev); 335 watchdog_set_nowayout(&hpwdt_dev, nowayout); 336 watchdog_init_timeout(&hpwdt_dev, soft_margin, NULL); 337 338 if (is_kdump_kernel()) { 339 pretimeout = false; 340 kdumptimeout = 0; 341 } 342 343 if (pretimeout && hpwdt_dev.timeout <= PRETIMEOUT_SEC) { 344 dev_warn(&dev->dev, "timeout <= pretimeout. Setting pretimeout to zero\n"); 345 pretimeout = false; 346 } 347 hpwdt_dev.pretimeout = pretimeout ? PRETIMEOUT_SEC : 0; 348 kdumptimeout = min(kdumptimeout, HPWDT_MAX_TIMER); 349 350 hpwdt_dev.parent = &dev->dev; 351 retval = watchdog_register_device(&hpwdt_dev); 352 if (retval < 0) 353 goto error_wd_register; 354 355 dev_info(&dev->dev, "HPE Watchdog Timer Driver: Version: %s\n", 356 HPWDT_VERSION); 357 dev_info(&dev->dev, "timeout: %d seconds (nowayout=%d)\n", 358 hpwdt_dev.timeout, nowayout); 359 dev_info(&dev->dev, "pretimeout: %s.\n", 360 pretimeout ? "on" : "off"); 361 dev_info(&dev->dev, "kdumptimeout: %d.\n", kdumptimeout); 362 363 return 0; 364 365 error_wd_register: 366 hpwdt_exit_nmi_decoding(); 367 error_init_nmi_decoding: 368 pci_iounmap(dev, pci_mem_addr); 369 error_pci_iomap: 370 pci_disable_device(dev); 371 return retval; 372 } 373 374 static void hpwdt_exit(struct pci_dev *dev) 375 { 376 watchdog_unregister_device(&hpwdt_dev); 377 hpwdt_exit_nmi_decoding(); 378 pci_iounmap(dev, pci_mem_addr); 379 pci_disable_device(dev); 380 } 381 382 static int hpwdt_suspend(struct device *dev) 383 { 384 if (watchdog_active(&hpwdt_dev)) 385 hpwdt_stop(); 386 387 return 0; 388 } 389 390 static int hpwdt_resume(struct device *dev) 391 { 392 if (watchdog_active(&hpwdt_dev)) 393 hpwdt_start(&hpwdt_dev); 394 395 return 0; 396 } 397 398 static const struct dev_pm_ops hpwdt_pm_ops = { 399 LATE_SYSTEM_SLEEP_PM_OPS(hpwdt_suspend, hpwdt_resume) 400 }; 401 402 static struct pci_driver hpwdt_driver = { 403 .name = "hpwdt", 404 .id_table = hpwdt_devices, 405 .probe = hpwdt_init_one, 406 .remove = hpwdt_exit, 407 408 .driver = { 409 .name = "hpwdt", 410 .pm = &hpwdt_pm_ops, 411 } 412 }; 413 414 MODULE_AUTHOR("Tom Mingarelli"); 415 MODULE_DESCRIPTION("hpe watchdog driver"); 416 MODULE_LICENSE("GPL"); 417 MODULE_VERSION(HPWDT_VERSION); 418 419 module_param(soft_margin, int, 0); 420 MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds"); 421 422 module_param_named(timeout, soft_margin, int, 0); 423 MODULE_PARM_DESC(timeout, "Alias of soft_margin"); 424 425 module_param(nowayout, bool, 0); 426 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" 427 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 428 429 module_param(kdumptimeout, int, 0444); 430 MODULE_PARM_DESC(kdumptimeout, "Timeout applied for crash kernel transition in seconds"); 431 432 #ifdef CONFIG_HPWDT_NMI_DECODING 433 module_param(pretimeout, bool, 0); 434 MODULE_PARM_DESC(pretimeout, "Watchdog pretimeout enabled"); 435 #endif 436 437 module_pci_driver(hpwdt_driver); 438