1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /*************************************************************************** 3 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> * 4 * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> * 5 * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> * 6 * * 7 ***************************************************************************/ 8 9 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 10 11 #include <linux/err.h> 12 #include <linux/fs.h> 13 #include <linux/init.h> 14 #include <linux/io.h> 15 #include <linux/ioport.h> 16 #include <linux/miscdevice.h> 17 #include <linux/module.h> 18 #include <linux/mutex.h> 19 #include <linux/notifier.h> 20 #include <linux/reboot.h> 21 #include <linux/uaccess.h> 22 #include <linux/watchdog.h> 23 24 #define DRVNAME "f71808e_wdt" 25 26 #define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */ 27 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */ 28 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */ 29 30 #define SIO_REG_LDSEL 0x07 /* Logical device select */ 31 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ 32 #define SIO_REG_DEVREV 0x22 /* Device revision */ 33 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ 34 #define SIO_REG_CLOCK_SEL 0x26 /* Clock select */ 35 #define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */ 36 #define SIO_F81866_REG_PORT_SEL 0x27 /* F81866 Multi-Function Register */ 37 #define SIO_REG_TSI_LEVEL_SEL 0x28 /* TSI Level select */ 38 #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */ 39 #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */ 40 #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */ 41 #define SIO_F81866_REG_GPIO1 0x2c /* F81866 GPIO1 Enable Register */ 42 #define SIO_REG_ENABLE 0x30 /* Logical device enable */ 43 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ 44 45 #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */ 46 #define SIO_F71808_ID 0x0901 /* Chipset ID */ 47 #define SIO_F71858_ID 0x0507 /* Chipset ID */ 48 #define SIO_F71862_ID 0x0601 /* Chipset ID */ 49 #define SIO_F71868_ID 0x1106 /* Chipset ID */ 50 #define SIO_F71869_ID 0x0814 /* Chipset ID */ 51 #define SIO_F71869A_ID 0x1007 /* Chipset ID */ 52 #define SIO_F71882_ID 0x0541 /* Chipset ID */ 53 #define SIO_F71889_ID 0x0723 /* Chipset ID */ 54 #define SIO_F81803_ID 0x1210 /* Chipset ID */ 55 #define SIO_F81865_ID 0x0704 /* Chipset ID */ 56 #define SIO_F81866_ID 0x1010 /* Chipset ID */ 57 58 #define F71808FG_REG_WDO_CONF 0xf0 59 #define F71808FG_REG_WDT_CONF 0xf5 60 #define F71808FG_REG_WD_TIME 0xf6 61 62 #define F71808FG_FLAG_WDOUT_EN 7 63 64 #define F71808FG_FLAG_WDTMOUT_STS 6 65 #define F71808FG_FLAG_WD_EN 5 66 #define F71808FG_FLAG_WD_PULSE 4 67 #define F71808FG_FLAG_WD_UNIT 3 68 69 #define F81865_REG_WDO_CONF 0xfa 70 #define F81865_FLAG_WDOUT_EN 0 71 72 /* Default values */ 73 #define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */ 74 #define WATCHDOG_MAX_TIMEOUT (60 * 255) 75 #define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for 76 watchdog signal */ 77 #define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output 78 pin number 63 */ 79 80 static unsigned short force_id; 81 module_param(force_id, ushort, 0); 82 MODULE_PARM_DESC(force_id, "Override the detected device ID"); 83 84 static const int max_timeout = WATCHDOG_MAX_TIMEOUT; 85 static int timeout = WATCHDOG_TIMEOUT; /* default timeout in seconds */ 86 module_param(timeout, int, 0); 87 MODULE_PARM_DESC(timeout, 88 "Watchdog timeout in seconds. 1<= timeout <=" 89 __MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default=" 90 __MODULE_STRING(WATCHDOG_TIMEOUT) ")"); 91 92 static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH; 93 module_param(pulse_width, uint, 0); 94 MODULE_PARM_DESC(pulse_width, 95 "Watchdog signal pulse width. 0(=level), 1, 25, 30, 125, 150, 5000 or 6000 ms" 96 " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")"); 97 98 static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN; 99 module_param(f71862fg_pin, uint, 0); 100 MODULE_PARM_DESC(f71862fg_pin, 101 "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63" 102 " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")"); 103 104 static bool nowayout = WATCHDOG_NOWAYOUT; 105 module_param(nowayout, bool, 0444); 106 MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close"); 107 108 static unsigned int start_withtimeout; 109 module_param(start_withtimeout, uint, 0); 110 MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with" 111 " given initial timeout. Zero (default) disables this feature."); 112 113 enum chips { f71808fg, f71858fg, f71862fg, f71868, f71869, f71882fg, f71889fg, 114 f81803, f81865, f81866}; 115 116 static const char *f71808e_names[] = { 117 "f71808fg", 118 "f71858fg", 119 "f71862fg", 120 "f71868", 121 "f71869", 122 "f71882fg", 123 "f71889fg", 124 "f81803", 125 "f81865", 126 "f81866", 127 }; 128 129 /* Super-I/O Function prototypes */ 130 static inline int superio_inb(int base, int reg); 131 static inline int superio_inw(int base, int reg); 132 static inline void superio_outb(int base, int reg, u8 val); 133 static inline void superio_set_bit(int base, int reg, int bit); 134 static inline void superio_clear_bit(int base, int reg, int bit); 135 static inline int superio_enter(int base); 136 static inline void superio_select(int base, int ld); 137 static inline void superio_exit(int base); 138 139 struct watchdog_data { 140 unsigned short sioaddr; 141 enum chips type; 142 unsigned long opened; 143 struct mutex lock; 144 char expect_close; 145 struct watchdog_info ident; 146 147 unsigned short timeout; 148 u8 timer_val; /* content for the wd_time register */ 149 char minutes_mode; 150 u8 pulse_val; /* pulse width flag */ 151 char pulse_mode; /* enable pulse output mode? */ 152 char caused_reboot; /* last reboot was by the watchdog */ 153 }; 154 155 static struct watchdog_data watchdog = { 156 .lock = __MUTEX_INITIALIZER(watchdog.lock), 157 }; 158 159 /* Super I/O functions */ 160 static inline int superio_inb(int base, int reg) 161 { 162 outb(reg, base); 163 return inb(base + 1); 164 } 165 166 static int superio_inw(int base, int reg) 167 { 168 int val; 169 val = superio_inb(base, reg) << 8; 170 val |= superio_inb(base, reg + 1); 171 return val; 172 } 173 174 static inline void superio_outb(int base, int reg, u8 val) 175 { 176 outb(reg, base); 177 outb(val, base + 1); 178 } 179 180 static inline void superio_set_bit(int base, int reg, int bit) 181 { 182 unsigned long val = superio_inb(base, reg); 183 __set_bit(bit, &val); 184 superio_outb(base, reg, val); 185 } 186 187 static inline void superio_clear_bit(int base, int reg, int bit) 188 { 189 unsigned long val = superio_inb(base, reg); 190 __clear_bit(bit, &val); 191 superio_outb(base, reg, val); 192 } 193 194 static inline int superio_enter(int base) 195 { 196 /* Don't step on other drivers' I/O space by accident */ 197 if (!request_muxed_region(base, 2, DRVNAME)) { 198 pr_err("I/O address 0x%04x already in use\n", (int)base); 199 return -EBUSY; 200 } 201 202 /* according to the datasheet the key must be sent twice! */ 203 outb(SIO_UNLOCK_KEY, base); 204 outb(SIO_UNLOCK_KEY, base); 205 206 return 0; 207 } 208 209 static inline void superio_select(int base, int ld) 210 { 211 outb(SIO_REG_LDSEL, base); 212 outb(ld, base + 1); 213 } 214 215 static inline void superio_exit(int base) 216 { 217 outb(SIO_LOCK_KEY, base); 218 release_region(base, 2); 219 } 220 221 static int watchdog_set_timeout(int timeout) 222 { 223 if (timeout <= 0 224 || timeout > max_timeout) { 225 pr_err("watchdog timeout out of range\n"); 226 return -EINVAL; 227 } 228 229 mutex_lock(&watchdog.lock); 230 231 watchdog.timeout = timeout; 232 if (timeout > 0xff) { 233 watchdog.timer_val = DIV_ROUND_UP(timeout, 60); 234 watchdog.minutes_mode = true; 235 } else { 236 watchdog.timer_val = timeout; 237 watchdog.minutes_mode = false; 238 } 239 240 mutex_unlock(&watchdog.lock); 241 242 return 0; 243 } 244 245 static int watchdog_set_pulse_width(unsigned int pw) 246 { 247 int err = 0; 248 unsigned int t1 = 25, t2 = 125, t3 = 5000; 249 250 if (watchdog.type == f71868) { 251 t1 = 30; 252 t2 = 150; 253 t3 = 6000; 254 } 255 256 mutex_lock(&watchdog.lock); 257 258 if (pw <= 1) { 259 watchdog.pulse_val = 0; 260 } else if (pw <= t1) { 261 watchdog.pulse_val = 1; 262 } else if (pw <= t2) { 263 watchdog.pulse_val = 2; 264 } else if (pw <= t3) { 265 watchdog.pulse_val = 3; 266 } else { 267 pr_err("pulse width out of range\n"); 268 err = -EINVAL; 269 goto exit_unlock; 270 } 271 272 watchdog.pulse_mode = pw; 273 274 exit_unlock: 275 mutex_unlock(&watchdog.lock); 276 return err; 277 } 278 279 static int watchdog_keepalive(void) 280 { 281 int err = 0; 282 283 mutex_lock(&watchdog.lock); 284 err = superio_enter(watchdog.sioaddr); 285 if (err) 286 goto exit_unlock; 287 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 288 289 if (watchdog.minutes_mode) 290 /* select minutes for timer units */ 291 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 292 F71808FG_FLAG_WD_UNIT); 293 else 294 /* select seconds for timer units */ 295 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 296 F71808FG_FLAG_WD_UNIT); 297 298 /* Set timer value */ 299 superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME, 300 watchdog.timer_val); 301 302 superio_exit(watchdog.sioaddr); 303 304 exit_unlock: 305 mutex_unlock(&watchdog.lock); 306 return err; 307 } 308 309 static int f71862fg_pin_configure(unsigned short ioaddr) 310 { 311 /* When ioaddr is non-zero the calling function has to take care of 312 mutex handling and superio preparation! */ 313 314 if (f71862fg_pin == 63) { 315 if (ioaddr) { 316 /* SPI must be disabled first to use this pin! */ 317 superio_clear_bit(ioaddr, SIO_REG_ROM_ADDR_SEL, 6); 318 superio_set_bit(ioaddr, SIO_REG_MFUNCT3, 4); 319 } 320 } else if (f71862fg_pin == 56) { 321 if (ioaddr) 322 superio_set_bit(ioaddr, SIO_REG_MFUNCT1, 1); 323 } else { 324 pr_err("Invalid argument f71862fg_pin=%d\n", f71862fg_pin); 325 return -EINVAL; 326 } 327 return 0; 328 } 329 330 static int watchdog_start(void) 331 { 332 int err; 333 u8 tmp; 334 335 /* Make sure we don't die as soon as the watchdog is enabled below */ 336 err = watchdog_keepalive(); 337 if (err) 338 return err; 339 340 mutex_lock(&watchdog.lock); 341 err = superio_enter(watchdog.sioaddr); 342 if (err) 343 goto exit_unlock; 344 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 345 346 /* Watchdog pin configuration */ 347 switch (watchdog.type) { 348 case f71808fg: 349 /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */ 350 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3); 351 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3); 352 break; 353 354 case f71862fg: 355 err = f71862fg_pin_configure(watchdog.sioaddr); 356 if (err) 357 goto exit_superio; 358 break; 359 360 case f71868: 361 case f71869: 362 /* GPIO14 --> WDTRST# */ 363 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4); 364 break; 365 366 case f71882fg: 367 /* Set pin 56 to WDTRST# */ 368 superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1); 369 break; 370 371 case f71889fg: 372 /* set pin 40 to WDTRST# */ 373 superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3, 374 superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf); 375 break; 376 377 case f81803: 378 /* Enable TSI Level register bank */ 379 superio_clear_bit(watchdog.sioaddr, SIO_REG_CLOCK_SEL, 3); 380 /* Set pin 27 to WDTRST# */ 381 superio_outb(watchdog.sioaddr, SIO_REG_TSI_LEVEL_SEL, 0x5f & 382 superio_inb(watchdog.sioaddr, SIO_REG_TSI_LEVEL_SEL)); 383 break; 384 385 case f81865: 386 /* Set pin 70 to WDTRST# */ 387 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 5); 388 break; 389 390 case f81866: 391 /* 392 * GPIO1 Control Register when 27h BIT3:2 = 01 & BIT0 = 0. 393 * The PIN 70(GPIO15/WDTRST) is controlled by 2Ch: 394 * BIT5: 0 -> WDTRST# 395 * 1 -> GPIO15 396 */ 397 tmp = superio_inb(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL); 398 tmp &= ~(BIT(3) | BIT(0)); 399 tmp |= BIT(2); 400 superio_outb(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, tmp); 401 402 superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_GPIO1, 5); 403 break; 404 405 default: 406 /* 407 * 'default' label to shut up the compiler and catch 408 * programmer errors 409 */ 410 err = -ENODEV; 411 goto exit_superio; 412 } 413 414 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 415 superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0); 416 417 if (watchdog.type == f81865 || watchdog.type == f81866) 418 superio_set_bit(watchdog.sioaddr, F81865_REG_WDO_CONF, 419 F81865_FLAG_WDOUT_EN); 420 else 421 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF, 422 F71808FG_FLAG_WDOUT_EN); 423 424 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 425 F71808FG_FLAG_WD_EN); 426 427 if (watchdog.pulse_mode) { 428 /* Select "pulse" output mode with given duration */ 429 u8 wdt_conf = superio_inb(watchdog.sioaddr, 430 F71808FG_REG_WDT_CONF); 431 432 /* Set WD_PSWIDTH bits (1:0) */ 433 wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03); 434 /* Set WD_PULSE to "pulse" mode */ 435 wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE); 436 437 superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 438 wdt_conf); 439 } else { 440 /* Select "level" output mode */ 441 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 442 F71808FG_FLAG_WD_PULSE); 443 } 444 445 exit_superio: 446 superio_exit(watchdog.sioaddr); 447 exit_unlock: 448 mutex_unlock(&watchdog.lock); 449 450 return err; 451 } 452 453 static int watchdog_stop(void) 454 { 455 int err = 0; 456 457 mutex_lock(&watchdog.lock); 458 err = superio_enter(watchdog.sioaddr); 459 if (err) 460 goto exit_unlock; 461 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 462 463 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 464 F71808FG_FLAG_WD_EN); 465 466 superio_exit(watchdog.sioaddr); 467 468 exit_unlock: 469 mutex_unlock(&watchdog.lock); 470 471 return err; 472 } 473 474 static int watchdog_get_status(void) 475 { 476 int status = 0; 477 478 mutex_lock(&watchdog.lock); 479 status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0; 480 mutex_unlock(&watchdog.lock); 481 482 return status; 483 } 484 485 static bool watchdog_is_running(void) 486 { 487 /* 488 * if we fail to determine the watchdog's status assume it to be 489 * running to be on the safe side 490 */ 491 bool is_running = true; 492 493 mutex_lock(&watchdog.lock); 494 if (superio_enter(watchdog.sioaddr)) 495 goto exit_unlock; 496 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 497 498 is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0)) 499 && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF) 500 & BIT(F71808FG_FLAG_WD_EN)); 501 502 superio_exit(watchdog.sioaddr); 503 504 exit_unlock: 505 mutex_unlock(&watchdog.lock); 506 return is_running; 507 } 508 509 /* /dev/watchdog api */ 510 511 static int watchdog_open(struct inode *inode, struct file *file) 512 { 513 int err; 514 515 /* If the watchdog is alive we don't need to start it again */ 516 if (test_and_set_bit(0, &watchdog.opened)) 517 return -EBUSY; 518 519 err = watchdog_start(); 520 if (err) { 521 clear_bit(0, &watchdog.opened); 522 return err; 523 } 524 525 if (nowayout) 526 __module_get(THIS_MODULE); 527 528 watchdog.expect_close = 0; 529 return stream_open(inode, file); 530 } 531 532 static int watchdog_release(struct inode *inode, struct file *file) 533 { 534 clear_bit(0, &watchdog.opened); 535 536 if (!watchdog.expect_close) { 537 watchdog_keepalive(); 538 pr_crit("Unexpected close, not stopping watchdog!\n"); 539 } else if (!nowayout) { 540 watchdog_stop(); 541 } 542 return 0; 543 } 544 545 /* 546 * watchdog_write: 547 * @file: file handle to the watchdog 548 * @buf: buffer to write 549 * @count: count of bytes 550 * @ppos: pointer to the position to write. No seeks allowed 551 * 552 * A write to a watchdog device is defined as a keepalive signal. Any 553 * write of data will do, as we we don't define content meaning. 554 */ 555 556 static ssize_t watchdog_write(struct file *file, const char __user *buf, 557 size_t count, loff_t *ppos) 558 { 559 if (count) { 560 if (!nowayout) { 561 size_t i; 562 563 /* In case it was set long ago */ 564 bool expect_close = false; 565 566 for (i = 0; i != count; i++) { 567 char c; 568 if (get_user(c, buf + i)) 569 return -EFAULT; 570 if (c == 'V') 571 expect_close = true; 572 } 573 574 /* Properly order writes across fork()ed processes */ 575 mutex_lock(&watchdog.lock); 576 watchdog.expect_close = expect_close; 577 mutex_unlock(&watchdog.lock); 578 } 579 580 /* someone wrote to us, we should restart timer */ 581 watchdog_keepalive(); 582 } 583 return count; 584 } 585 586 /* 587 * watchdog_ioctl: 588 * @inode: inode of the device 589 * @file: file handle to the device 590 * @cmd: watchdog command 591 * @arg: argument pointer 592 * 593 * The watchdog API defines a common set of functions for all watchdogs 594 * according to their available features. 595 */ 596 static long watchdog_ioctl(struct file *file, unsigned int cmd, 597 unsigned long arg) 598 { 599 int status; 600 int new_options; 601 int new_timeout; 602 union { 603 struct watchdog_info __user *ident; 604 int __user *i; 605 } uarg; 606 607 uarg.i = (int __user *)arg; 608 609 switch (cmd) { 610 case WDIOC_GETSUPPORT: 611 return copy_to_user(uarg.ident, &watchdog.ident, 612 sizeof(watchdog.ident)) ? -EFAULT : 0; 613 614 case WDIOC_GETSTATUS: 615 status = watchdog_get_status(); 616 if (status < 0) 617 return status; 618 return put_user(status, uarg.i); 619 620 case WDIOC_GETBOOTSTATUS: 621 return put_user(0, uarg.i); 622 623 case WDIOC_SETOPTIONS: 624 if (get_user(new_options, uarg.i)) 625 return -EFAULT; 626 627 if (new_options & WDIOS_DISABLECARD) 628 watchdog_stop(); 629 630 if (new_options & WDIOS_ENABLECARD) 631 return watchdog_start(); 632 /* fall through */ 633 634 case WDIOC_KEEPALIVE: 635 watchdog_keepalive(); 636 return 0; 637 638 case WDIOC_SETTIMEOUT: 639 if (get_user(new_timeout, uarg.i)) 640 return -EFAULT; 641 642 if (watchdog_set_timeout(new_timeout)) 643 return -EINVAL; 644 645 watchdog_keepalive(); 646 /* fall through */ 647 648 case WDIOC_GETTIMEOUT: 649 return put_user(watchdog.timeout, uarg.i); 650 651 default: 652 return -ENOTTY; 653 654 } 655 } 656 657 static int watchdog_notify_sys(struct notifier_block *this, unsigned long code, 658 void *unused) 659 { 660 if (code == SYS_DOWN || code == SYS_HALT) 661 watchdog_stop(); 662 return NOTIFY_DONE; 663 } 664 665 static const struct file_operations watchdog_fops = { 666 .owner = THIS_MODULE, 667 .llseek = no_llseek, 668 .open = watchdog_open, 669 .release = watchdog_release, 670 .write = watchdog_write, 671 .unlocked_ioctl = watchdog_ioctl, 672 .compat_ioctl = compat_ptr_ioctl, 673 }; 674 675 static struct miscdevice watchdog_miscdev = { 676 .minor = WATCHDOG_MINOR, 677 .name = "watchdog", 678 .fops = &watchdog_fops, 679 }; 680 681 static struct notifier_block watchdog_notifier = { 682 .notifier_call = watchdog_notify_sys, 683 }; 684 685 static int __init watchdog_init(int sioaddr) 686 { 687 int wdt_conf, err = 0; 688 689 /* No need to lock watchdog.lock here because no entry points 690 * into the module have been registered yet. 691 */ 692 watchdog.sioaddr = sioaddr; 693 watchdog.ident.options = WDIOC_SETTIMEOUT 694 | WDIOF_MAGICCLOSE 695 | WDIOF_KEEPALIVEPING; 696 697 snprintf(watchdog.ident.identity, 698 sizeof(watchdog.ident.identity), "%s watchdog", 699 f71808e_names[watchdog.type]); 700 701 err = superio_enter(sioaddr); 702 if (err) 703 return err; 704 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 705 706 wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF); 707 watchdog.caused_reboot = wdt_conf & BIT(F71808FG_FLAG_WDTMOUT_STS); 708 709 superio_exit(sioaddr); 710 711 err = watchdog_set_timeout(timeout); 712 if (err) 713 return err; 714 err = watchdog_set_pulse_width(pulse_width); 715 if (err) 716 return err; 717 718 err = register_reboot_notifier(&watchdog_notifier); 719 if (err) 720 return err; 721 722 err = misc_register(&watchdog_miscdev); 723 if (err) { 724 pr_err("cannot register miscdev on minor=%d\n", 725 watchdog_miscdev.minor); 726 goto exit_reboot; 727 } 728 729 if (start_withtimeout) { 730 if (start_withtimeout <= 0 731 || start_withtimeout > max_timeout) { 732 pr_err("starting timeout out of range\n"); 733 err = -EINVAL; 734 goto exit_miscdev; 735 } 736 737 err = watchdog_start(); 738 if (err) { 739 pr_err("cannot start watchdog timer\n"); 740 goto exit_miscdev; 741 } 742 743 mutex_lock(&watchdog.lock); 744 err = superio_enter(sioaddr); 745 if (err) 746 goto exit_unlock; 747 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 748 749 if (start_withtimeout > 0xff) { 750 /* select minutes for timer units */ 751 superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF, 752 F71808FG_FLAG_WD_UNIT); 753 superio_outb(sioaddr, F71808FG_REG_WD_TIME, 754 DIV_ROUND_UP(start_withtimeout, 60)); 755 } else { 756 /* select seconds for timer units */ 757 superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF, 758 F71808FG_FLAG_WD_UNIT); 759 superio_outb(sioaddr, F71808FG_REG_WD_TIME, 760 start_withtimeout); 761 } 762 763 superio_exit(sioaddr); 764 mutex_unlock(&watchdog.lock); 765 766 if (nowayout) 767 __module_get(THIS_MODULE); 768 769 pr_info("watchdog started with initial timeout of %u sec\n", 770 start_withtimeout); 771 } 772 773 return 0; 774 775 exit_unlock: 776 mutex_unlock(&watchdog.lock); 777 exit_miscdev: 778 misc_deregister(&watchdog_miscdev); 779 exit_reboot: 780 unregister_reboot_notifier(&watchdog_notifier); 781 782 return err; 783 } 784 785 static int __init f71808e_find(int sioaddr) 786 { 787 u16 devid; 788 int err = superio_enter(sioaddr); 789 if (err) 790 return err; 791 792 devid = superio_inw(sioaddr, SIO_REG_MANID); 793 if (devid != SIO_FINTEK_ID) { 794 pr_debug("Not a Fintek device\n"); 795 err = -ENODEV; 796 goto exit; 797 } 798 799 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID); 800 switch (devid) { 801 case SIO_F71808_ID: 802 watchdog.type = f71808fg; 803 break; 804 case SIO_F71862_ID: 805 watchdog.type = f71862fg; 806 err = f71862fg_pin_configure(0); /* validate module parameter */ 807 break; 808 case SIO_F71868_ID: 809 watchdog.type = f71868; 810 break; 811 case SIO_F71869_ID: 812 case SIO_F71869A_ID: 813 watchdog.type = f71869; 814 break; 815 case SIO_F71882_ID: 816 watchdog.type = f71882fg; 817 break; 818 case SIO_F71889_ID: 819 watchdog.type = f71889fg; 820 break; 821 case SIO_F71858_ID: 822 /* Confirmed (by datasheet) not to have a watchdog. */ 823 err = -ENODEV; 824 goto exit; 825 case SIO_F81803_ID: 826 watchdog.type = f81803; 827 break; 828 case SIO_F81865_ID: 829 watchdog.type = f81865; 830 break; 831 case SIO_F81866_ID: 832 watchdog.type = f81866; 833 break; 834 default: 835 pr_info("Unrecognized Fintek device: %04x\n", 836 (unsigned int)devid); 837 err = -ENODEV; 838 goto exit; 839 } 840 841 pr_info("Found %s watchdog chip, revision %d\n", 842 f71808e_names[watchdog.type], 843 (int)superio_inb(sioaddr, SIO_REG_DEVREV)); 844 exit: 845 superio_exit(sioaddr); 846 return err; 847 } 848 849 static int __init f71808e_init(void) 850 { 851 static const unsigned short addrs[] = { 0x2e, 0x4e }; 852 int err = -ENODEV; 853 int i; 854 855 for (i = 0; i < ARRAY_SIZE(addrs); i++) { 856 err = f71808e_find(addrs[i]); 857 if (err == 0) 858 break; 859 } 860 if (i == ARRAY_SIZE(addrs)) 861 return err; 862 863 return watchdog_init(addrs[i]); 864 } 865 866 static void __exit f71808e_exit(void) 867 { 868 if (watchdog_is_running()) { 869 pr_warn("Watchdog timer still running, stopping it\n"); 870 watchdog_stop(); 871 } 872 misc_deregister(&watchdog_miscdev); 873 unregister_reboot_notifier(&watchdog_notifier); 874 } 875 876 MODULE_DESCRIPTION("F71808E Watchdog Driver"); 877 MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>"); 878 MODULE_LICENSE("GPL"); 879 880 module_init(f71808e_init); 881 module_exit(f71808e_exit); 882