1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2013 Broadcom Corporation 4 * 5 */ 6 7 #include <linux/debugfs.h> 8 #include <linux/delay.h> 9 #include <linux/err.h> 10 #include <linux/io.h> 11 #include <linux/module.h> 12 #include <linux/of_address.h> 13 #include <linux/platform_device.h> 14 #include <linux/watchdog.h> 15 16 #define SECWDOG_CTRL_REG 0x00000000 17 #define SECWDOG_COUNT_REG 0x00000004 18 19 #define SECWDOG_RESERVED_MASK 0x1dffffff 20 #define SECWDOG_WD_LOAD_FLAG 0x10000000 21 #define SECWDOG_EN_MASK 0x08000000 22 #define SECWDOG_SRSTEN_MASK 0x04000000 23 #define SECWDOG_RES_MASK 0x00f00000 24 #define SECWDOG_COUNT_MASK 0x000fffff 25 26 #define SECWDOG_MAX_COUNT SECWDOG_COUNT_MASK 27 #define SECWDOG_CLKS_SHIFT 20 28 #define SECWDOG_MAX_RES 15 29 #define SECWDOG_DEFAULT_RESOLUTION 4 30 #define SECWDOG_MAX_TRY 1000 31 32 #define SECS_TO_TICKS(x, w) ((x) << (w)->resolution) 33 #define TICKS_TO_SECS(x, w) ((x) >> (w)->resolution) 34 35 #define BCM_KONA_WDT_NAME "bcm_kona_wdt" 36 37 struct bcm_kona_wdt { 38 void __iomem *base; 39 /* 40 * One watchdog tick is 1/(2^resolution) seconds. Resolution can take 41 * the values 0-15, meaning one tick can be 1s to 30.52us. Our default 42 * resolution of 4 means one tick is 62.5ms. 43 * 44 * The watchdog counter is 20 bits. Depending on resolution, the maximum 45 * counter value of 0xfffff expires after about 12 days (resolution 0) 46 * down to only 32s (resolution 15). The default resolution of 4 gives 47 * us a maximum of about 18 hours and 12 minutes before the watchdog 48 * times out. 49 */ 50 int resolution; 51 spinlock_t lock; 52 #ifdef CONFIG_BCM_KONA_WDT_DEBUG 53 unsigned long busy_count; 54 struct dentry *debugfs; 55 #endif 56 }; 57 58 static int secure_register_read(struct bcm_kona_wdt *wdt, uint32_t offset) 59 { 60 uint32_t val; 61 unsigned count = 0; 62 63 /* 64 * If the WD_LOAD_FLAG is set, the watchdog counter field is being 65 * updated in hardware. Once the WD timer is updated in hardware, it 66 * gets cleared. 67 */ 68 do { 69 if (unlikely(count > 1)) 70 udelay(5); 71 val = readl_relaxed(wdt->base + offset); 72 count++; 73 } while ((val & SECWDOG_WD_LOAD_FLAG) && count < SECWDOG_MAX_TRY); 74 75 #ifdef CONFIG_BCM_KONA_WDT_DEBUG 76 /* Remember the maximum number iterations due to WD_LOAD_FLAG */ 77 if (count > wdt->busy_count) 78 wdt->busy_count = count; 79 #endif 80 81 /* This is the only place we return a negative value. */ 82 if (val & SECWDOG_WD_LOAD_FLAG) 83 return -ETIMEDOUT; 84 85 /* We always mask out reserved bits. */ 86 val &= SECWDOG_RESERVED_MASK; 87 88 return val; 89 } 90 91 #ifdef CONFIG_BCM_KONA_WDT_DEBUG 92 93 static int bcm_kona_wdt_dbg_show(struct seq_file *s, void *data) 94 { 95 int ctl_val, cur_val; 96 unsigned long flags; 97 struct bcm_kona_wdt *wdt = s->private; 98 99 if (!wdt) { 100 seq_puts(s, "No device pointer\n"); 101 return 0; 102 } 103 104 spin_lock_irqsave(&wdt->lock, flags); 105 ctl_val = secure_register_read(wdt, SECWDOG_CTRL_REG); 106 cur_val = secure_register_read(wdt, SECWDOG_COUNT_REG); 107 spin_unlock_irqrestore(&wdt->lock, flags); 108 109 if (ctl_val < 0 || cur_val < 0) { 110 seq_puts(s, "Error accessing hardware\n"); 111 } else { 112 int ctl, cur, ctl_sec, cur_sec, res; 113 114 ctl = ctl_val & SECWDOG_COUNT_MASK; 115 res = (ctl_val & SECWDOG_RES_MASK) >> SECWDOG_CLKS_SHIFT; 116 cur = cur_val & SECWDOG_COUNT_MASK; 117 ctl_sec = TICKS_TO_SECS(ctl, wdt); 118 cur_sec = TICKS_TO_SECS(cur, wdt); 119 seq_printf(s, 120 "Resolution: %d / %d\n" 121 "Control: %d s / %d (%#x) ticks\n" 122 "Current: %d s / %d (%#x) ticks\n" 123 "Busy count: %lu\n", 124 res, wdt->resolution, 125 ctl_sec, ctl, ctl, 126 cur_sec, cur, cur, 127 wdt->busy_count); 128 } 129 130 return 0; 131 } 132 133 static int bcm_kona_dbg_open(struct inode *inode, struct file *file) 134 { 135 return single_open(file, bcm_kona_wdt_dbg_show, inode->i_private); 136 } 137 138 static const struct file_operations bcm_kona_dbg_operations = { 139 .open = bcm_kona_dbg_open, 140 .read = seq_read, 141 .llseek = seq_lseek, 142 .release = single_release, 143 }; 144 145 static void bcm_kona_wdt_debug_init(struct platform_device *pdev) 146 { 147 struct dentry *dir; 148 struct bcm_kona_wdt *wdt = platform_get_drvdata(pdev); 149 150 if (!wdt) 151 return; 152 153 wdt->debugfs = NULL; 154 155 dir = debugfs_create_dir(BCM_KONA_WDT_NAME, NULL); 156 if (IS_ERR_OR_NULL(dir)) 157 return; 158 159 if (debugfs_create_file("info", S_IFREG | S_IRUGO, dir, wdt, 160 &bcm_kona_dbg_operations)) 161 wdt->debugfs = dir; 162 else 163 debugfs_remove_recursive(dir); 164 } 165 166 static void bcm_kona_wdt_debug_exit(struct platform_device *pdev) 167 { 168 struct bcm_kona_wdt *wdt = platform_get_drvdata(pdev); 169 170 if (wdt && wdt->debugfs) { 171 debugfs_remove_recursive(wdt->debugfs); 172 wdt->debugfs = NULL; 173 } 174 } 175 176 #else 177 178 static void bcm_kona_wdt_debug_init(struct platform_device *pdev) {} 179 static void bcm_kona_wdt_debug_exit(struct platform_device *pdev) {} 180 181 #endif /* CONFIG_BCM_KONA_WDT_DEBUG */ 182 183 static int bcm_kona_wdt_ctrl_reg_modify(struct bcm_kona_wdt *wdt, 184 unsigned mask, unsigned newval) 185 { 186 int val; 187 unsigned long flags; 188 int ret = 0; 189 190 spin_lock_irqsave(&wdt->lock, flags); 191 192 val = secure_register_read(wdt, SECWDOG_CTRL_REG); 193 if (val < 0) { 194 ret = val; 195 } else { 196 val &= ~mask; 197 val |= newval; 198 writel_relaxed(val, wdt->base + SECWDOG_CTRL_REG); 199 } 200 201 spin_unlock_irqrestore(&wdt->lock, flags); 202 203 return ret; 204 } 205 206 static int bcm_kona_wdt_set_resolution_reg(struct bcm_kona_wdt *wdt) 207 { 208 if (wdt->resolution > SECWDOG_MAX_RES) 209 return -EINVAL; 210 211 return bcm_kona_wdt_ctrl_reg_modify(wdt, SECWDOG_RES_MASK, 212 wdt->resolution << SECWDOG_CLKS_SHIFT); 213 } 214 215 static int bcm_kona_wdt_set_timeout_reg(struct watchdog_device *wdog, 216 unsigned watchdog_flags) 217 { 218 struct bcm_kona_wdt *wdt = watchdog_get_drvdata(wdog); 219 220 return bcm_kona_wdt_ctrl_reg_modify(wdt, SECWDOG_COUNT_MASK, 221 SECS_TO_TICKS(wdog->timeout, wdt) | 222 watchdog_flags); 223 } 224 225 static int bcm_kona_wdt_set_timeout(struct watchdog_device *wdog, 226 unsigned int t) 227 { 228 wdog->timeout = t; 229 return 0; 230 } 231 232 static unsigned int bcm_kona_wdt_get_timeleft(struct watchdog_device *wdog) 233 { 234 struct bcm_kona_wdt *wdt = watchdog_get_drvdata(wdog); 235 int val; 236 unsigned long flags; 237 238 spin_lock_irqsave(&wdt->lock, flags); 239 val = secure_register_read(wdt, SECWDOG_COUNT_REG); 240 spin_unlock_irqrestore(&wdt->lock, flags); 241 242 if (val < 0) 243 return val; 244 245 return TICKS_TO_SECS(val & SECWDOG_COUNT_MASK, wdt); 246 } 247 248 static int bcm_kona_wdt_start(struct watchdog_device *wdog) 249 { 250 return bcm_kona_wdt_set_timeout_reg(wdog, 251 SECWDOG_EN_MASK | SECWDOG_SRSTEN_MASK); 252 } 253 254 static int bcm_kona_wdt_stop(struct watchdog_device *wdog) 255 { 256 struct bcm_kona_wdt *wdt = watchdog_get_drvdata(wdog); 257 258 return bcm_kona_wdt_ctrl_reg_modify(wdt, SECWDOG_EN_MASK | 259 SECWDOG_SRSTEN_MASK, 0); 260 } 261 262 static const struct watchdog_ops bcm_kona_wdt_ops = { 263 .owner = THIS_MODULE, 264 .start = bcm_kona_wdt_start, 265 .stop = bcm_kona_wdt_stop, 266 .set_timeout = bcm_kona_wdt_set_timeout, 267 .get_timeleft = bcm_kona_wdt_get_timeleft, 268 }; 269 270 static const struct watchdog_info bcm_kona_wdt_info = { 271 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | 272 WDIOF_KEEPALIVEPING, 273 .identity = "Broadcom Kona Watchdog Timer", 274 }; 275 276 static struct watchdog_device bcm_kona_wdt_wdd = { 277 .info = &bcm_kona_wdt_info, 278 .ops = &bcm_kona_wdt_ops, 279 .min_timeout = 1, 280 .max_timeout = SECWDOG_MAX_COUNT >> SECWDOG_DEFAULT_RESOLUTION, 281 .timeout = SECWDOG_MAX_COUNT >> SECWDOG_DEFAULT_RESOLUTION, 282 }; 283 284 static void bcm_kona_wdt_shutdown(struct platform_device *pdev) 285 { 286 bcm_kona_wdt_stop(&bcm_kona_wdt_wdd); 287 } 288 289 static int bcm_kona_wdt_probe(struct platform_device *pdev) 290 { 291 struct device *dev = &pdev->dev; 292 struct bcm_kona_wdt *wdt; 293 struct resource *res; 294 int ret; 295 296 wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL); 297 if (!wdt) 298 return -ENOMEM; 299 300 spin_lock_init(&wdt->lock); 301 302 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 303 wdt->base = devm_ioremap_resource(dev, res); 304 if (IS_ERR(wdt->base)) 305 return -ENODEV; 306 307 wdt->resolution = SECWDOG_DEFAULT_RESOLUTION; 308 ret = bcm_kona_wdt_set_resolution_reg(wdt); 309 if (ret) { 310 dev_err(dev, "Failed to set resolution (error: %d)", ret); 311 return ret; 312 } 313 314 platform_set_drvdata(pdev, wdt); 315 watchdog_set_drvdata(&bcm_kona_wdt_wdd, wdt); 316 bcm_kona_wdt_wdd.parent = &pdev->dev; 317 318 ret = bcm_kona_wdt_set_timeout_reg(&bcm_kona_wdt_wdd, 0); 319 if (ret) { 320 dev_err(dev, "Failed set watchdog timeout"); 321 return ret; 322 } 323 324 ret = watchdog_register_device(&bcm_kona_wdt_wdd); 325 if (ret) { 326 dev_err(dev, "Failed to register watchdog device"); 327 return ret; 328 } 329 330 bcm_kona_wdt_debug_init(pdev); 331 dev_dbg(dev, "Broadcom Kona Watchdog Timer"); 332 333 return 0; 334 } 335 336 static int bcm_kona_wdt_remove(struct platform_device *pdev) 337 { 338 bcm_kona_wdt_debug_exit(pdev); 339 bcm_kona_wdt_shutdown(pdev); 340 watchdog_unregister_device(&bcm_kona_wdt_wdd); 341 dev_dbg(&pdev->dev, "Watchdog driver disabled"); 342 343 return 0; 344 } 345 346 static const struct of_device_id bcm_kona_wdt_of_match[] = { 347 { .compatible = "brcm,kona-wdt", }, 348 {}, 349 }; 350 MODULE_DEVICE_TABLE(of, bcm_kona_wdt_of_match); 351 352 static struct platform_driver bcm_kona_wdt_driver = { 353 .driver = { 354 .name = BCM_KONA_WDT_NAME, 355 .of_match_table = bcm_kona_wdt_of_match, 356 }, 357 .probe = bcm_kona_wdt_probe, 358 .remove = bcm_kona_wdt_remove, 359 .shutdown = bcm_kona_wdt_shutdown, 360 }; 361 362 module_platform_driver(bcm_kona_wdt_driver); 363 364 MODULE_ALIAS("platform:" BCM_KONA_WDT_NAME); 365 MODULE_AUTHOR("Markus Mayer <mmayer@broadcom.com>"); 366 MODULE_DESCRIPTION("Broadcom Kona Watchdog Driver"); 367 MODULE_LICENSE("GPL v2"); 368