1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * drivers/watchdog/at91sam9_wdt.h 4 * 5 * Copyright (C) 2007 Andrew Victor 6 * Copyright (C) 2007 Atmel Corporation. 7 * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries 8 * 9 * Watchdog Timer (WDT) - System peripherals regsters. 10 * Based on AT91SAM9261 datasheet revision D. 11 * Based on SAM9X60 datasheet. 12 * 13 */ 14 15 #ifndef AT91_WDT_H 16 #define AT91_WDT_H 17 18 #include <linux/bits.h> 19 20 #define AT91_WDT_CR 0x00 /* Watchdog Control Register */ 21 #define AT91_WDT_WDRSTT BIT(0) /* Restart */ 22 #define AT91_WDT_KEY (0xa5UL << 24) /* KEY Password */ 23 24 #define AT91_WDT_MR 0x04 /* Watchdog Mode Register */ 25 #define AT91_WDT_WDV (0xfffUL << 0) /* Counter Value */ 26 #define AT91_WDT_SET_WDV(x) ((x) & AT91_WDT_WDV) 27 #define AT91_WDT_WDFIEN BIT(12) /* Fault Interrupt Enable */ 28 #define AT91_WDT_WDRSTEN BIT(13) /* Reset Processor */ 29 #define AT91_WDT_WDRPROC BIT(14) /* Timer Restart */ 30 #define AT91_WDT_WDDIS BIT(15) /* Watchdog Disable */ 31 #define AT91_WDT_WDD (0xfffUL << 16) /* Delta Value */ 32 #define AT91_WDT_SET_WDD(x) (((x) << 16) & AT91_WDT_WDD) 33 #define AT91_WDT_WDDBGHLT BIT(28) /* Debug Halt */ 34 #define AT91_WDT_WDIDLEHLT BIT(29) /* Idle Halt */ 35 36 #define AT91_WDT_SR 0x08 /* Watchdog Status Register */ 37 #define AT91_WDT_WDUNF BIT(0) /* Watchdog Underflow */ 38 #define AT91_WDT_WDERR BIT(1) /* Watchdog Error */ 39 40 #endif 41