1e6bb42e3SRenaud CERRATO /* 2e6bb42e3SRenaud CERRATO * Watchdog driver for Atmel AT91SAM9x processors. 3e6bb42e3SRenaud CERRATO * 4e6bb42e3SRenaud CERRATO * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr 5e6bb42e3SRenaud CERRATO * 6e6bb42e3SRenaud CERRATO * This program is free software; you can redistribute it and/or 7e6bb42e3SRenaud CERRATO * modify it under the terms of the GNU General Public License 8e6bb42e3SRenaud CERRATO * as published by the Free Software Foundation; either version 9e6bb42e3SRenaud CERRATO * 2 of the License, or (at your option) any later version. 10e6bb42e3SRenaud CERRATO */ 11e6bb42e3SRenaud CERRATO 12e6bb42e3SRenaud CERRATO /* 13e6bb42e3SRenaud CERRATO * The Watchdog Timer Mode Register can be only written to once. If the 14e6bb42e3SRenaud CERRATO * timeout need to be set from Linux, be sure that the bootstrap or the 15e6bb42e3SRenaud CERRATO * bootloader doesn't write to this register. 16e6bb42e3SRenaud CERRATO */ 17e6bb42e3SRenaud CERRATO 1827c766aaSJoe Perches #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 1927c766aaSJoe Perches 20e6bb42e3SRenaud CERRATO #include <linux/errno.h> 21e6bb42e3SRenaud CERRATO #include <linux/init.h> 225161b31dSBoris BREZILLON #include <linux/interrupt.h> 232af29b78SAndrew Victor #include <linux/io.h> 24e6bb42e3SRenaud CERRATO #include <linux/kernel.h> 25e6bb42e3SRenaud CERRATO #include <linux/module.h> 26e6bb42e3SRenaud CERRATO #include <linux/moduleparam.h> 27e6bb42e3SRenaud CERRATO #include <linux/platform_device.h> 285161b31dSBoris BREZILLON #include <linux/reboot.h> 29e6bb42e3SRenaud CERRATO #include <linux/types.h> 30e6bb42e3SRenaud CERRATO #include <linux/watchdog.h> 31e6bb42e3SRenaud CERRATO #include <linux/jiffies.h> 32e6bb42e3SRenaud CERRATO #include <linux/timer.h> 33e6bb42e3SRenaud CERRATO #include <linux/bitops.h> 34e6bb42e3SRenaud CERRATO #include <linux/uaccess.h> 35be49bbaeSFabio Porcedda #include <linux/of.h> 365161b31dSBoris BREZILLON #include <linux/of_irq.h> 37e6bb42e3SRenaud CERRATO 38e7b39145SJean-Christophe Plagniol-Villard #include "at91sam9_wdt.h" 39e6bb42e3SRenaud CERRATO 40e6bb42e3SRenaud CERRATO #define DRV_NAME "AT91SAM9 Watchdog" 41e6bb42e3SRenaud CERRATO 425161b31dSBoris BREZILLON #define wdt_read(wdt, field) \ 435161b31dSBoris BREZILLON __raw_readl((wdt)->base + (field)) 445161b31dSBoris BREZILLON #define wdt_write(wtd, field, val) \ 455161b31dSBoris BREZILLON __raw_writel((val), (wdt)->base + (field)) 46c1c30a29SJean-Christophe PLAGNIOL-VILLARD 47e6bb42e3SRenaud CERRATO /* AT91SAM9 watchdog runs a 12bit counter @ 256Hz, 48e6bb42e3SRenaud CERRATO * use this to convert a watchdog 49e6bb42e3SRenaud CERRATO * value from/to milliseconds. 50e6bb42e3SRenaud CERRATO */ 515161b31dSBoris BREZILLON #define ticks_to_hz_rounddown(t) ((((t) + 1) * HZ) >> 8) 525161b31dSBoris BREZILLON #define ticks_to_hz_roundup(t) (((((t) + 1) * HZ) + 255) >> 8) 535161b31dSBoris BREZILLON #define ticks_to_secs(t) (((t) + 1) >> 8) 541444797fSBoris BREZILLON #define secs_to_ticks(s) ((s) ? (((s) << 8) - 1) : 0) 555161b31dSBoris BREZILLON 565161b31dSBoris BREZILLON #define WDT_MR_RESET 0x3FFF2FFF 575161b31dSBoris BREZILLON 585161b31dSBoris BREZILLON /* Watchdog max counter value in ticks */ 595161b31dSBoris BREZILLON #define WDT_COUNTER_MAX_TICKS 0xFFF 605161b31dSBoris BREZILLON 615161b31dSBoris BREZILLON /* Watchdog max delta/value in secs */ 625161b31dSBoris BREZILLON #define WDT_COUNTER_MAX_SECS ticks_to_secs(WDT_COUNTER_MAX_TICKS) 63e6bb42e3SRenaud CERRATO 64e6bb42e3SRenaud CERRATO /* Hardware timeout in seconds */ 65e6bb42e3SRenaud CERRATO #define WDT_HW_TIMEOUT 2 66e6bb42e3SRenaud CERRATO 67e6bb42e3SRenaud CERRATO /* Timer heartbeat (500ms) */ 68e6bb42e3SRenaud CERRATO #define WDT_TIMEOUT (HZ/2) 69e6bb42e3SRenaud CERRATO 70e6bb42e3SRenaud CERRATO /* User land timeout */ 71e6bb42e3SRenaud CERRATO #define WDT_HEARTBEAT 15 72c1fd5f64SFabio Porcedda static int heartbeat; 73e6bb42e3SRenaud CERRATO module_param(heartbeat, int, 0); 74e6bb42e3SRenaud CERRATO MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. " 75e6bb42e3SRenaud CERRATO "(default = " __MODULE_STRING(WDT_HEARTBEAT) ")"); 76e6bb42e3SRenaud CERRATO 7786a1e189SWim Van Sebroeck static bool nowayout = WATCHDOG_NOWAYOUT; 7886a1e189SWim Van Sebroeck module_param(nowayout, bool, 0); 79e6bb42e3SRenaud CERRATO MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started " 80e6bb42e3SRenaud CERRATO "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 81e6bb42e3SRenaud CERRATO 825161b31dSBoris BREZILLON #define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd) 835161b31dSBoris BREZILLON struct at91wdt { 845161b31dSBoris BREZILLON struct watchdog_device wdd; 85c1c30a29SJean-Christophe PLAGNIOL-VILLARD void __iomem *base; 86e6bb42e3SRenaud CERRATO unsigned long next_heartbeat; /* the next_heartbeat for the timer */ 87e6bb42e3SRenaud CERRATO struct timer_list timer; /* The timer that pings the watchdog */ 885161b31dSBoris BREZILLON u32 mr; 895161b31dSBoris BREZILLON u32 mr_mask; 905161b31dSBoris BREZILLON unsigned long heartbeat; /* WDT heartbeat in jiffies */ 915161b31dSBoris BREZILLON bool nowayout; 925161b31dSBoris BREZILLON unsigned int irq; 935161b31dSBoris BREZILLON }; 94e6bb42e3SRenaud CERRATO 95e6bb42e3SRenaud CERRATO /* ......................................................................... */ 96e6bb42e3SRenaud CERRATO 975161b31dSBoris BREZILLON static irqreturn_t wdt_interrupt(int irq, void *dev_id) 985161b31dSBoris BREZILLON { 995161b31dSBoris BREZILLON struct at91wdt *wdt = (struct at91wdt *)dev_id; 1005161b31dSBoris BREZILLON 1015161b31dSBoris BREZILLON if (wdt_read(wdt, AT91_WDT_SR)) { 1025161b31dSBoris BREZILLON pr_crit("at91sam9 WDT software reset\n"); 1035161b31dSBoris BREZILLON emergency_restart(); 1045161b31dSBoris BREZILLON pr_crit("Reboot didn't ?????\n"); 1055161b31dSBoris BREZILLON } 1065161b31dSBoris BREZILLON 1075161b31dSBoris BREZILLON return IRQ_HANDLED; 1085161b31dSBoris BREZILLON } 1095161b31dSBoris BREZILLON 110e6bb42e3SRenaud CERRATO /* 111e6bb42e3SRenaud CERRATO * Reload the watchdog timer. (ie, pat the watchdog) 112e6bb42e3SRenaud CERRATO */ 1135161b31dSBoris BREZILLON static inline void at91_wdt_reset(struct at91wdt *wdt) 114e6bb42e3SRenaud CERRATO { 1155161b31dSBoris BREZILLON wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT); 116e6bb42e3SRenaud CERRATO } 117e6bb42e3SRenaud CERRATO 118e6bb42e3SRenaud CERRATO /* 119e6bb42e3SRenaud CERRATO * Timer tick 120e6bb42e3SRenaud CERRATO */ 121e6bb42e3SRenaud CERRATO static void at91_ping(unsigned long data) 122e6bb42e3SRenaud CERRATO { 1235161b31dSBoris BREZILLON struct at91wdt *wdt = (struct at91wdt *)data; 1245161b31dSBoris BREZILLON if (time_before(jiffies, wdt->next_heartbeat) || 1255161b31dSBoris BREZILLON !watchdog_active(&wdt->wdd)) { 1265161b31dSBoris BREZILLON at91_wdt_reset(wdt); 1275161b31dSBoris BREZILLON mod_timer(&wdt->timer, jiffies + wdt->heartbeat); 1285161b31dSBoris BREZILLON } else { 12927c766aaSJoe Perches pr_crit("I will reset your machine !\n"); 130e6bb42e3SRenaud CERRATO } 131e6bb42e3SRenaud CERRATO } 132e6bb42e3SRenaud CERRATO 133490ac7afSWenyou Yang static int at91_wdt_start(struct watchdog_device *wdd) 134e6bb42e3SRenaud CERRATO { 1355161b31dSBoris BREZILLON struct at91wdt *wdt = to_wdt(wdd); 1365161b31dSBoris BREZILLON /* calculate when the next userspace timeout will be */ 1375161b31dSBoris BREZILLON wdt->next_heartbeat = jiffies + wdd->timeout * HZ; 138490ac7afSWenyou Yang return 0; 139490ac7afSWenyou Yang } 140e6bb42e3SRenaud CERRATO 141490ac7afSWenyou Yang static int at91_wdt_stop(struct watchdog_device *wdd) 142490ac7afSWenyou Yang { 143490ac7afSWenyou Yang /* The watchdog timer hardware can not be stopped... */ 144490ac7afSWenyou Yang return 0; 145490ac7afSWenyou Yang } 146e6bb42e3SRenaud CERRATO 147490ac7afSWenyou Yang static int at91_wdt_set_timeout(struct watchdog_device *wdd, unsigned int new_timeout) 148490ac7afSWenyou Yang { 149490ac7afSWenyou Yang wdd->timeout = new_timeout; 1505161b31dSBoris BREZILLON return at91_wdt_start(wdd); 151e6bb42e3SRenaud CERRATO } 152e6bb42e3SRenaud CERRATO 1535161b31dSBoris BREZILLON static int at91_wdt_init(struct platform_device *pdev, struct at91wdt *wdt) 154e6bb42e3SRenaud CERRATO { 1555161b31dSBoris BREZILLON u32 tmp; 1565161b31dSBoris BREZILLON u32 delta; 1575161b31dSBoris BREZILLON u32 value; 1585161b31dSBoris BREZILLON int err; 1595161b31dSBoris BREZILLON u32 mask = wdt->mr_mask; 1605161b31dSBoris BREZILLON unsigned long min_heartbeat = 1; 161*f72fa00fSBoris BREZILLON unsigned long max_heartbeat; 1625161b31dSBoris BREZILLON struct device *dev = &pdev->dev; 163e6bb42e3SRenaud CERRATO 1645161b31dSBoris BREZILLON tmp = wdt_read(wdt, AT91_WDT_MR); 1655161b31dSBoris BREZILLON if ((tmp & mask) != (wdt->mr & mask)) { 1665161b31dSBoris BREZILLON if (tmp == WDT_MR_RESET) { 1675161b31dSBoris BREZILLON wdt_write(wdt, AT91_WDT_MR, wdt->mr); 1685161b31dSBoris BREZILLON tmp = wdt_read(wdt, AT91_WDT_MR); 1695161b31dSBoris BREZILLON } 170e6bb42e3SRenaud CERRATO } 171e6bb42e3SRenaud CERRATO 1725161b31dSBoris BREZILLON if (tmp & AT91_WDT_WDDIS) { 1735161b31dSBoris BREZILLON if (wdt->mr & AT91_WDT_WDDIS) 1745161b31dSBoris BREZILLON return 0; 1755161b31dSBoris BREZILLON dev_err(dev, "watchdog is disabled\n"); 1765161b31dSBoris BREZILLON return -EINVAL; 1775161b31dSBoris BREZILLON } 1785161b31dSBoris BREZILLON 1795161b31dSBoris BREZILLON value = tmp & AT91_WDT_WDV; 1805161b31dSBoris BREZILLON delta = (tmp & AT91_WDT_WDD) >> 16; 1815161b31dSBoris BREZILLON 1825161b31dSBoris BREZILLON if (delta < value) 1835161b31dSBoris BREZILLON min_heartbeat = ticks_to_hz_roundup(value - delta); 1845161b31dSBoris BREZILLON 185*f72fa00fSBoris BREZILLON max_heartbeat = ticks_to_hz_rounddown(value); 186*f72fa00fSBoris BREZILLON if (!max_heartbeat) { 1875161b31dSBoris BREZILLON dev_err(dev, 1885161b31dSBoris BREZILLON "heartbeat is too small for the system to handle it correctly\n"); 1895161b31dSBoris BREZILLON return -EINVAL; 1905161b31dSBoris BREZILLON } 1915161b31dSBoris BREZILLON 192*f72fa00fSBoris BREZILLON /* 193*f72fa00fSBoris BREZILLON * Try to reset the watchdog counter 4 or 2 times more often than 194*f72fa00fSBoris BREZILLON * actually requested, to avoid spurious watchdog reset. 195*f72fa00fSBoris BREZILLON * If this is not possible because of the min_heartbeat value, reset 196*f72fa00fSBoris BREZILLON * it at the min_heartbeat period. 197*f72fa00fSBoris BREZILLON */ 198*f72fa00fSBoris BREZILLON if ((max_heartbeat / 4) >= min_heartbeat) 199*f72fa00fSBoris BREZILLON wdt->heartbeat = max_heartbeat / 4; 200*f72fa00fSBoris BREZILLON else if ((max_heartbeat / 2) >= min_heartbeat) 201*f72fa00fSBoris BREZILLON wdt->heartbeat = max_heartbeat / 2; 202*f72fa00fSBoris BREZILLON else 2035161b31dSBoris BREZILLON wdt->heartbeat = min_heartbeat; 204*f72fa00fSBoris BREZILLON 205*f72fa00fSBoris BREZILLON if (max_heartbeat < min_heartbeat + 4) 2065161b31dSBoris BREZILLON dev_warn(dev, 2075161b31dSBoris BREZILLON "min heartbeat and max heartbeat might be too close for the system to handle it correctly\n"); 2085161b31dSBoris BREZILLON 2095161b31dSBoris BREZILLON if ((tmp & AT91_WDT_WDFIEN) && wdt->irq) { 2105161b31dSBoris BREZILLON err = request_irq(wdt->irq, wdt_interrupt, 2115161b31dSBoris BREZILLON IRQF_SHARED | IRQF_IRQPOLL, 2125161b31dSBoris BREZILLON pdev->name, wdt); 2135161b31dSBoris BREZILLON if (err) 2145161b31dSBoris BREZILLON return err; 2155161b31dSBoris BREZILLON } 2165161b31dSBoris BREZILLON 2175161b31dSBoris BREZILLON if ((tmp & wdt->mr_mask) != (wdt->mr & wdt->mr_mask)) 2185161b31dSBoris BREZILLON dev_warn(dev, 2195161b31dSBoris BREZILLON "watchdog already configured differently (mr = %x expecting %x)\n", 2205161b31dSBoris BREZILLON tmp & wdt->mr_mask, wdt->mr & wdt->mr_mask); 2215161b31dSBoris BREZILLON 2225161b31dSBoris BREZILLON setup_timer(&wdt->timer, at91_ping, (unsigned long)wdt); 223a04c3f01SBoris BREZILLON 224a04c3f01SBoris BREZILLON /* 225a04c3f01SBoris BREZILLON * Use min_heartbeat the first time to avoid spurious watchdog reset: 226a04c3f01SBoris BREZILLON * we don't know for how long the watchdog counter is running, and 227a04c3f01SBoris BREZILLON * - resetting it right now might trigger a watchdog fault reset 228a04c3f01SBoris BREZILLON * - waiting for heartbeat time might lead to a watchdog timeout 229a04c3f01SBoris BREZILLON * reset 230a04c3f01SBoris BREZILLON */ 231a04c3f01SBoris BREZILLON mod_timer(&wdt->timer, jiffies + min_heartbeat); 2325161b31dSBoris BREZILLON 2335161b31dSBoris BREZILLON /* Try to set timeout from device tree first */ 2345161b31dSBoris BREZILLON if (watchdog_init_timeout(&wdt->wdd, 0, dev)) 2355161b31dSBoris BREZILLON watchdog_init_timeout(&wdt->wdd, heartbeat, dev); 2365161b31dSBoris BREZILLON watchdog_set_nowayout(&wdt->wdd, wdt->nowayout); 2375161b31dSBoris BREZILLON err = watchdog_register_device(&wdt->wdd); 2385161b31dSBoris BREZILLON if (err) 2395161b31dSBoris BREZILLON goto out_stop_timer; 2405161b31dSBoris BREZILLON 2415161b31dSBoris BREZILLON wdt->next_heartbeat = jiffies + wdt->wdd.timeout * HZ; 242e6bb42e3SRenaud CERRATO 243e6bb42e3SRenaud CERRATO return 0; 2445161b31dSBoris BREZILLON 2455161b31dSBoris BREZILLON out_stop_timer: 2465161b31dSBoris BREZILLON del_timer(&wdt->timer); 2475161b31dSBoris BREZILLON return err; 248e6bb42e3SRenaud CERRATO } 249e6bb42e3SRenaud CERRATO 250490ac7afSWenyou Yang /* ......................................................................... */ 251490ac7afSWenyou Yang 252e6bb42e3SRenaud CERRATO static const struct watchdog_info at91_wdt_info = { 253e6bb42e3SRenaud CERRATO .identity = DRV_NAME, 254e73a7802SWim Van Sebroeck .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | 255e73a7802SWim Van Sebroeck WDIOF_MAGICCLOSE, 256e6bb42e3SRenaud CERRATO }; 257e6bb42e3SRenaud CERRATO 258490ac7afSWenyou Yang static const struct watchdog_ops at91_wdt_ops = { 259e6bb42e3SRenaud CERRATO .owner = THIS_MODULE, 260490ac7afSWenyou Yang .start = at91_wdt_start, 261490ac7afSWenyou Yang .stop = at91_wdt_stop, 262490ac7afSWenyou Yang .set_timeout = at91_wdt_set_timeout, 263e6bb42e3SRenaud CERRATO }; 264e6bb42e3SRenaud CERRATO 2655161b31dSBoris BREZILLON #if defined(CONFIG_OF) 2665161b31dSBoris BREZILLON static int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt) 2675161b31dSBoris BREZILLON { 2685161b31dSBoris BREZILLON u32 min = 0; 2695161b31dSBoris BREZILLON u32 max = WDT_COUNTER_MAX_SECS; 2705161b31dSBoris BREZILLON const char *tmp; 2715161b31dSBoris BREZILLON 2725161b31dSBoris BREZILLON /* Get the interrupts property */ 2735161b31dSBoris BREZILLON wdt->irq = irq_of_parse_and_map(np, 0); 2745161b31dSBoris BREZILLON if (!wdt->irq) 2755161b31dSBoris BREZILLON dev_warn(wdt->wdd.parent, "failed to get IRQ from DT\n"); 2765161b31dSBoris BREZILLON 2775161b31dSBoris BREZILLON if (!of_property_read_u32_index(np, "atmel,max-heartbeat-sec", 0, 2785161b31dSBoris BREZILLON &max)) { 2795161b31dSBoris BREZILLON if (!max || max > WDT_COUNTER_MAX_SECS) 2805161b31dSBoris BREZILLON max = WDT_COUNTER_MAX_SECS; 2815161b31dSBoris BREZILLON 2825161b31dSBoris BREZILLON if (!of_property_read_u32_index(np, "atmel,min-heartbeat-sec", 2835161b31dSBoris BREZILLON 0, &min)) { 2845161b31dSBoris BREZILLON if (min >= max) 2855161b31dSBoris BREZILLON min = max - 1; 2865161b31dSBoris BREZILLON } 2875161b31dSBoris BREZILLON } 2885161b31dSBoris BREZILLON 2895161b31dSBoris BREZILLON min = secs_to_ticks(min); 2905161b31dSBoris BREZILLON max = secs_to_ticks(max); 2915161b31dSBoris BREZILLON 2925161b31dSBoris BREZILLON wdt->mr_mask = 0x3FFFFFFF; 2935161b31dSBoris BREZILLON wdt->mr = 0; 2945161b31dSBoris BREZILLON if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) && 2955161b31dSBoris BREZILLON !strcmp(tmp, "software")) { 2965161b31dSBoris BREZILLON wdt->mr |= AT91_WDT_WDFIEN; 2975161b31dSBoris BREZILLON wdt->mr_mask &= ~AT91_WDT_WDRPROC; 2985161b31dSBoris BREZILLON } else { 2995161b31dSBoris BREZILLON wdt->mr |= AT91_WDT_WDRSTEN; 3005161b31dSBoris BREZILLON } 3015161b31dSBoris BREZILLON 3025161b31dSBoris BREZILLON if (!of_property_read_string(np, "atmel,reset-type", &tmp) && 3035161b31dSBoris BREZILLON !strcmp(tmp, "proc")) 3045161b31dSBoris BREZILLON wdt->mr |= AT91_WDT_WDRPROC; 3055161b31dSBoris BREZILLON 3065161b31dSBoris BREZILLON if (of_property_read_bool(np, "atmel,disable")) { 3075161b31dSBoris BREZILLON wdt->mr |= AT91_WDT_WDDIS; 3085161b31dSBoris BREZILLON wdt->mr_mask &= AT91_WDT_WDDIS; 3095161b31dSBoris BREZILLON } 3105161b31dSBoris BREZILLON 3115161b31dSBoris BREZILLON if (of_property_read_bool(np, "atmel,idle-halt")) 3125161b31dSBoris BREZILLON wdt->mr |= AT91_WDT_WDIDLEHLT; 3135161b31dSBoris BREZILLON 3145161b31dSBoris BREZILLON if (of_property_read_bool(np, "atmel,dbg-halt")) 3155161b31dSBoris BREZILLON wdt->mr |= AT91_WDT_WDDBGHLT; 3165161b31dSBoris BREZILLON 3175161b31dSBoris BREZILLON wdt->mr |= max | ((max - min) << 16); 3185161b31dSBoris BREZILLON 3195161b31dSBoris BREZILLON return 0; 3205161b31dSBoris BREZILLON } 3215161b31dSBoris BREZILLON #else 3225161b31dSBoris BREZILLON static inline int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt) 3235161b31dSBoris BREZILLON { 3245161b31dSBoris BREZILLON return 0; 3255161b31dSBoris BREZILLON } 3265161b31dSBoris BREZILLON #endif 327e6bb42e3SRenaud CERRATO 328e6bb42e3SRenaud CERRATO static int __init at91wdt_probe(struct platform_device *pdev) 329e6bb42e3SRenaud CERRATO { 330c1c30a29SJean-Christophe PLAGNIOL-VILLARD struct resource *r; 3315161b31dSBoris BREZILLON int err; 3325161b31dSBoris BREZILLON struct at91wdt *wdt; 3335161b31dSBoris BREZILLON 3345161b31dSBoris BREZILLON wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL); 3355161b31dSBoris BREZILLON if (!wdt) 3365161b31dSBoris BREZILLON return -ENOMEM; 3375161b31dSBoris BREZILLON 3385161b31dSBoris BREZILLON wdt->mr = (WDT_HW_TIMEOUT * 256) | AT91_WDT_WDRSTEN | AT91_WDT_WDD | 3395161b31dSBoris BREZILLON AT91_WDT_WDDBGHLT | AT91_WDT_WDIDLEHLT; 3405161b31dSBoris BREZILLON wdt->mr_mask = 0x3FFFFFFF; 3415161b31dSBoris BREZILLON wdt->nowayout = nowayout; 3425161b31dSBoris BREZILLON wdt->wdd.parent = &pdev->dev; 3435161b31dSBoris BREZILLON wdt->wdd.info = &at91_wdt_info; 3445161b31dSBoris BREZILLON wdt->wdd.ops = &at91_wdt_ops; 3455161b31dSBoris BREZILLON wdt->wdd.timeout = WDT_HEARTBEAT; 3465161b31dSBoris BREZILLON wdt->wdd.min_timeout = 1; 3475161b31dSBoris BREZILLON wdt->wdd.max_timeout = 0xFFFF; 348e6bb42e3SRenaud CERRATO 349c1c30a29SJean-Christophe PLAGNIOL-VILLARD r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 3505161b31dSBoris BREZILLON wdt->base = devm_ioremap_resource(&pdev->dev, r); 3515161b31dSBoris BREZILLON if (IS_ERR(wdt->base)) 3525161b31dSBoris BREZILLON return PTR_ERR(wdt->base); 3535161b31dSBoris BREZILLON 3545161b31dSBoris BREZILLON if (pdev->dev.of_node) { 3555161b31dSBoris BREZILLON err = of_at91wdt_init(pdev->dev.of_node, wdt); 3565161b31dSBoris BREZILLON if (err) 3575161b31dSBoris BREZILLON return err; 358c1c30a29SJean-Christophe PLAGNIOL-VILLARD } 359c1c30a29SJean-Christophe PLAGNIOL-VILLARD 3605161b31dSBoris BREZILLON err = at91_wdt_init(pdev, wdt); 3615161b31dSBoris BREZILLON if (err) 3625161b31dSBoris BREZILLON return err; 363490ac7afSWenyou Yang 3645161b31dSBoris BREZILLON platform_set_drvdata(pdev, wdt); 365e6bb42e3SRenaud CERRATO 36627c766aaSJoe Perches pr_info("enabled (heartbeat=%d sec, nowayout=%d)\n", 3675161b31dSBoris BREZILLON wdt->wdd.timeout, wdt->nowayout); 368e6bb42e3SRenaud CERRATO 369e6bb42e3SRenaud CERRATO return 0; 370e6bb42e3SRenaud CERRATO } 371e6bb42e3SRenaud CERRATO 372e6bb42e3SRenaud CERRATO static int __exit at91wdt_remove(struct platform_device *pdev) 373e6bb42e3SRenaud CERRATO { 3745161b31dSBoris BREZILLON struct at91wdt *wdt = platform_get_drvdata(pdev); 3755161b31dSBoris BREZILLON watchdog_unregister_device(&wdt->wdd); 376e6bb42e3SRenaud CERRATO 377490ac7afSWenyou Yang pr_warn("I quit now, hardware will probably reboot!\n"); 3785161b31dSBoris BREZILLON del_timer(&wdt->timer); 379e6bb42e3SRenaud CERRATO 380490ac7afSWenyou Yang return 0; 381e6bb42e3SRenaud CERRATO } 382e6bb42e3SRenaud CERRATO 383be49bbaeSFabio Porcedda #if defined(CONFIG_OF) 3846c41e474SArnd Bergmann static const struct of_device_id at91_wdt_dt_ids[] = { 385be49bbaeSFabio Porcedda { .compatible = "atmel,at91sam9260-wdt" }, 386be49bbaeSFabio Porcedda { /* sentinel */ } 387be49bbaeSFabio Porcedda }; 388be49bbaeSFabio Porcedda 389be49bbaeSFabio Porcedda MODULE_DEVICE_TABLE(of, at91_wdt_dt_ids); 390be49bbaeSFabio Porcedda #endif 391be49bbaeSFabio Porcedda 392e6bb42e3SRenaud CERRATO static struct platform_driver at91wdt_driver = { 393e6bb42e3SRenaud CERRATO .remove = __exit_p(at91wdt_remove), 394e6bb42e3SRenaud CERRATO .driver = { 395e6bb42e3SRenaud CERRATO .name = "at91_wdt", 396e6bb42e3SRenaud CERRATO .owner = THIS_MODULE, 397be49bbaeSFabio Porcedda .of_match_table = of_match_ptr(at91_wdt_dt_ids), 398e6bb42e3SRenaud CERRATO }, 399e6bb42e3SRenaud CERRATO }; 400e6bb42e3SRenaud CERRATO 4011cb9204cSFabio Porcedda module_platform_driver_probe(at91wdt_driver, at91wdt_probe); 402e6bb42e3SRenaud CERRATO 403e6bb42e3SRenaud CERRATO MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>"); 404e6bb42e3SRenaud CERRATO MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors"); 405e6bb42e3SRenaud CERRATO MODULE_LICENSE("GPL"); 406