1e6bb42e3SRenaud CERRATO /* 2e6bb42e3SRenaud CERRATO * Watchdog driver for Atmel AT91SAM9x processors. 3e6bb42e3SRenaud CERRATO * 4e6bb42e3SRenaud CERRATO * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr 5e6bb42e3SRenaud CERRATO * 6e6bb42e3SRenaud CERRATO * This program is free software; you can redistribute it and/or 7e6bb42e3SRenaud CERRATO * modify it under the terms of the GNU General Public License 8e6bb42e3SRenaud CERRATO * as published by the Free Software Foundation; either version 9e6bb42e3SRenaud CERRATO * 2 of the License, or (at your option) any later version. 10e6bb42e3SRenaud CERRATO */ 11e6bb42e3SRenaud CERRATO 12e6bb42e3SRenaud CERRATO /* 13e6bb42e3SRenaud CERRATO * The Watchdog Timer Mode Register can be only written to once. If the 14e6bb42e3SRenaud CERRATO * timeout need to be set from Linux, be sure that the bootstrap or the 15e6bb42e3SRenaud CERRATO * bootloader doesn't write to this register. 16e6bb42e3SRenaud CERRATO */ 17e6bb42e3SRenaud CERRATO 1827c766aaSJoe Perches #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 1927c766aaSJoe Perches 20a97a09bdSAlexandre Belloni #include <linux/clk.h> 21e6bb42e3SRenaud CERRATO #include <linux/errno.h> 22e6bb42e3SRenaud CERRATO #include <linux/init.h> 235161b31dSBoris BREZILLON #include <linux/interrupt.h> 242af29b78SAndrew Victor #include <linux/io.h> 25e6bb42e3SRenaud CERRATO #include <linux/kernel.h> 26e6bb42e3SRenaud CERRATO #include <linux/module.h> 27e6bb42e3SRenaud CERRATO #include <linux/moduleparam.h> 28e6bb42e3SRenaud CERRATO #include <linux/platform_device.h> 295161b31dSBoris BREZILLON #include <linux/reboot.h> 30e6bb42e3SRenaud CERRATO #include <linux/types.h> 31e6bb42e3SRenaud CERRATO #include <linux/watchdog.h> 32e6bb42e3SRenaud CERRATO #include <linux/jiffies.h> 33e6bb42e3SRenaud CERRATO #include <linux/timer.h> 34e6bb42e3SRenaud CERRATO #include <linux/bitops.h> 35e6bb42e3SRenaud CERRATO #include <linux/uaccess.h> 36be49bbaeSFabio Porcedda #include <linux/of.h> 375161b31dSBoris BREZILLON #include <linux/of_irq.h> 38e6bb42e3SRenaud CERRATO 39e7b39145SJean-Christophe Plagniol-Villard #include "at91sam9_wdt.h" 40e6bb42e3SRenaud CERRATO 41e6bb42e3SRenaud CERRATO #define DRV_NAME "AT91SAM9 Watchdog" 42e6bb42e3SRenaud CERRATO 435161b31dSBoris BREZILLON #define wdt_read(wdt, field) \ 44feccebe9SBen Dooks readl_relaxed((wdt)->base + (field)) 455161b31dSBoris BREZILLON #define wdt_write(wtd, field, val) \ 46feccebe9SBen Dooks writel_relaxed((val), (wdt)->base + (field)) 47c1c30a29SJean-Christophe PLAGNIOL-VILLARD 48e6bb42e3SRenaud CERRATO /* AT91SAM9 watchdog runs a 12bit counter @ 256Hz, 49e6bb42e3SRenaud CERRATO * use this to convert a watchdog 50e6bb42e3SRenaud CERRATO * value from/to milliseconds. 51e6bb42e3SRenaud CERRATO */ 525161b31dSBoris BREZILLON #define ticks_to_hz_rounddown(t) ((((t) + 1) * HZ) >> 8) 535161b31dSBoris BREZILLON #define ticks_to_hz_roundup(t) (((((t) + 1) * HZ) + 255) >> 8) 545161b31dSBoris BREZILLON #define ticks_to_secs(t) (((t) + 1) >> 8) 551444797fSBoris BREZILLON #define secs_to_ticks(s) ((s) ? (((s) << 8) - 1) : 0) 565161b31dSBoris BREZILLON 575161b31dSBoris BREZILLON #define WDT_MR_RESET 0x3FFF2FFF 585161b31dSBoris BREZILLON 595161b31dSBoris BREZILLON /* Watchdog max counter value in ticks */ 605161b31dSBoris BREZILLON #define WDT_COUNTER_MAX_TICKS 0xFFF 615161b31dSBoris BREZILLON 625161b31dSBoris BREZILLON /* Watchdog max delta/value in secs */ 635161b31dSBoris BREZILLON #define WDT_COUNTER_MAX_SECS ticks_to_secs(WDT_COUNTER_MAX_TICKS) 64e6bb42e3SRenaud CERRATO 65e6bb42e3SRenaud CERRATO /* Hardware timeout in seconds */ 66e6bb42e3SRenaud CERRATO #define WDT_HW_TIMEOUT 2 67e6bb42e3SRenaud CERRATO 68e6bb42e3SRenaud CERRATO /* Timer heartbeat (500ms) */ 69e6bb42e3SRenaud CERRATO #define WDT_TIMEOUT (HZ/2) 70e6bb42e3SRenaud CERRATO 71e6bb42e3SRenaud CERRATO /* User land timeout */ 72e6bb42e3SRenaud CERRATO #define WDT_HEARTBEAT 15 73c1fd5f64SFabio Porcedda static int heartbeat; 74e6bb42e3SRenaud CERRATO module_param(heartbeat, int, 0); 75e6bb42e3SRenaud CERRATO MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. " 76e6bb42e3SRenaud CERRATO "(default = " __MODULE_STRING(WDT_HEARTBEAT) ")"); 77e6bb42e3SRenaud CERRATO 7886a1e189SWim Van Sebroeck static bool nowayout = WATCHDOG_NOWAYOUT; 7986a1e189SWim Van Sebroeck module_param(nowayout, bool, 0); 80e6bb42e3SRenaud CERRATO MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started " 81e6bb42e3SRenaud CERRATO "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 82e6bb42e3SRenaud CERRATO 835161b31dSBoris BREZILLON #define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd) 845161b31dSBoris BREZILLON struct at91wdt { 855161b31dSBoris BREZILLON struct watchdog_device wdd; 86c1c30a29SJean-Christophe PLAGNIOL-VILLARD void __iomem *base; 87e6bb42e3SRenaud CERRATO unsigned long next_heartbeat; /* the next_heartbeat for the timer */ 88e6bb42e3SRenaud CERRATO struct timer_list timer; /* The timer that pings the watchdog */ 895161b31dSBoris BREZILLON u32 mr; 905161b31dSBoris BREZILLON u32 mr_mask; 915161b31dSBoris BREZILLON unsigned long heartbeat; /* WDT heartbeat in jiffies */ 925161b31dSBoris BREZILLON bool nowayout; 935161b31dSBoris BREZILLON unsigned int irq; 94a97a09bdSAlexandre Belloni struct clk *sclk; 955161b31dSBoris BREZILLON }; 96e6bb42e3SRenaud CERRATO 97e6bb42e3SRenaud CERRATO /* ......................................................................... */ 98e6bb42e3SRenaud CERRATO 995161b31dSBoris BREZILLON static irqreturn_t wdt_interrupt(int irq, void *dev_id) 1005161b31dSBoris BREZILLON { 1015161b31dSBoris BREZILLON struct at91wdt *wdt = (struct at91wdt *)dev_id; 1025161b31dSBoris BREZILLON 1035161b31dSBoris BREZILLON if (wdt_read(wdt, AT91_WDT_SR)) { 1045161b31dSBoris BREZILLON pr_crit("at91sam9 WDT software reset\n"); 1055161b31dSBoris BREZILLON emergency_restart(); 1065161b31dSBoris BREZILLON pr_crit("Reboot didn't ?????\n"); 1075161b31dSBoris BREZILLON } 1085161b31dSBoris BREZILLON 1095161b31dSBoris BREZILLON return IRQ_HANDLED; 1105161b31dSBoris BREZILLON } 1115161b31dSBoris BREZILLON 112e6bb42e3SRenaud CERRATO /* 113e6bb42e3SRenaud CERRATO * Reload the watchdog timer. (ie, pat the watchdog) 114e6bb42e3SRenaud CERRATO */ 1155161b31dSBoris BREZILLON static inline void at91_wdt_reset(struct at91wdt *wdt) 116e6bb42e3SRenaud CERRATO { 1175161b31dSBoris BREZILLON wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT); 118e6bb42e3SRenaud CERRATO } 119e6bb42e3SRenaud CERRATO 120e6bb42e3SRenaud CERRATO /* 121e6bb42e3SRenaud CERRATO * Timer tick 122e6bb42e3SRenaud CERRATO */ 123*e99e88a9SKees Cook static void at91_ping(struct timer_list *t) 124e6bb42e3SRenaud CERRATO { 125*e99e88a9SKees Cook struct at91wdt *wdt = from_timer(wdt, t, timer); 1265161b31dSBoris BREZILLON if (time_before(jiffies, wdt->next_heartbeat) || 1275161b31dSBoris BREZILLON !watchdog_active(&wdt->wdd)) { 1285161b31dSBoris BREZILLON at91_wdt_reset(wdt); 1295161b31dSBoris BREZILLON mod_timer(&wdt->timer, jiffies + wdt->heartbeat); 1305161b31dSBoris BREZILLON } else { 13127c766aaSJoe Perches pr_crit("I will reset your machine !\n"); 132e6bb42e3SRenaud CERRATO } 133e6bb42e3SRenaud CERRATO } 134e6bb42e3SRenaud CERRATO 135490ac7afSWenyou Yang static int at91_wdt_start(struct watchdog_device *wdd) 136e6bb42e3SRenaud CERRATO { 1375161b31dSBoris BREZILLON struct at91wdt *wdt = to_wdt(wdd); 1385161b31dSBoris BREZILLON /* calculate when the next userspace timeout will be */ 1395161b31dSBoris BREZILLON wdt->next_heartbeat = jiffies + wdd->timeout * HZ; 140490ac7afSWenyou Yang return 0; 141490ac7afSWenyou Yang } 142e6bb42e3SRenaud CERRATO 143490ac7afSWenyou Yang static int at91_wdt_stop(struct watchdog_device *wdd) 144490ac7afSWenyou Yang { 145490ac7afSWenyou Yang /* The watchdog timer hardware can not be stopped... */ 146490ac7afSWenyou Yang return 0; 147490ac7afSWenyou Yang } 148e6bb42e3SRenaud CERRATO 149490ac7afSWenyou Yang static int at91_wdt_set_timeout(struct watchdog_device *wdd, unsigned int new_timeout) 150490ac7afSWenyou Yang { 151490ac7afSWenyou Yang wdd->timeout = new_timeout; 1525161b31dSBoris BREZILLON return at91_wdt_start(wdd); 153e6bb42e3SRenaud CERRATO } 154e6bb42e3SRenaud CERRATO 1555161b31dSBoris BREZILLON static int at91_wdt_init(struct platform_device *pdev, struct at91wdt *wdt) 156e6bb42e3SRenaud CERRATO { 1575161b31dSBoris BREZILLON u32 tmp; 1585161b31dSBoris BREZILLON u32 delta; 1595161b31dSBoris BREZILLON u32 value; 1605161b31dSBoris BREZILLON int err; 1615161b31dSBoris BREZILLON u32 mask = wdt->mr_mask; 1625161b31dSBoris BREZILLON unsigned long min_heartbeat = 1; 163f72fa00fSBoris BREZILLON unsigned long max_heartbeat; 1645161b31dSBoris BREZILLON struct device *dev = &pdev->dev; 165e6bb42e3SRenaud CERRATO 1665161b31dSBoris BREZILLON tmp = wdt_read(wdt, AT91_WDT_MR); 1675161b31dSBoris BREZILLON if ((tmp & mask) != (wdt->mr & mask)) { 1685161b31dSBoris BREZILLON if (tmp == WDT_MR_RESET) { 1695161b31dSBoris BREZILLON wdt_write(wdt, AT91_WDT_MR, wdt->mr); 1705161b31dSBoris BREZILLON tmp = wdt_read(wdt, AT91_WDT_MR); 1715161b31dSBoris BREZILLON } 172e6bb42e3SRenaud CERRATO } 173e6bb42e3SRenaud CERRATO 1745161b31dSBoris BREZILLON if (tmp & AT91_WDT_WDDIS) { 1755161b31dSBoris BREZILLON if (wdt->mr & AT91_WDT_WDDIS) 1765161b31dSBoris BREZILLON return 0; 1775161b31dSBoris BREZILLON dev_err(dev, "watchdog is disabled\n"); 1785161b31dSBoris BREZILLON return -EINVAL; 1795161b31dSBoris BREZILLON } 1805161b31dSBoris BREZILLON 1815161b31dSBoris BREZILLON value = tmp & AT91_WDT_WDV; 1825161b31dSBoris BREZILLON delta = (tmp & AT91_WDT_WDD) >> 16; 1835161b31dSBoris BREZILLON 1845161b31dSBoris BREZILLON if (delta < value) 1855161b31dSBoris BREZILLON min_heartbeat = ticks_to_hz_roundup(value - delta); 1865161b31dSBoris BREZILLON 187f72fa00fSBoris BREZILLON max_heartbeat = ticks_to_hz_rounddown(value); 188f72fa00fSBoris BREZILLON if (!max_heartbeat) { 1895161b31dSBoris BREZILLON dev_err(dev, 1905161b31dSBoris BREZILLON "heartbeat is too small for the system to handle it correctly\n"); 1915161b31dSBoris BREZILLON return -EINVAL; 1925161b31dSBoris BREZILLON } 1935161b31dSBoris BREZILLON 194f72fa00fSBoris BREZILLON /* 195f72fa00fSBoris BREZILLON * Try to reset the watchdog counter 4 or 2 times more often than 196f72fa00fSBoris BREZILLON * actually requested, to avoid spurious watchdog reset. 197f72fa00fSBoris BREZILLON * If this is not possible because of the min_heartbeat value, reset 198f72fa00fSBoris BREZILLON * it at the min_heartbeat period. 199f72fa00fSBoris BREZILLON */ 200f72fa00fSBoris BREZILLON if ((max_heartbeat / 4) >= min_heartbeat) 201f72fa00fSBoris BREZILLON wdt->heartbeat = max_heartbeat / 4; 202f72fa00fSBoris BREZILLON else if ((max_heartbeat / 2) >= min_heartbeat) 203f72fa00fSBoris BREZILLON wdt->heartbeat = max_heartbeat / 2; 204f72fa00fSBoris BREZILLON else 2055161b31dSBoris BREZILLON wdt->heartbeat = min_heartbeat; 206f72fa00fSBoris BREZILLON 207f72fa00fSBoris BREZILLON if (max_heartbeat < min_heartbeat + 4) 2085161b31dSBoris BREZILLON dev_warn(dev, 2095161b31dSBoris BREZILLON "min heartbeat and max heartbeat might be too close for the system to handle it correctly\n"); 2105161b31dSBoris BREZILLON 2115161b31dSBoris BREZILLON if ((tmp & AT91_WDT_WDFIEN) && wdt->irq) { 2125161b31dSBoris BREZILLON err = request_irq(wdt->irq, wdt_interrupt, 213d677772eSBoris BREZILLON IRQF_SHARED | IRQF_IRQPOLL | 214d677772eSBoris BREZILLON IRQF_NO_SUSPEND, 2155161b31dSBoris BREZILLON pdev->name, wdt); 2165161b31dSBoris BREZILLON if (err) 2175161b31dSBoris BREZILLON return err; 2185161b31dSBoris BREZILLON } 2195161b31dSBoris BREZILLON 2205161b31dSBoris BREZILLON if ((tmp & wdt->mr_mask) != (wdt->mr & wdt->mr_mask)) 2215161b31dSBoris BREZILLON dev_warn(dev, 2225161b31dSBoris BREZILLON "watchdog already configured differently (mr = %x expecting %x)\n", 2235161b31dSBoris BREZILLON tmp & wdt->mr_mask, wdt->mr & wdt->mr_mask); 2245161b31dSBoris BREZILLON 225*e99e88a9SKees Cook timer_setup(&wdt->timer, at91_ping, 0); 226a04c3f01SBoris BREZILLON 227a04c3f01SBoris BREZILLON /* 228a04c3f01SBoris BREZILLON * Use min_heartbeat the first time to avoid spurious watchdog reset: 229a04c3f01SBoris BREZILLON * we don't know for how long the watchdog counter is running, and 230a04c3f01SBoris BREZILLON * - resetting it right now might trigger a watchdog fault reset 231a04c3f01SBoris BREZILLON * - waiting for heartbeat time might lead to a watchdog timeout 232a04c3f01SBoris BREZILLON * reset 233a04c3f01SBoris BREZILLON */ 234a04c3f01SBoris BREZILLON mod_timer(&wdt->timer, jiffies + min_heartbeat); 2355161b31dSBoris BREZILLON 2365161b31dSBoris BREZILLON /* Try to set timeout from device tree first */ 2375161b31dSBoris BREZILLON if (watchdog_init_timeout(&wdt->wdd, 0, dev)) 2385161b31dSBoris BREZILLON watchdog_init_timeout(&wdt->wdd, heartbeat, dev); 2395161b31dSBoris BREZILLON watchdog_set_nowayout(&wdt->wdd, wdt->nowayout); 2405161b31dSBoris BREZILLON err = watchdog_register_device(&wdt->wdd); 2415161b31dSBoris BREZILLON if (err) 2425161b31dSBoris BREZILLON goto out_stop_timer; 2435161b31dSBoris BREZILLON 2445161b31dSBoris BREZILLON wdt->next_heartbeat = jiffies + wdt->wdd.timeout * HZ; 245e6bb42e3SRenaud CERRATO 246e6bb42e3SRenaud CERRATO return 0; 2475161b31dSBoris BREZILLON 2485161b31dSBoris BREZILLON out_stop_timer: 2495161b31dSBoris BREZILLON del_timer(&wdt->timer); 2505161b31dSBoris BREZILLON return err; 251e6bb42e3SRenaud CERRATO } 252e6bb42e3SRenaud CERRATO 253490ac7afSWenyou Yang /* ......................................................................... */ 254490ac7afSWenyou Yang 255e6bb42e3SRenaud CERRATO static const struct watchdog_info at91_wdt_info = { 256e6bb42e3SRenaud CERRATO .identity = DRV_NAME, 257e73a7802SWim Van Sebroeck .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | 258e73a7802SWim Van Sebroeck WDIOF_MAGICCLOSE, 259e6bb42e3SRenaud CERRATO }; 260e6bb42e3SRenaud CERRATO 261490ac7afSWenyou Yang static const struct watchdog_ops at91_wdt_ops = { 262e6bb42e3SRenaud CERRATO .owner = THIS_MODULE, 263490ac7afSWenyou Yang .start = at91_wdt_start, 264490ac7afSWenyou Yang .stop = at91_wdt_stop, 265490ac7afSWenyou Yang .set_timeout = at91_wdt_set_timeout, 266e6bb42e3SRenaud CERRATO }; 267e6bb42e3SRenaud CERRATO 2685161b31dSBoris BREZILLON #if defined(CONFIG_OF) 2695161b31dSBoris BREZILLON static int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt) 2705161b31dSBoris BREZILLON { 2715161b31dSBoris BREZILLON u32 min = 0; 2725161b31dSBoris BREZILLON u32 max = WDT_COUNTER_MAX_SECS; 2735161b31dSBoris BREZILLON const char *tmp; 2745161b31dSBoris BREZILLON 2755161b31dSBoris BREZILLON /* Get the interrupts property */ 2765161b31dSBoris BREZILLON wdt->irq = irq_of_parse_and_map(np, 0); 2775161b31dSBoris BREZILLON if (!wdt->irq) 2785161b31dSBoris BREZILLON dev_warn(wdt->wdd.parent, "failed to get IRQ from DT\n"); 2795161b31dSBoris BREZILLON 2805161b31dSBoris BREZILLON if (!of_property_read_u32_index(np, "atmel,max-heartbeat-sec", 0, 2815161b31dSBoris BREZILLON &max)) { 2825161b31dSBoris BREZILLON if (!max || max > WDT_COUNTER_MAX_SECS) 2835161b31dSBoris BREZILLON max = WDT_COUNTER_MAX_SECS; 2845161b31dSBoris BREZILLON 2855161b31dSBoris BREZILLON if (!of_property_read_u32_index(np, "atmel,min-heartbeat-sec", 2865161b31dSBoris BREZILLON 0, &min)) { 2875161b31dSBoris BREZILLON if (min >= max) 2885161b31dSBoris BREZILLON min = max - 1; 2895161b31dSBoris BREZILLON } 2905161b31dSBoris BREZILLON } 2915161b31dSBoris BREZILLON 2925161b31dSBoris BREZILLON min = secs_to_ticks(min); 2935161b31dSBoris BREZILLON max = secs_to_ticks(max); 2945161b31dSBoris BREZILLON 2955161b31dSBoris BREZILLON wdt->mr_mask = 0x3FFFFFFF; 2965161b31dSBoris BREZILLON wdt->mr = 0; 2975161b31dSBoris BREZILLON if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) && 2985161b31dSBoris BREZILLON !strcmp(tmp, "software")) { 2995161b31dSBoris BREZILLON wdt->mr |= AT91_WDT_WDFIEN; 3005161b31dSBoris BREZILLON wdt->mr_mask &= ~AT91_WDT_WDRPROC; 3015161b31dSBoris BREZILLON } else { 3025161b31dSBoris BREZILLON wdt->mr |= AT91_WDT_WDRSTEN; 3035161b31dSBoris BREZILLON } 3045161b31dSBoris BREZILLON 3055161b31dSBoris BREZILLON if (!of_property_read_string(np, "atmel,reset-type", &tmp) && 3065161b31dSBoris BREZILLON !strcmp(tmp, "proc")) 3075161b31dSBoris BREZILLON wdt->mr |= AT91_WDT_WDRPROC; 3085161b31dSBoris BREZILLON 3095161b31dSBoris BREZILLON if (of_property_read_bool(np, "atmel,disable")) { 3105161b31dSBoris BREZILLON wdt->mr |= AT91_WDT_WDDIS; 3115161b31dSBoris BREZILLON wdt->mr_mask &= AT91_WDT_WDDIS; 3125161b31dSBoris BREZILLON } 3135161b31dSBoris BREZILLON 3145161b31dSBoris BREZILLON if (of_property_read_bool(np, "atmel,idle-halt")) 3155161b31dSBoris BREZILLON wdt->mr |= AT91_WDT_WDIDLEHLT; 3165161b31dSBoris BREZILLON 3175161b31dSBoris BREZILLON if (of_property_read_bool(np, "atmel,dbg-halt")) 3185161b31dSBoris BREZILLON wdt->mr |= AT91_WDT_WDDBGHLT; 3195161b31dSBoris BREZILLON 3205161b31dSBoris BREZILLON wdt->mr |= max | ((max - min) << 16); 3215161b31dSBoris BREZILLON 3225161b31dSBoris BREZILLON return 0; 3235161b31dSBoris BREZILLON } 3245161b31dSBoris BREZILLON #else 3255161b31dSBoris BREZILLON static inline int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt) 3265161b31dSBoris BREZILLON { 3275161b31dSBoris BREZILLON return 0; 3285161b31dSBoris BREZILLON } 3295161b31dSBoris BREZILLON #endif 330e6bb42e3SRenaud CERRATO 331e6bb42e3SRenaud CERRATO static int __init at91wdt_probe(struct platform_device *pdev) 332e6bb42e3SRenaud CERRATO { 333c1c30a29SJean-Christophe PLAGNIOL-VILLARD struct resource *r; 3345161b31dSBoris BREZILLON int err; 3355161b31dSBoris BREZILLON struct at91wdt *wdt; 3365161b31dSBoris BREZILLON 3375161b31dSBoris BREZILLON wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL); 3385161b31dSBoris BREZILLON if (!wdt) 3395161b31dSBoris BREZILLON return -ENOMEM; 3405161b31dSBoris BREZILLON 3415161b31dSBoris BREZILLON wdt->mr = (WDT_HW_TIMEOUT * 256) | AT91_WDT_WDRSTEN | AT91_WDT_WDD | 3425161b31dSBoris BREZILLON AT91_WDT_WDDBGHLT | AT91_WDT_WDIDLEHLT; 3435161b31dSBoris BREZILLON wdt->mr_mask = 0x3FFFFFFF; 3445161b31dSBoris BREZILLON wdt->nowayout = nowayout; 3455161b31dSBoris BREZILLON wdt->wdd.parent = &pdev->dev; 3465161b31dSBoris BREZILLON wdt->wdd.info = &at91_wdt_info; 3475161b31dSBoris BREZILLON wdt->wdd.ops = &at91_wdt_ops; 3485161b31dSBoris BREZILLON wdt->wdd.timeout = WDT_HEARTBEAT; 3495161b31dSBoris BREZILLON wdt->wdd.min_timeout = 1; 3505161b31dSBoris BREZILLON wdt->wdd.max_timeout = 0xFFFF; 351e6bb42e3SRenaud CERRATO 352c1c30a29SJean-Christophe PLAGNIOL-VILLARD r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 3535161b31dSBoris BREZILLON wdt->base = devm_ioremap_resource(&pdev->dev, r); 3545161b31dSBoris BREZILLON if (IS_ERR(wdt->base)) 3555161b31dSBoris BREZILLON return PTR_ERR(wdt->base); 3565161b31dSBoris BREZILLON 357a97a09bdSAlexandre Belloni wdt->sclk = devm_clk_get(&pdev->dev, NULL); 358a97a09bdSAlexandre Belloni if (IS_ERR(wdt->sclk)) 359a97a09bdSAlexandre Belloni return PTR_ERR(wdt->sclk); 360a97a09bdSAlexandre Belloni 361a97a09bdSAlexandre Belloni err = clk_prepare_enable(wdt->sclk); 362a97a09bdSAlexandre Belloni if (err) { 363a97a09bdSAlexandre Belloni dev_err(&pdev->dev, "Could not enable slow clock\n"); 364a97a09bdSAlexandre Belloni return err; 365a97a09bdSAlexandre Belloni } 366a97a09bdSAlexandre Belloni 3675161b31dSBoris BREZILLON if (pdev->dev.of_node) { 3685161b31dSBoris BREZILLON err = of_at91wdt_init(pdev->dev.of_node, wdt); 3695161b31dSBoris BREZILLON if (err) 370a97a09bdSAlexandre Belloni goto err_clk; 371c1c30a29SJean-Christophe PLAGNIOL-VILLARD } 372c1c30a29SJean-Christophe PLAGNIOL-VILLARD 3735161b31dSBoris BREZILLON err = at91_wdt_init(pdev, wdt); 3745161b31dSBoris BREZILLON if (err) 375a97a09bdSAlexandre Belloni goto err_clk; 376490ac7afSWenyou Yang 3775161b31dSBoris BREZILLON platform_set_drvdata(pdev, wdt); 378e6bb42e3SRenaud CERRATO 37927c766aaSJoe Perches pr_info("enabled (heartbeat=%d sec, nowayout=%d)\n", 3805161b31dSBoris BREZILLON wdt->wdd.timeout, wdt->nowayout); 381e6bb42e3SRenaud CERRATO 382e6bb42e3SRenaud CERRATO return 0; 383a97a09bdSAlexandre Belloni 384a97a09bdSAlexandre Belloni err_clk: 385a97a09bdSAlexandre Belloni clk_disable_unprepare(wdt->sclk); 386a97a09bdSAlexandre Belloni 387a97a09bdSAlexandre Belloni return err; 388e6bb42e3SRenaud CERRATO } 389e6bb42e3SRenaud CERRATO 390e6bb42e3SRenaud CERRATO static int __exit at91wdt_remove(struct platform_device *pdev) 391e6bb42e3SRenaud CERRATO { 3925161b31dSBoris BREZILLON struct at91wdt *wdt = platform_get_drvdata(pdev); 3935161b31dSBoris BREZILLON watchdog_unregister_device(&wdt->wdd); 394e6bb42e3SRenaud CERRATO 395490ac7afSWenyou Yang pr_warn("I quit now, hardware will probably reboot!\n"); 3965161b31dSBoris BREZILLON del_timer(&wdt->timer); 397a97a09bdSAlexandre Belloni clk_disable_unprepare(wdt->sclk); 398e6bb42e3SRenaud CERRATO 399490ac7afSWenyou Yang return 0; 400e6bb42e3SRenaud CERRATO } 401e6bb42e3SRenaud CERRATO 402be49bbaeSFabio Porcedda #if defined(CONFIG_OF) 4036c41e474SArnd Bergmann static const struct of_device_id at91_wdt_dt_ids[] = { 404be49bbaeSFabio Porcedda { .compatible = "atmel,at91sam9260-wdt" }, 405be49bbaeSFabio Porcedda { /* sentinel */ } 406be49bbaeSFabio Porcedda }; 407be49bbaeSFabio Porcedda 408be49bbaeSFabio Porcedda MODULE_DEVICE_TABLE(of, at91_wdt_dt_ids); 409be49bbaeSFabio Porcedda #endif 410be49bbaeSFabio Porcedda 411e6bb42e3SRenaud CERRATO static struct platform_driver at91wdt_driver = { 412e6bb42e3SRenaud CERRATO .remove = __exit_p(at91wdt_remove), 413e6bb42e3SRenaud CERRATO .driver = { 414e6bb42e3SRenaud CERRATO .name = "at91_wdt", 415be49bbaeSFabio Porcedda .of_match_table = of_match_ptr(at91_wdt_dt_ids), 416e6bb42e3SRenaud CERRATO }, 417e6bb42e3SRenaud CERRATO }; 418e6bb42e3SRenaud CERRATO 4191cb9204cSFabio Porcedda module_platform_driver_probe(at91wdt_driver, at91wdt_probe); 420e6bb42e3SRenaud CERRATO 421e6bb42e3SRenaud CERRATO MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>"); 422e6bb42e3SRenaud CERRATO MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors"); 423e6bb42e3SRenaud CERRATO MODULE_LICENSE("GPL"); 424