xref: /linux/drivers/watchdog/at91sam9_wdt.c (revision 5161b31dc39a6d6dadc95f298de48a725b73ada8)
1e6bb42e3SRenaud CERRATO /*
2e6bb42e3SRenaud CERRATO  * Watchdog driver for Atmel AT91SAM9x processors.
3e6bb42e3SRenaud CERRATO  *
4e6bb42e3SRenaud CERRATO  * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
5e6bb42e3SRenaud CERRATO  *
6e6bb42e3SRenaud CERRATO  * This program is free software; you can redistribute it and/or
7e6bb42e3SRenaud CERRATO  * modify it under the terms of the GNU General Public License
8e6bb42e3SRenaud CERRATO  * as published by the Free Software Foundation; either version
9e6bb42e3SRenaud CERRATO  * 2 of the License, or (at your option) any later version.
10e6bb42e3SRenaud CERRATO  */
11e6bb42e3SRenaud CERRATO 
12e6bb42e3SRenaud CERRATO /*
13e6bb42e3SRenaud CERRATO  * The Watchdog Timer Mode Register can be only written to once. If the
14e6bb42e3SRenaud CERRATO  * timeout need to be set from Linux, be sure that the bootstrap or the
15e6bb42e3SRenaud CERRATO  * bootloader doesn't write to this register.
16e6bb42e3SRenaud CERRATO  */
17e6bb42e3SRenaud CERRATO 
1827c766aaSJoe Perches #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
1927c766aaSJoe Perches 
20e6bb42e3SRenaud CERRATO #include <linux/errno.h>
21e6bb42e3SRenaud CERRATO #include <linux/init.h>
22*5161b31dSBoris BREZILLON #include <linux/interrupt.h>
232af29b78SAndrew Victor #include <linux/io.h>
24e6bb42e3SRenaud CERRATO #include <linux/kernel.h>
25e6bb42e3SRenaud CERRATO #include <linux/module.h>
26e6bb42e3SRenaud CERRATO #include <linux/moduleparam.h>
27e6bb42e3SRenaud CERRATO #include <linux/platform_device.h>
28*5161b31dSBoris BREZILLON #include <linux/reboot.h>
29e6bb42e3SRenaud CERRATO #include <linux/types.h>
30e6bb42e3SRenaud CERRATO #include <linux/watchdog.h>
31e6bb42e3SRenaud CERRATO #include <linux/jiffies.h>
32e6bb42e3SRenaud CERRATO #include <linux/timer.h>
33e6bb42e3SRenaud CERRATO #include <linux/bitops.h>
34e6bb42e3SRenaud CERRATO #include <linux/uaccess.h>
35be49bbaeSFabio Porcedda #include <linux/of.h>
36*5161b31dSBoris BREZILLON #include <linux/of_irq.h>
37e6bb42e3SRenaud CERRATO 
38e7b39145SJean-Christophe Plagniol-Villard #include "at91sam9_wdt.h"
39e6bb42e3SRenaud CERRATO 
40e6bb42e3SRenaud CERRATO #define DRV_NAME "AT91SAM9 Watchdog"
41e6bb42e3SRenaud CERRATO 
42*5161b31dSBoris BREZILLON #define wdt_read(wdt, field) \
43*5161b31dSBoris BREZILLON 	__raw_readl((wdt)->base + (field))
44*5161b31dSBoris BREZILLON #define wdt_write(wtd, field, val) \
45*5161b31dSBoris BREZILLON 	__raw_writel((val), (wdt)->base + (field))
46c1c30a29SJean-Christophe PLAGNIOL-VILLARD 
47e6bb42e3SRenaud CERRATO /* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
48e6bb42e3SRenaud CERRATO  * use this to convert a watchdog
49e6bb42e3SRenaud CERRATO  * value from/to milliseconds.
50e6bb42e3SRenaud CERRATO  */
51*5161b31dSBoris BREZILLON #define ticks_to_hz_rounddown(t)	((((t) + 1) * HZ) >> 8)
52*5161b31dSBoris BREZILLON #define ticks_to_hz_roundup(t)		(((((t) + 1) * HZ) + 255) >> 8)
53*5161b31dSBoris BREZILLON #define ticks_to_secs(t)		(((t) + 1) >> 8)
54*5161b31dSBoris BREZILLON #define secs_to_ticks(s)		(((s) << 8) - 1)
55*5161b31dSBoris BREZILLON 
56*5161b31dSBoris BREZILLON #define WDT_MR_RESET	0x3FFF2FFF
57*5161b31dSBoris BREZILLON 
58*5161b31dSBoris BREZILLON /* Watchdog max counter value in ticks */
59*5161b31dSBoris BREZILLON #define WDT_COUNTER_MAX_TICKS	0xFFF
60*5161b31dSBoris BREZILLON 
61*5161b31dSBoris BREZILLON /* Watchdog max delta/value in secs */
62*5161b31dSBoris BREZILLON #define WDT_COUNTER_MAX_SECS	ticks_to_secs(WDT_COUNTER_MAX_TICKS)
63e6bb42e3SRenaud CERRATO 
64e6bb42e3SRenaud CERRATO /* Hardware timeout in seconds */
65e6bb42e3SRenaud CERRATO #define WDT_HW_TIMEOUT 2
66e6bb42e3SRenaud CERRATO 
67e6bb42e3SRenaud CERRATO /* Timer heartbeat (500ms) */
68e6bb42e3SRenaud CERRATO #define WDT_TIMEOUT	(HZ/2)
69e6bb42e3SRenaud CERRATO 
70e6bb42e3SRenaud CERRATO /* User land timeout */
71e6bb42e3SRenaud CERRATO #define WDT_HEARTBEAT 15
72c1fd5f64SFabio Porcedda static int heartbeat;
73e6bb42e3SRenaud CERRATO module_param(heartbeat, int, 0);
74e6bb42e3SRenaud CERRATO MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
75e6bb42e3SRenaud CERRATO 	"(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
76e6bb42e3SRenaud CERRATO 
7786a1e189SWim Van Sebroeck static bool nowayout = WATCHDOG_NOWAYOUT;
7886a1e189SWim Van Sebroeck module_param(nowayout, bool, 0);
79e6bb42e3SRenaud CERRATO MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
80e6bb42e3SRenaud CERRATO 	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
81e6bb42e3SRenaud CERRATO 
82*5161b31dSBoris BREZILLON #define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd)
83*5161b31dSBoris BREZILLON struct at91wdt {
84*5161b31dSBoris BREZILLON 	struct watchdog_device wdd;
85c1c30a29SJean-Christophe PLAGNIOL-VILLARD 	void __iomem *base;
86e6bb42e3SRenaud CERRATO 	unsigned long next_heartbeat;	/* the next_heartbeat for the timer */
87e6bb42e3SRenaud CERRATO 	struct timer_list timer;	/* The timer that pings the watchdog */
88*5161b31dSBoris BREZILLON 	u32 mr;
89*5161b31dSBoris BREZILLON 	u32 mr_mask;
90*5161b31dSBoris BREZILLON 	unsigned long heartbeat;	/* WDT heartbeat in jiffies */
91*5161b31dSBoris BREZILLON 	bool nowayout;
92*5161b31dSBoris BREZILLON 	unsigned int irq;
93*5161b31dSBoris BREZILLON };
94e6bb42e3SRenaud CERRATO 
95e6bb42e3SRenaud CERRATO /* ......................................................................... */
96e6bb42e3SRenaud CERRATO 
97*5161b31dSBoris BREZILLON static irqreturn_t wdt_interrupt(int irq, void *dev_id)
98*5161b31dSBoris BREZILLON {
99*5161b31dSBoris BREZILLON 	struct at91wdt *wdt = (struct at91wdt *)dev_id;
100*5161b31dSBoris BREZILLON 
101*5161b31dSBoris BREZILLON 	if (wdt_read(wdt, AT91_WDT_SR)) {
102*5161b31dSBoris BREZILLON 		pr_crit("at91sam9 WDT software reset\n");
103*5161b31dSBoris BREZILLON 		emergency_restart();
104*5161b31dSBoris BREZILLON 		pr_crit("Reboot didn't ?????\n");
105*5161b31dSBoris BREZILLON 	}
106*5161b31dSBoris BREZILLON 
107*5161b31dSBoris BREZILLON 	return IRQ_HANDLED;
108*5161b31dSBoris BREZILLON }
109*5161b31dSBoris BREZILLON 
110e6bb42e3SRenaud CERRATO /*
111e6bb42e3SRenaud CERRATO  * Reload the watchdog timer.  (ie, pat the watchdog)
112e6bb42e3SRenaud CERRATO  */
113*5161b31dSBoris BREZILLON static inline void at91_wdt_reset(struct at91wdt *wdt)
114e6bb42e3SRenaud CERRATO {
115*5161b31dSBoris BREZILLON 	wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
116e6bb42e3SRenaud CERRATO }
117e6bb42e3SRenaud CERRATO 
118e6bb42e3SRenaud CERRATO /*
119e6bb42e3SRenaud CERRATO  * Timer tick
120e6bb42e3SRenaud CERRATO  */
121e6bb42e3SRenaud CERRATO static void at91_ping(unsigned long data)
122e6bb42e3SRenaud CERRATO {
123*5161b31dSBoris BREZILLON 	struct at91wdt *wdt = (struct at91wdt *)data;
124*5161b31dSBoris BREZILLON 	if (time_before(jiffies, wdt->next_heartbeat) ||
125*5161b31dSBoris BREZILLON 	    !watchdog_active(&wdt->wdd)) {
126*5161b31dSBoris BREZILLON 		at91_wdt_reset(wdt);
127*5161b31dSBoris BREZILLON 		mod_timer(&wdt->timer, jiffies + wdt->heartbeat);
128*5161b31dSBoris BREZILLON 	} else {
12927c766aaSJoe Perches 		pr_crit("I will reset your machine !\n");
130e6bb42e3SRenaud CERRATO 	}
131e6bb42e3SRenaud CERRATO }
132e6bb42e3SRenaud CERRATO 
133490ac7afSWenyou Yang static int at91_wdt_start(struct watchdog_device *wdd)
134e6bb42e3SRenaud CERRATO {
135*5161b31dSBoris BREZILLON 	struct at91wdt *wdt = to_wdt(wdd);
136*5161b31dSBoris BREZILLON 	/* calculate when the next userspace timeout will be */
137*5161b31dSBoris BREZILLON 	wdt->next_heartbeat = jiffies + wdd->timeout * HZ;
138490ac7afSWenyou Yang 	return 0;
139490ac7afSWenyou Yang }
140e6bb42e3SRenaud CERRATO 
141490ac7afSWenyou Yang static int at91_wdt_stop(struct watchdog_device *wdd)
142490ac7afSWenyou Yang {
143490ac7afSWenyou Yang 	/* The watchdog timer hardware can not be stopped... */
144490ac7afSWenyou Yang 	return 0;
145490ac7afSWenyou Yang }
146e6bb42e3SRenaud CERRATO 
147490ac7afSWenyou Yang static int at91_wdt_set_timeout(struct watchdog_device *wdd, unsigned int new_timeout)
148490ac7afSWenyou Yang {
149490ac7afSWenyou Yang 	wdd->timeout = new_timeout;
150*5161b31dSBoris BREZILLON 	return at91_wdt_start(wdd);
151e6bb42e3SRenaud CERRATO }
152e6bb42e3SRenaud CERRATO 
153*5161b31dSBoris BREZILLON static int at91_wdt_init(struct platform_device *pdev, struct at91wdt *wdt)
154e6bb42e3SRenaud CERRATO {
155*5161b31dSBoris BREZILLON 	u32 tmp;
156*5161b31dSBoris BREZILLON 	u32 delta;
157*5161b31dSBoris BREZILLON 	u32 value;
158*5161b31dSBoris BREZILLON 	int err;
159*5161b31dSBoris BREZILLON 	u32 mask = wdt->mr_mask;
160*5161b31dSBoris BREZILLON 	unsigned long min_heartbeat = 1;
161*5161b31dSBoris BREZILLON 	struct device *dev = &pdev->dev;
162e6bb42e3SRenaud CERRATO 
163*5161b31dSBoris BREZILLON 	tmp = wdt_read(wdt, AT91_WDT_MR);
164*5161b31dSBoris BREZILLON 	if ((tmp & mask) != (wdt->mr & mask)) {
165*5161b31dSBoris BREZILLON 		if (tmp == WDT_MR_RESET) {
166*5161b31dSBoris BREZILLON 			wdt_write(wdt, AT91_WDT_MR, wdt->mr);
167*5161b31dSBoris BREZILLON 			tmp = wdt_read(wdt, AT91_WDT_MR);
168*5161b31dSBoris BREZILLON 		}
169e6bb42e3SRenaud CERRATO 	}
170e6bb42e3SRenaud CERRATO 
171*5161b31dSBoris BREZILLON 	if (tmp & AT91_WDT_WDDIS) {
172*5161b31dSBoris BREZILLON 		if (wdt->mr & AT91_WDT_WDDIS)
173*5161b31dSBoris BREZILLON 			return 0;
174*5161b31dSBoris BREZILLON 		dev_err(dev, "watchdog is disabled\n");
175*5161b31dSBoris BREZILLON 		return -EINVAL;
176*5161b31dSBoris BREZILLON 	}
177*5161b31dSBoris BREZILLON 
178*5161b31dSBoris BREZILLON 	value = tmp & AT91_WDT_WDV;
179*5161b31dSBoris BREZILLON 	delta = (tmp & AT91_WDT_WDD) >> 16;
180*5161b31dSBoris BREZILLON 
181*5161b31dSBoris BREZILLON 	if (delta < value)
182*5161b31dSBoris BREZILLON 		min_heartbeat = ticks_to_hz_roundup(value - delta);
183*5161b31dSBoris BREZILLON 
184*5161b31dSBoris BREZILLON 	wdt->heartbeat = ticks_to_hz_rounddown(value);
185*5161b31dSBoris BREZILLON 	if (!wdt->heartbeat) {
186*5161b31dSBoris BREZILLON 		dev_err(dev,
187*5161b31dSBoris BREZILLON 			"heartbeat is too small for the system to handle it correctly\n");
188*5161b31dSBoris BREZILLON 		return -EINVAL;
189*5161b31dSBoris BREZILLON 	}
190*5161b31dSBoris BREZILLON 
191*5161b31dSBoris BREZILLON 	if (wdt->heartbeat < min_heartbeat + 4) {
192*5161b31dSBoris BREZILLON 		wdt->heartbeat = min_heartbeat;
193*5161b31dSBoris BREZILLON 		dev_warn(dev,
194*5161b31dSBoris BREZILLON 			 "min heartbeat and max heartbeat might be too close for the system to handle it correctly\n");
195*5161b31dSBoris BREZILLON 		if (wdt->heartbeat < 4)
196*5161b31dSBoris BREZILLON 			dev_warn(dev,
197*5161b31dSBoris BREZILLON 				 "heartbeat might be too small for the system to handle it correctly\n");
198*5161b31dSBoris BREZILLON 	} else {
199*5161b31dSBoris BREZILLON 		wdt->heartbeat -= 4;
200*5161b31dSBoris BREZILLON 	}
201*5161b31dSBoris BREZILLON 
202*5161b31dSBoris BREZILLON 	if ((tmp & AT91_WDT_WDFIEN) && wdt->irq) {
203*5161b31dSBoris BREZILLON 		err = request_irq(wdt->irq, wdt_interrupt,
204*5161b31dSBoris BREZILLON 				  IRQF_SHARED | IRQF_IRQPOLL,
205*5161b31dSBoris BREZILLON 				  pdev->name, wdt);
206*5161b31dSBoris BREZILLON 		if (err)
207*5161b31dSBoris BREZILLON 			return err;
208*5161b31dSBoris BREZILLON 	}
209*5161b31dSBoris BREZILLON 
210*5161b31dSBoris BREZILLON 	if ((tmp & wdt->mr_mask) != (wdt->mr & wdt->mr_mask))
211*5161b31dSBoris BREZILLON 		dev_warn(dev,
212*5161b31dSBoris BREZILLON 			 "watchdog already configured differently (mr = %x expecting %x)\n",
213*5161b31dSBoris BREZILLON 			 tmp & wdt->mr_mask, wdt->mr & wdt->mr_mask);
214*5161b31dSBoris BREZILLON 
215*5161b31dSBoris BREZILLON 	setup_timer(&wdt->timer, at91_ping, (unsigned long)wdt);
216*5161b31dSBoris BREZILLON 	mod_timer(&wdt->timer, jiffies + wdt->heartbeat);
217*5161b31dSBoris BREZILLON 
218*5161b31dSBoris BREZILLON 	/* Try to set timeout from device tree first */
219*5161b31dSBoris BREZILLON 	if (watchdog_init_timeout(&wdt->wdd, 0, dev))
220*5161b31dSBoris BREZILLON 		watchdog_init_timeout(&wdt->wdd, heartbeat, dev);
221*5161b31dSBoris BREZILLON 	watchdog_set_nowayout(&wdt->wdd, wdt->nowayout);
222*5161b31dSBoris BREZILLON 	err = watchdog_register_device(&wdt->wdd);
223*5161b31dSBoris BREZILLON 	if (err)
224*5161b31dSBoris BREZILLON 		goto out_stop_timer;
225*5161b31dSBoris BREZILLON 
226*5161b31dSBoris BREZILLON 	wdt->next_heartbeat = jiffies + wdt->wdd.timeout * HZ;
227e6bb42e3SRenaud CERRATO 
228e6bb42e3SRenaud CERRATO 	return 0;
229*5161b31dSBoris BREZILLON 
230*5161b31dSBoris BREZILLON out_stop_timer:
231*5161b31dSBoris BREZILLON 	del_timer(&wdt->timer);
232*5161b31dSBoris BREZILLON 	return err;
233e6bb42e3SRenaud CERRATO }
234e6bb42e3SRenaud CERRATO 
235490ac7afSWenyou Yang /* ......................................................................... */
236490ac7afSWenyou Yang 
237e6bb42e3SRenaud CERRATO static const struct watchdog_info at91_wdt_info = {
238e6bb42e3SRenaud CERRATO 	.identity	= DRV_NAME,
239e73a7802SWim Van Sebroeck 	.options	= WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
240e73a7802SWim Van Sebroeck 						WDIOF_MAGICCLOSE,
241e6bb42e3SRenaud CERRATO };
242e6bb42e3SRenaud CERRATO 
243490ac7afSWenyou Yang static const struct watchdog_ops at91_wdt_ops = {
244e6bb42e3SRenaud CERRATO 	.owner =	THIS_MODULE,
245490ac7afSWenyou Yang 	.start =	at91_wdt_start,
246490ac7afSWenyou Yang 	.stop =		at91_wdt_stop,
247490ac7afSWenyou Yang 	.set_timeout =	at91_wdt_set_timeout,
248e6bb42e3SRenaud CERRATO };
249e6bb42e3SRenaud CERRATO 
250*5161b31dSBoris BREZILLON #if defined(CONFIG_OF)
251*5161b31dSBoris BREZILLON static int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt)
252*5161b31dSBoris BREZILLON {
253*5161b31dSBoris BREZILLON 	u32 min = 0;
254*5161b31dSBoris BREZILLON 	u32 max = WDT_COUNTER_MAX_SECS;
255*5161b31dSBoris BREZILLON 	const char *tmp;
256*5161b31dSBoris BREZILLON 
257*5161b31dSBoris BREZILLON 	/* Get the interrupts property */
258*5161b31dSBoris BREZILLON 	wdt->irq = irq_of_parse_and_map(np, 0);
259*5161b31dSBoris BREZILLON 	if (!wdt->irq)
260*5161b31dSBoris BREZILLON 		dev_warn(wdt->wdd.parent, "failed to get IRQ from DT\n");
261*5161b31dSBoris BREZILLON 
262*5161b31dSBoris BREZILLON 	if (!of_property_read_u32_index(np, "atmel,max-heartbeat-sec", 0,
263*5161b31dSBoris BREZILLON 					&max)) {
264*5161b31dSBoris BREZILLON 		if (!max || max > WDT_COUNTER_MAX_SECS)
265*5161b31dSBoris BREZILLON 			max = WDT_COUNTER_MAX_SECS;
266*5161b31dSBoris BREZILLON 
267*5161b31dSBoris BREZILLON 		if (!of_property_read_u32_index(np, "atmel,min-heartbeat-sec",
268*5161b31dSBoris BREZILLON 						0, &min)) {
269*5161b31dSBoris BREZILLON 			if (min >= max)
270*5161b31dSBoris BREZILLON 				min = max - 1;
271*5161b31dSBoris BREZILLON 		}
272*5161b31dSBoris BREZILLON 	}
273*5161b31dSBoris BREZILLON 
274*5161b31dSBoris BREZILLON 	min = secs_to_ticks(min);
275*5161b31dSBoris BREZILLON 	max = secs_to_ticks(max);
276*5161b31dSBoris BREZILLON 
277*5161b31dSBoris BREZILLON 	wdt->mr_mask = 0x3FFFFFFF;
278*5161b31dSBoris BREZILLON 	wdt->mr = 0;
279*5161b31dSBoris BREZILLON 	if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
280*5161b31dSBoris BREZILLON 	    !strcmp(tmp, "software")) {
281*5161b31dSBoris BREZILLON 		wdt->mr |= AT91_WDT_WDFIEN;
282*5161b31dSBoris BREZILLON 		wdt->mr_mask &= ~AT91_WDT_WDRPROC;
283*5161b31dSBoris BREZILLON 	} else {
284*5161b31dSBoris BREZILLON 		wdt->mr |= AT91_WDT_WDRSTEN;
285*5161b31dSBoris BREZILLON 	}
286*5161b31dSBoris BREZILLON 
287*5161b31dSBoris BREZILLON 	if (!of_property_read_string(np, "atmel,reset-type", &tmp) &&
288*5161b31dSBoris BREZILLON 	    !strcmp(tmp, "proc"))
289*5161b31dSBoris BREZILLON 		wdt->mr |= AT91_WDT_WDRPROC;
290*5161b31dSBoris BREZILLON 
291*5161b31dSBoris BREZILLON 	if (of_property_read_bool(np, "atmel,disable")) {
292*5161b31dSBoris BREZILLON 		wdt->mr |= AT91_WDT_WDDIS;
293*5161b31dSBoris BREZILLON 		wdt->mr_mask &= AT91_WDT_WDDIS;
294*5161b31dSBoris BREZILLON 	}
295*5161b31dSBoris BREZILLON 
296*5161b31dSBoris BREZILLON 	if (of_property_read_bool(np, "atmel,idle-halt"))
297*5161b31dSBoris BREZILLON 		wdt->mr |= AT91_WDT_WDIDLEHLT;
298*5161b31dSBoris BREZILLON 
299*5161b31dSBoris BREZILLON 	if (of_property_read_bool(np, "atmel,dbg-halt"))
300*5161b31dSBoris BREZILLON 		wdt->mr |= AT91_WDT_WDDBGHLT;
301*5161b31dSBoris BREZILLON 
302*5161b31dSBoris BREZILLON 	wdt->mr |= max | ((max - min) << 16);
303*5161b31dSBoris BREZILLON 
304*5161b31dSBoris BREZILLON 	return 0;
305*5161b31dSBoris BREZILLON }
306*5161b31dSBoris BREZILLON #else
307*5161b31dSBoris BREZILLON static inline int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt)
308*5161b31dSBoris BREZILLON {
309*5161b31dSBoris BREZILLON 	return 0;
310*5161b31dSBoris BREZILLON }
311*5161b31dSBoris BREZILLON #endif
312e6bb42e3SRenaud CERRATO 
313e6bb42e3SRenaud CERRATO static int __init at91wdt_probe(struct platform_device *pdev)
314e6bb42e3SRenaud CERRATO {
315c1c30a29SJean-Christophe PLAGNIOL-VILLARD 	struct resource	*r;
316*5161b31dSBoris BREZILLON 	int err;
317*5161b31dSBoris BREZILLON 	struct at91wdt *wdt;
318*5161b31dSBoris BREZILLON 
319*5161b31dSBoris BREZILLON 	wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
320*5161b31dSBoris BREZILLON 	if (!wdt)
321*5161b31dSBoris BREZILLON 		return -ENOMEM;
322*5161b31dSBoris BREZILLON 
323*5161b31dSBoris BREZILLON 	wdt->mr = (WDT_HW_TIMEOUT * 256) | AT91_WDT_WDRSTEN | AT91_WDT_WDD |
324*5161b31dSBoris BREZILLON 		  AT91_WDT_WDDBGHLT | AT91_WDT_WDIDLEHLT;
325*5161b31dSBoris BREZILLON 	wdt->mr_mask = 0x3FFFFFFF;
326*5161b31dSBoris BREZILLON 	wdt->nowayout = nowayout;
327*5161b31dSBoris BREZILLON 	wdt->wdd.parent = &pdev->dev;
328*5161b31dSBoris BREZILLON 	wdt->wdd.info = &at91_wdt_info;
329*5161b31dSBoris BREZILLON 	wdt->wdd.ops = &at91_wdt_ops;
330*5161b31dSBoris BREZILLON 	wdt->wdd.timeout = WDT_HEARTBEAT;
331*5161b31dSBoris BREZILLON 	wdt->wdd.min_timeout = 1;
332*5161b31dSBoris BREZILLON 	wdt->wdd.max_timeout = 0xFFFF;
333e6bb42e3SRenaud CERRATO 
334c1c30a29SJean-Christophe PLAGNIOL-VILLARD 	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
335*5161b31dSBoris BREZILLON 	wdt->base = devm_ioremap_resource(&pdev->dev, r);
336*5161b31dSBoris BREZILLON 	if (IS_ERR(wdt->base))
337*5161b31dSBoris BREZILLON 		return PTR_ERR(wdt->base);
338*5161b31dSBoris BREZILLON 
339*5161b31dSBoris BREZILLON 	if (pdev->dev.of_node) {
340*5161b31dSBoris BREZILLON 		err = of_at91wdt_init(pdev->dev.of_node, wdt);
341*5161b31dSBoris BREZILLON 		if (err)
342*5161b31dSBoris BREZILLON 			return err;
343c1c30a29SJean-Christophe PLAGNIOL-VILLARD 	}
344c1c30a29SJean-Christophe PLAGNIOL-VILLARD 
345*5161b31dSBoris BREZILLON 	err = at91_wdt_init(pdev, wdt);
346*5161b31dSBoris BREZILLON 	if (err)
347*5161b31dSBoris BREZILLON 		return err;
348490ac7afSWenyou Yang 
349*5161b31dSBoris BREZILLON 	platform_set_drvdata(pdev, wdt);
350e6bb42e3SRenaud CERRATO 
35127c766aaSJoe Perches 	pr_info("enabled (heartbeat=%d sec, nowayout=%d)\n",
352*5161b31dSBoris BREZILLON 		wdt->wdd.timeout, wdt->nowayout);
353e6bb42e3SRenaud CERRATO 
354e6bb42e3SRenaud CERRATO 	return 0;
355e6bb42e3SRenaud CERRATO }
356e6bb42e3SRenaud CERRATO 
357e6bb42e3SRenaud CERRATO static int __exit at91wdt_remove(struct platform_device *pdev)
358e6bb42e3SRenaud CERRATO {
359*5161b31dSBoris BREZILLON 	struct at91wdt *wdt = platform_get_drvdata(pdev);
360*5161b31dSBoris BREZILLON 	watchdog_unregister_device(&wdt->wdd);
361e6bb42e3SRenaud CERRATO 
362490ac7afSWenyou Yang 	pr_warn("I quit now, hardware will probably reboot!\n");
363*5161b31dSBoris BREZILLON 	del_timer(&wdt->timer);
364e6bb42e3SRenaud CERRATO 
365490ac7afSWenyou Yang 	return 0;
366e6bb42e3SRenaud CERRATO }
367e6bb42e3SRenaud CERRATO 
368be49bbaeSFabio Porcedda #if defined(CONFIG_OF)
3696c41e474SArnd Bergmann static const struct of_device_id at91_wdt_dt_ids[] = {
370be49bbaeSFabio Porcedda 	{ .compatible = "atmel,at91sam9260-wdt" },
371be49bbaeSFabio Porcedda 	{ /* sentinel */ }
372be49bbaeSFabio Porcedda };
373be49bbaeSFabio Porcedda 
374be49bbaeSFabio Porcedda MODULE_DEVICE_TABLE(of, at91_wdt_dt_ids);
375be49bbaeSFabio Porcedda #endif
376be49bbaeSFabio Porcedda 
377e6bb42e3SRenaud CERRATO static struct platform_driver at91wdt_driver = {
378e6bb42e3SRenaud CERRATO 	.remove		= __exit_p(at91wdt_remove),
379e6bb42e3SRenaud CERRATO 	.driver		= {
380e6bb42e3SRenaud CERRATO 		.name	= "at91_wdt",
381e6bb42e3SRenaud CERRATO 		.owner	= THIS_MODULE,
382be49bbaeSFabio Porcedda 		.of_match_table = of_match_ptr(at91_wdt_dt_ids),
383e6bb42e3SRenaud CERRATO 	},
384e6bb42e3SRenaud CERRATO };
385e6bb42e3SRenaud CERRATO 
3861cb9204cSFabio Porcedda module_platform_driver_probe(at91wdt_driver, at91wdt_probe);
387e6bb42e3SRenaud CERRATO 
388e6bb42e3SRenaud CERRATO MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
389e6bb42e3SRenaud CERRATO MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
390e6bb42e3SRenaud CERRATO MODULE_LICENSE("GPL");
391