1e6bb42e3SRenaud CERRATO /* 2e6bb42e3SRenaud CERRATO * Watchdog driver for Atmel AT91SAM9x processors. 3e6bb42e3SRenaud CERRATO * 4e6bb42e3SRenaud CERRATO * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr 5e6bb42e3SRenaud CERRATO * 6e6bb42e3SRenaud CERRATO * This program is free software; you can redistribute it and/or 7e6bb42e3SRenaud CERRATO * modify it under the terms of the GNU General Public License 8e6bb42e3SRenaud CERRATO * as published by the Free Software Foundation; either version 9e6bb42e3SRenaud CERRATO * 2 of the License, or (at your option) any later version. 10e6bb42e3SRenaud CERRATO */ 11e6bb42e3SRenaud CERRATO 12e6bb42e3SRenaud CERRATO /* 13e6bb42e3SRenaud CERRATO * The Watchdog Timer Mode Register can be only written to once. If the 14e6bb42e3SRenaud CERRATO * timeout need to be set from Linux, be sure that the bootstrap or the 15e6bb42e3SRenaud CERRATO * bootloader doesn't write to this register. 16e6bb42e3SRenaud CERRATO */ 17e6bb42e3SRenaud CERRATO 18e6bb42e3SRenaud CERRATO #include <linux/errno.h> 19e6bb42e3SRenaud CERRATO #include <linux/fs.h> 20e6bb42e3SRenaud CERRATO #include <linux/init.h> 21*2af29b78SAndrew Victor #include <linux/io.h> 22e6bb42e3SRenaud CERRATO #include <linux/kernel.h> 23e6bb42e3SRenaud CERRATO #include <linux/miscdevice.h> 24e6bb42e3SRenaud CERRATO #include <linux/module.h> 25e6bb42e3SRenaud CERRATO #include <linux/moduleparam.h> 26e6bb42e3SRenaud CERRATO #include <linux/platform_device.h> 27e6bb42e3SRenaud CERRATO #include <linux/types.h> 28e6bb42e3SRenaud CERRATO #include <linux/watchdog.h> 29e6bb42e3SRenaud CERRATO #include <linux/jiffies.h> 30e6bb42e3SRenaud CERRATO #include <linux/timer.h> 31e6bb42e3SRenaud CERRATO #include <linux/bitops.h> 32e6bb42e3SRenaud CERRATO #include <linux/uaccess.h> 33e6bb42e3SRenaud CERRATO 34c1dfda39SAndrew Victor #include <mach/at91_wdt.h> 35e6bb42e3SRenaud CERRATO 36e6bb42e3SRenaud CERRATO #define DRV_NAME "AT91SAM9 Watchdog" 37e6bb42e3SRenaud CERRATO 38e6bb42e3SRenaud CERRATO /* AT91SAM9 watchdog runs a 12bit counter @ 256Hz, 39e6bb42e3SRenaud CERRATO * use this to convert a watchdog 40e6bb42e3SRenaud CERRATO * value from/to milliseconds. 41e6bb42e3SRenaud CERRATO */ 42e6bb42e3SRenaud CERRATO #define ms_to_ticks(t) (((t << 8) / 1000) - 1) 43e6bb42e3SRenaud CERRATO #define ticks_to_ms(t) (((t + 1) * 1000) >> 8) 44e6bb42e3SRenaud CERRATO 45e6bb42e3SRenaud CERRATO /* Hardware timeout in seconds */ 46e6bb42e3SRenaud CERRATO #define WDT_HW_TIMEOUT 2 47e6bb42e3SRenaud CERRATO 48e6bb42e3SRenaud CERRATO /* Timer heartbeat (500ms) */ 49e6bb42e3SRenaud CERRATO #define WDT_TIMEOUT (HZ/2) 50e6bb42e3SRenaud CERRATO 51e6bb42e3SRenaud CERRATO /* User land timeout */ 52e6bb42e3SRenaud CERRATO #define WDT_HEARTBEAT 15 53e6bb42e3SRenaud CERRATO static int heartbeat = WDT_HEARTBEAT; 54e6bb42e3SRenaud CERRATO module_param(heartbeat, int, 0); 55e6bb42e3SRenaud CERRATO MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. " 56e6bb42e3SRenaud CERRATO "(default = " __MODULE_STRING(WDT_HEARTBEAT) ")"); 57e6bb42e3SRenaud CERRATO 58e6bb42e3SRenaud CERRATO static int nowayout = WATCHDOG_NOWAYOUT; 59e6bb42e3SRenaud CERRATO module_param(nowayout, int, 0); 60e6bb42e3SRenaud CERRATO MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started " 61e6bb42e3SRenaud CERRATO "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 62e6bb42e3SRenaud CERRATO 63e6bb42e3SRenaud CERRATO static void at91_ping(unsigned long data); 64e6bb42e3SRenaud CERRATO 65e6bb42e3SRenaud CERRATO static struct { 66e6bb42e3SRenaud CERRATO unsigned long next_heartbeat; /* the next_heartbeat for the timer */ 67e6bb42e3SRenaud CERRATO unsigned long open; 68e6bb42e3SRenaud CERRATO char expect_close; 69e6bb42e3SRenaud CERRATO struct timer_list timer; /* The timer that pings the watchdog */ 70e6bb42e3SRenaud CERRATO } at91wdt_private; 71e6bb42e3SRenaud CERRATO 72e6bb42e3SRenaud CERRATO /* ......................................................................... */ 73e6bb42e3SRenaud CERRATO 74e6bb42e3SRenaud CERRATO 75e6bb42e3SRenaud CERRATO /* 76e6bb42e3SRenaud CERRATO * Reload the watchdog timer. (ie, pat the watchdog) 77e6bb42e3SRenaud CERRATO */ 78e6bb42e3SRenaud CERRATO static inline void at91_wdt_reset(void) 79e6bb42e3SRenaud CERRATO { 80e6bb42e3SRenaud CERRATO at91_sys_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT); 81e6bb42e3SRenaud CERRATO } 82e6bb42e3SRenaud CERRATO 83e6bb42e3SRenaud CERRATO /* 84e6bb42e3SRenaud CERRATO * Timer tick 85e6bb42e3SRenaud CERRATO */ 86e6bb42e3SRenaud CERRATO static void at91_ping(unsigned long data) 87e6bb42e3SRenaud CERRATO { 88e6bb42e3SRenaud CERRATO if (time_before(jiffies, at91wdt_private.next_heartbeat) || 89e6bb42e3SRenaud CERRATO (!nowayout && !at91wdt_private.open)) { 90e6bb42e3SRenaud CERRATO at91_wdt_reset(); 91e6bb42e3SRenaud CERRATO mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT); 92e6bb42e3SRenaud CERRATO } else 93e6bb42e3SRenaud CERRATO printk(KERN_CRIT DRV_NAME": I will reset your machine !\n"); 94e6bb42e3SRenaud CERRATO } 95e6bb42e3SRenaud CERRATO 96e6bb42e3SRenaud CERRATO /* 97e6bb42e3SRenaud CERRATO * Watchdog device is opened, and watchdog starts running. 98e6bb42e3SRenaud CERRATO */ 99e6bb42e3SRenaud CERRATO static int at91_wdt_open(struct inode *inode, struct file *file) 100e6bb42e3SRenaud CERRATO { 101e6bb42e3SRenaud CERRATO if (test_and_set_bit(0, &at91wdt_private.open)) 102e6bb42e3SRenaud CERRATO return -EBUSY; 103e6bb42e3SRenaud CERRATO 104e6bb42e3SRenaud CERRATO at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ; 105e6bb42e3SRenaud CERRATO mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT); 106e6bb42e3SRenaud CERRATO 107e6bb42e3SRenaud CERRATO return nonseekable_open(inode, file); 108e6bb42e3SRenaud CERRATO } 109e6bb42e3SRenaud CERRATO 110e6bb42e3SRenaud CERRATO /* 111e6bb42e3SRenaud CERRATO * Close the watchdog device. 112e6bb42e3SRenaud CERRATO */ 113e6bb42e3SRenaud CERRATO static int at91_wdt_close(struct inode *inode, struct file *file) 114e6bb42e3SRenaud CERRATO { 115e6bb42e3SRenaud CERRATO clear_bit(0, &at91wdt_private.open); 116e6bb42e3SRenaud CERRATO 117e6bb42e3SRenaud CERRATO /* stop internal ping */ 118e6bb42e3SRenaud CERRATO if (!at91wdt_private.expect_close) 119e6bb42e3SRenaud CERRATO del_timer(&at91wdt_private.timer); 120e6bb42e3SRenaud CERRATO 121e6bb42e3SRenaud CERRATO at91wdt_private.expect_close = 0; 122e6bb42e3SRenaud CERRATO return 0; 123e6bb42e3SRenaud CERRATO } 124e6bb42e3SRenaud CERRATO 125e6bb42e3SRenaud CERRATO /* 126e6bb42e3SRenaud CERRATO * Set the watchdog time interval in 1/256Hz (write-once) 127e6bb42e3SRenaud CERRATO * Counter is 12 bit. 128e6bb42e3SRenaud CERRATO */ 129e6bb42e3SRenaud CERRATO static int at91_wdt_settimeout(unsigned int timeout) 130e6bb42e3SRenaud CERRATO { 131e6bb42e3SRenaud CERRATO unsigned int reg; 132e6bb42e3SRenaud CERRATO unsigned int mr; 133e6bb42e3SRenaud CERRATO 134e6bb42e3SRenaud CERRATO /* Check if disabled */ 135e6bb42e3SRenaud CERRATO mr = at91_sys_read(AT91_WDT_MR); 136e6bb42e3SRenaud CERRATO if (mr & AT91_WDT_WDDIS) { 137e6bb42e3SRenaud CERRATO printk(KERN_ERR DRV_NAME": sorry, watchdog is disabled\n"); 138e6bb42e3SRenaud CERRATO return -EIO; 139e6bb42e3SRenaud CERRATO } 140e6bb42e3SRenaud CERRATO 141e6bb42e3SRenaud CERRATO /* 142e6bb42e3SRenaud CERRATO * All counting occurs at SLOW_CLOCK / 128 = 256 Hz 143e6bb42e3SRenaud CERRATO * 144e6bb42e3SRenaud CERRATO * Since WDV is a 12-bit counter, the maximum period is 145e6bb42e3SRenaud CERRATO * 4096 / 256 = 16 seconds. 146e6bb42e3SRenaud CERRATO */ 147e6bb42e3SRenaud CERRATO reg = AT91_WDT_WDRSTEN /* causes watchdog reset */ 148e6bb42e3SRenaud CERRATO /* | AT91_WDT_WDRPROC causes processor reset only */ 149e6bb42e3SRenaud CERRATO | AT91_WDT_WDDBGHLT /* disabled in debug mode */ 150e6bb42e3SRenaud CERRATO | AT91_WDT_WDD /* restart at any time */ 151e6bb42e3SRenaud CERRATO | (timeout & AT91_WDT_WDV); /* timer value */ 152e6bb42e3SRenaud CERRATO at91_sys_write(AT91_WDT_MR, reg); 153e6bb42e3SRenaud CERRATO 154e6bb42e3SRenaud CERRATO return 0; 155e6bb42e3SRenaud CERRATO } 156e6bb42e3SRenaud CERRATO 157e6bb42e3SRenaud CERRATO static const struct watchdog_info at91_wdt_info = { 158e6bb42e3SRenaud CERRATO .identity = DRV_NAME, 159e6bb42e3SRenaud CERRATO .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, 160e6bb42e3SRenaud CERRATO }; 161e6bb42e3SRenaud CERRATO 162e6bb42e3SRenaud CERRATO /* 163e6bb42e3SRenaud CERRATO * Handle commands from user-space. 164e6bb42e3SRenaud CERRATO */ 165e6bb42e3SRenaud CERRATO static long at91_wdt_ioctl(struct file *file, 166e6bb42e3SRenaud CERRATO unsigned int cmd, unsigned long arg) 167e6bb42e3SRenaud CERRATO { 168e6bb42e3SRenaud CERRATO void __user *argp = (void __user *)arg; 169e6bb42e3SRenaud CERRATO int __user *p = argp; 170e6bb42e3SRenaud CERRATO int new_value; 171e6bb42e3SRenaud CERRATO 172e6bb42e3SRenaud CERRATO switch (cmd) { 173e6bb42e3SRenaud CERRATO case WDIOC_GETSUPPORT: 174e6bb42e3SRenaud CERRATO return copy_to_user(argp, &at91_wdt_info, 175e6bb42e3SRenaud CERRATO sizeof(at91_wdt_info)) ? -EFAULT : 0; 176e6bb42e3SRenaud CERRATO 177e6bb42e3SRenaud CERRATO case WDIOC_GETSTATUS: 178e6bb42e3SRenaud CERRATO case WDIOC_GETBOOTSTATUS: 179e6bb42e3SRenaud CERRATO return put_user(0, p); 180e6bb42e3SRenaud CERRATO 181e6bb42e3SRenaud CERRATO case WDIOC_KEEPALIVE: 182e6bb42e3SRenaud CERRATO at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ; 183e6bb42e3SRenaud CERRATO return 0; 184e6bb42e3SRenaud CERRATO 185e6bb42e3SRenaud CERRATO case WDIOC_SETTIMEOUT: 186e6bb42e3SRenaud CERRATO if (get_user(new_value, p)) 187e6bb42e3SRenaud CERRATO return -EFAULT; 188e6bb42e3SRenaud CERRATO 189e6bb42e3SRenaud CERRATO heartbeat = new_value; 190e6bb42e3SRenaud CERRATO at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ; 191e6bb42e3SRenaud CERRATO 192e6bb42e3SRenaud CERRATO return put_user(new_value, p); /* return current value */ 193e6bb42e3SRenaud CERRATO 194e6bb42e3SRenaud CERRATO case WDIOC_GETTIMEOUT: 195e6bb42e3SRenaud CERRATO return put_user(heartbeat, p); 196e6bb42e3SRenaud CERRATO } 197e6bb42e3SRenaud CERRATO return -ENOTTY; 198e6bb42e3SRenaud CERRATO } 199e6bb42e3SRenaud CERRATO 200e6bb42e3SRenaud CERRATO /* 201e6bb42e3SRenaud CERRATO * Pat the watchdog whenever device is written to. 202e6bb42e3SRenaud CERRATO */ 203e6bb42e3SRenaud CERRATO static ssize_t at91_wdt_write(struct file *file, const char *data, size_t len, 204e6bb42e3SRenaud CERRATO loff_t *ppos) 205e6bb42e3SRenaud CERRATO { 206e6bb42e3SRenaud CERRATO if (!len) 207e6bb42e3SRenaud CERRATO return 0; 208e6bb42e3SRenaud CERRATO 209e6bb42e3SRenaud CERRATO /* Scan for magic character */ 210e6bb42e3SRenaud CERRATO if (!nowayout) { 211e6bb42e3SRenaud CERRATO size_t i; 212e6bb42e3SRenaud CERRATO 213e6bb42e3SRenaud CERRATO at91wdt_private.expect_close = 0; 214e6bb42e3SRenaud CERRATO 215e6bb42e3SRenaud CERRATO for (i = 0; i < len; i++) { 216e6bb42e3SRenaud CERRATO char c; 217e6bb42e3SRenaud CERRATO if (get_user(c, data + i)) 218e6bb42e3SRenaud CERRATO return -EFAULT; 219e6bb42e3SRenaud CERRATO if (c == 'V') { 220e6bb42e3SRenaud CERRATO at91wdt_private.expect_close = 42; 221e6bb42e3SRenaud CERRATO break; 222e6bb42e3SRenaud CERRATO } 223e6bb42e3SRenaud CERRATO } 224e6bb42e3SRenaud CERRATO } 225e6bb42e3SRenaud CERRATO 226e6bb42e3SRenaud CERRATO at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ; 227e6bb42e3SRenaud CERRATO 228e6bb42e3SRenaud CERRATO return len; 229e6bb42e3SRenaud CERRATO } 230e6bb42e3SRenaud CERRATO 231e6bb42e3SRenaud CERRATO /* ......................................................................... */ 232e6bb42e3SRenaud CERRATO 233e6bb42e3SRenaud CERRATO static const struct file_operations at91wdt_fops = { 234e6bb42e3SRenaud CERRATO .owner = THIS_MODULE, 235e6bb42e3SRenaud CERRATO .llseek = no_llseek, 236e6bb42e3SRenaud CERRATO .unlocked_ioctl = at91_wdt_ioctl, 237e6bb42e3SRenaud CERRATO .open = at91_wdt_open, 238e6bb42e3SRenaud CERRATO .release = at91_wdt_close, 239e6bb42e3SRenaud CERRATO .write = at91_wdt_write, 240e6bb42e3SRenaud CERRATO }; 241e6bb42e3SRenaud CERRATO 242e6bb42e3SRenaud CERRATO static struct miscdevice at91wdt_miscdev = { 243e6bb42e3SRenaud CERRATO .minor = WATCHDOG_MINOR, 244e6bb42e3SRenaud CERRATO .name = "watchdog", 245e6bb42e3SRenaud CERRATO .fops = &at91wdt_fops, 246e6bb42e3SRenaud CERRATO }; 247e6bb42e3SRenaud CERRATO 248e6bb42e3SRenaud CERRATO static int __init at91wdt_probe(struct platform_device *pdev) 249e6bb42e3SRenaud CERRATO { 250e6bb42e3SRenaud CERRATO int res; 251e6bb42e3SRenaud CERRATO 252e6bb42e3SRenaud CERRATO if (at91wdt_miscdev.parent) 253e6bb42e3SRenaud CERRATO return -EBUSY; 254e6bb42e3SRenaud CERRATO at91wdt_miscdev.parent = &pdev->dev; 255e6bb42e3SRenaud CERRATO 256e6bb42e3SRenaud CERRATO /* Set watchdog */ 257e6bb42e3SRenaud CERRATO res = at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000)); 258e6bb42e3SRenaud CERRATO if (res) 259e6bb42e3SRenaud CERRATO return res; 260e6bb42e3SRenaud CERRATO 261e6bb42e3SRenaud CERRATO res = misc_register(&at91wdt_miscdev); 262e6bb42e3SRenaud CERRATO if (res) 263e6bb42e3SRenaud CERRATO return res; 264e6bb42e3SRenaud CERRATO 265e6bb42e3SRenaud CERRATO at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ; 266e6bb42e3SRenaud CERRATO setup_timer(&at91wdt_private.timer, at91_ping, 0); 267e6bb42e3SRenaud CERRATO mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT); 268e6bb42e3SRenaud CERRATO 269e6bb42e3SRenaud CERRATO printk(KERN_INFO DRV_NAME " enabled (heartbeat=%d sec, nowayout=%d)\n", 270e6bb42e3SRenaud CERRATO heartbeat, nowayout); 271e6bb42e3SRenaud CERRATO 272e6bb42e3SRenaud CERRATO return 0; 273e6bb42e3SRenaud CERRATO } 274e6bb42e3SRenaud CERRATO 275e6bb42e3SRenaud CERRATO static int __exit at91wdt_remove(struct platform_device *pdev) 276e6bb42e3SRenaud CERRATO { 277e6bb42e3SRenaud CERRATO int res; 278e6bb42e3SRenaud CERRATO 279e6bb42e3SRenaud CERRATO res = misc_deregister(&at91wdt_miscdev); 280e6bb42e3SRenaud CERRATO if (!res) 281e6bb42e3SRenaud CERRATO at91wdt_miscdev.parent = NULL; 282e6bb42e3SRenaud CERRATO 283e6bb42e3SRenaud CERRATO return res; 284e6bb42e3SRenaud CERRATO } 285e6bb42e3SRenaud CERRATO 286e6bb42e3SRenaud CERRATO #ifdef CONFIG_PM 287e6bb42e3SRenaud CERRATO 288e6bb42e3SRenaud CERRATO static int at91wdt_suspend(struct platform_device *pdev, pm_message_t message) 289e6bb42e3SRenaud CERRATO { 290e6bb42e3SRenaud CERRATO return 0; 291e6bb42e3SRenaud CERRATO } 292e6bb42e3SRenaud CERRATO 293e6bb42e3SRenaud CERRATO static int at91wdt_resume(struct platform_device *pdev) 294e6bb42e3SRenaud CERRATO { 295e6bb42e3SRenaud CERRATO return 0; 296e6bb42e3SRenaud CERRATO } 297e6bb42e3SRenaud CERRATO 298e6bb42e3SRenaud CERRATO #else 299e6bb42e3SRenaud CERRATO #define at91wdt_suspend NULL 300e6bb42e3SRenaud CERRATO #define at91wdt_resume NULL 301e6bb42e3SRenaud CERRATO #endif 302e6bb42e3SRenaud CERRATO 303e6bb42e3SRenaud CERRATO static struct platform_driver at91wdt_driver = { 304e6bb42e3SRenaud CERRATO .remove = __exit_p(at91wdt_remove), 305e6bb42e3SRenaud CERRATO .suspend = at91wdt_suspend, 306e6bb42e3SRenaud CERRATO .resume = at91wdt_resume, 307e6bb42e3SRenaud CERRATO .driver = { 308e6bb42e3SRenaud CERRATO .name = "at91_wdt", 309e6bb42e3SRenaud CERRATO .owner = THIS_MODULE, 310e6bb42e3SRenaud CERRATO }, 311e6bb42e3SRenaud CERRATO }; 312e6bb42e3SRenaud CERRATO 313e6bb42e3SRenaud CERRATO static int __init at91sam_wdt_init(void) 314e6bb42e3SRenaud CERRATO { 315e6bb42e3SRenaud CERRATO return platform_driver_probe(&at91wdt_driver, at91wdt_probe); 316e6bb42e3SRenaud CERRATO } 317e6bb42e3SRenaud CERRATO 318e6bb42e3SRenaud CERRATO static void __exit at91sam_wdt_exit(void) 319e6bb42e3SRenaud CERRATO { 320e6bb42e3SRenaud CERRATO platform_driver_unregister(&at91wdt_driver); 321e6bb42e3SRenaud CERRATO } 322e6bb42e3SRenaud CERRATO 323e6bb42e3SRenaud CERRATO module_init(at91sam_wdt_init); 324e6bb42e3SRenaud CERRATO module_exit(at91sam_wdt_exit); 325e6bb42e3SRenaud CERRATO 326e6bb42e3SRenaud CERRATO MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>"); 327e6bb42e3SRenaud CERRATO MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors"); 328e6bb42e3SRenaud CERRATO MODULE_LICENSE("GPL"); 329e6bb42e3SRenaud CERRATO MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); 330