xref: /linux/drivers/watchdog/at91sam9_wdt.c (revision 06d07429858317ded2db7986113a9e0129cd599b)
12e62c498SMarcus Folkesson // SPDX-License-Identifier: GPL-2.0+
2e6bb42e3SRenaud CERRATO /*
3e6bb42e3SRenaud CERRATO  * Watchdog driver for Atmel AT91SAM9x processors.
4e6bb42e3SRenaud CERRATO  *
5e6bb42e3SRenaud CERRATO  * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
6e6bb42e3SRenaud CERRATO  *
7e6bb42e3SRenaud CERRATO  */
8e6bb42e3SRenaud CERRATO 
9e6bb42e3SRenaud CERRATO /*
10e6bb42e3SRenaud CERRATO  * The Watchdog Timer Mode Register can be only written to once. If the
11e6bb42e3SRenaud CERRATO  * timeout need to be set from Linux, be sure that the bootstrap or the
12e6bb42e3SRenaud CERRATO  * bootloader doesn't write to this register.
13e6bb42e3SRenaud CERRATO  */
14e6bb42e3SRenaud CERRATO 
1527c766aaSJoe Perches #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
1627c766aaSJoe Perches 
17a97a09bdSAlexandre Belloni #include <linux/clk.h>
18e6bb42e3SRenaud CERRATO #include <linux/errno.h>
19e6bb42e3SRenaud CERRATO #include <linux/init.h>
205161b31dSBoris BREZILLON #include <linux/interrupt.h>
212af29b78SAndrew Victor #include <linux/io.h>
22e6bb42e3SRenaud CERRATO #include <linux/kernel.h>
23e6bb42e3SRenaud CERRATO #include <linux/module.h>
24e6bb42e3SRenaud CERRATO #include <linux/moduleparam.h>
25e6bb42e3SRenaud CERRATO #include <linux/platform_device.h>
265161b31dSBoris BREZILLON #include <linux/reboot.h>
27e6bb42e3SRenaud CERRATO #include <linux/types.h>
28e6bb42e3SRenaud CERRATO #include <linux/watchdog.h>
29e6bb42e3SRenaud CERRATO #include <linux/jiffies.h>
30e6bb42e3SRenaud CERRATO #include <linux/timer.h>
31e6bb42e3SRenaud CERRATO #include <linux/bitops.h>
32e6bb42e3SRenaud CERRATO #include <linux/uaccess.h>
33be49bbaeSFabio Porcedda #include <linux/of.h>
345161b31dSBoris BREZILLON #include <linux/of_irq.h>
35e6bb42e3SRenaud CERRATO 
36e7b39145SJean-Christophe Plagniol-Villard #include "at91sam9_wdt.h"
37e6bb42e3SRenaud CERRATO 
38e6bb42e3SRenaud CERRATO #define DRV_NAME "AT91SAM9 Watchdog"
39e6bb42e3SRenaud CERRATO 
405161b31dSBoris BREZILLON #define wdt_read(wdt, field) \
41feccebe9SBen Dooks 	readl_relaxed((wdt)->base + (field))
425161b31dSBoris BREZILLON #define wdt_write(wtd, field, val) \
43feccebe9SBen Dooks 	writel_relaxed((val), (wdt)->base + (field))
44c1c30a29SJean-Christophe PLAGNIOL-VILLARD 
45e6bb42e3SRenaud CERRATO /* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
46e6bb42e3SRenaud CERRATO  * use this to convert a watchdog
47e6bb42e3SRenaud CERRATO  * value from/to milliseconds.
48e6bb42e3SRenaud CERRATO  */
495161b31dSBoris BREZILLON #define ticks_to_hz_rounddown(t)	((((t) + 1) * HZ) >> 8)
505161b31dSBoris BREZILLON #define ticks_to_hz_roundup(t)		(((((t) + 1) * HZ) + 255) >> 8)
515161b31dSBoris BREZILLON #define ticks_to_secs(t)		(((t) + 1) >> 8)
521444797fSBoris BREZILLON #define secs_to_ticks(s)		((s) ? (((s) << 8) - 1) : 0)
535161b31dSBoris BREZILLON 
545161b31dSBoris BREZILLON #define WDT_MR_RESET	0x3FFF2FFF
555161b31dSBoris BREZILLON 
565161b31dSBoris BREZILLON /* Watchdog max counter value in ticks */
575161b31dSBoris BREZILLON #define WDT_COUNTER_MAX_TICKS	0xFFF
585161b31dSBoris BREZILLON 
595161b31dSBoris BREZILLON /* Watchdog max delta/value in secs */
605161b31dSBoris BREZILLON #define WDT_COUNTER_MAX_SECS	ticks_to_secs(WDT_COUNTER_MAX_TICKS)
61e6bb42e3SRenaud CERRATO 
62e6bb42e3SRenaud CERRATO /* Hardware timeout in seconds */
63e6bb42e3SRenaud CERRATO #define WDT_HW_TIMEOUT 2
64e6bb42e3SRenaud CERRATO 
65e6bb42e3SRenaud CERRATO /* Timer heartbeat (500ms) */
66e6bb42e3SRenaud CERRATO #define WDT_TIMEOUT	(HZ/2)
67e6bb42e3SRenaud CERRATO 
68e6bb42e3SRenaud CERRATO /* User land timeout */
69e6bb42e3SRenaud CERRATO #define WDT_HEARTBEAT 15
70c1fd5f64SFabio Porcedda static int heartbeat;
71e6bb42e3SRenaud CERRATO module_param(heartbeat, int, 0);
72e6bb42e3SRenaud CERRATO MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
73e6bb42e3SRenaud CERRATO 	"(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
74e6bb42e3SRenaud CERRATO 
7586a1e189SWim Van Sebroeck static bool nowayout = WATCHDOG_NOWAYOUT;
7686a1e189SWim Van Sebroeck module_param(nowayout, bool, 0);
77e6bb42e3SRenaud CERRATO MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
78e6bb42e3SRenaud CERRATO 	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
79e6bb42e3SRenaud CERRATO 
805161b31dSBoris BREZILLON #define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd)
815161b31dSBoris BREZILLON struct at91wdt {
825161b31dSBoris BREZILLON 	struct watchdog_device wdd;
83c1c30a29SJean-Christophe PLAGNIOL-VILLARD 	void __iomem *base;
84e6bb42e3SRenaud CERRATO 	unsigned long next_heartbeat;	/* the next_heartbeat for the timer */
85e6bb42e3SRenaud CERRATO 	struct timer_list timer;	/* The timer that pings the watchdog */
865161b31dSBoris BREZILLON 	u32 mr;
875161b31dSBoris BREZILLON 	u32 mr_mask;
885161b31dSBoris BREZILLON 	unsigned long heartbeat;	/* WDT heartbeat in jiffies */
895161b31dSBoris BREZILLON 	bool nowayout;
905161b31dSBoris BREZILLON 	unsigned int irq;
91a97a09bdSAlexandre Belloni 	struct clk *sclk;
925161b31dSBoris BREZILLON };
93e6bb42e3SRenaud CERRATO 
94e6bb42e3SRenaud CERRATO /* ......................................................................... */
95e6bb42e3SRenaud CERRATO 
wdt_interrupt(int irq,void * dev_id)965161b31dSBoris BREZILLON static irqreturn_t wdt_interrupt(int irq, void *dev_id)
975161b31dSBoris BREZILLON {
985161b31dSBoris BREZILLON 	struct at91wdt *wdt = (struct at91wdt *)dev_id;
995161b31dSBoris BREZILLON 
1005161b31dSBoris BREZILLON 	if (wdt_read(wdt, AT91_WDT_SR)) {
1015161b31dSBoris BREZILLON 		pr_crit("at91sam9 WDT software reset\n");
1025161b31dSBoris BREZILLON 		emergency_restart();
1035161b31dSBoris BREZILLON 		pr_crit("Reboot didn't ?????\n");
1045161b31dSBoris BREZILLON 	}
1055161b31dSBoris BREZILLON 
1065161b31dSBoris BREZILLON 	return IRQ_HANDLED;
1075161b31dSBoris BREZILLON }
1085161b31dSBoris BREZILLON 
109e6bb42e3SRenaud CERRATO /*
110e6bb42e3SRenaud CERRATO  * Reload the watchdog timer.  (ie, pat the watchdog)
111e6bb42e3SRenaud CERRATO  */
at91_wdt_reset(struct at91wdt * wdt)1125161b31dSBoris BREZILLON static inline void at91_wdt_reset(struct at91wdt *wdt)
113e6bb42e3SRenaud CERRATO {
1145161b31dSBoris BREZILLON 	wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
115e6bb42e3SRenaud CERRATO }
116e6bb42e3SRenaud CERRATO 
117e6bb42e3SRenaud CERRATO /*
118e6bb42e3SRenaud CERRATO  * Timer tick
119e6bb42e3SRenaud CERRATO  */
at91_ping(struct timer_list * t)120e99e88a9SKees Cook static void at91_ping(struct timer_list *t)
121e6bb42e3SRenaud CERRATO {
122e99e88a9SKees Cook 	struct at91wdt *wdt = from_timer(wdt, t, timer);
1235161b31dSBoris BREZILLON 	if (time_before(jiffies, wdt->next_heartbeat) ||
1245161b31dSBoris BREZILLON 	    !watchdog_active(&wdt->wdd)) {
1255161b31dSBoris BREZILLON 		at91_wdt_reset(wdt);
1265161b31dSBoris BREZILLON 		mod_timer(&wdt->timer, jiffies + wdt->heartbeat);
1275161b31dSBoris BREZILLON 	} else {
12827c766aaSJoe Perches 		pr_crit("I will reset your machine !\n");
129e6bb42e3SRenaud CERRATO 	}
130e6bb42e3SRenaud CERRATO }
131e6bb42e3SRenaud CERRATO 
at91_wdt_start(struct watchdog_device * wdd)132490ac7afSWenyou Yang static int at91_wdt_start(struct watchdog_device *wdd)
133e6bb42e3SRenaud CERRATO {
1345161b31dSBoris BREZILLON 	struct at91wdt *wdt = to_wdt(wdd);
1355161b31dSBoris BREZILLON 	/* calculate when the next userspace timeout will be */
1365161b31dSBoris BREZILLON 	wdt->next_heartbeat = jiffies + wdd->timeout * HZ;
137490ac7afSWenyou Yang 	return 0;
138490ac7afSWenyou Yang }
139e6bb42e3SRenaud CERRATO 
at91_wdt_stop(struct watchdog_device * wdd)140490ac7afSWenyou Yang static int at91_wdt_stop(struct watchdog_device *wdd)
141490ac7afSWenyou Yang {
142490ac7afSWenyou Yang 	/* The watchdog timer hardware can not be stopped... */
143490ac7afSWenyou Yang 	return 0;
144490ac7afSWenyou Yang }
145e6bb42e3SRenaud CERRATO 
at91_wdt_set_timeout(struct watchdog_device * wdd,unsigned int new_timeout)146490ac7afSWenyou Yang static int at91_wdt_set_timeout(struct watchdog_device *wdd, unsigned int new_timeout)
147490ac7afSWenyou Yang {
148490ac7afSWenyou Yang 	wdd->timeout = new_timeout;
1495161b31dSBoris BREZILLON 	return at91_wdt_start(wdd);
150e6bb42e3SRenaud CERRATO }
151e6bb42e3SRenaud CERRATO 
at91_wdt_init(struct platform_device * pdev,struct at91wdt * wdt)1525161b31dSBoris BREZILLON static int at91_wdt_init(struct platform_device *pdev, struct at91wdt *wdt)
153e6bb42e3SRenaud CERRATO {
1545161b31dSBoris BREZILLON 	u32 tmp;
1555161b31dSBoris BREZILLON 	u32 delta;
1565161b31dSBoris BREZILLON 	u32 value;
1575161b31dSBoris BREZILLON 	int err;
1585161b31dSBoris BREZILLON 	u32 mask = wdt->mr_mask;
1595161b31dSBoris BREZILLON 	unsigned long min_heartbeat = 1;
160f72fa00fSBoris BREZILLON 	unsigned long max_heartbeat;
1615161b31dSBoris BREZILLON 	struct device *dev = &pdev->dev;
162e6bb42e3SRenaud CERRATO 
1635161b31dSBoris BREZILLON 	tmp = wdt_read(wdt, AT91_WDT_MR);
1645161b31dSBoris BREZILLON 	if ((tmp & mask) != (wdt->mr & mask)) {
1655161b31dSBoris BREZILLON 		if (tmp == WDT_MR_RESET) {
1665161b31dSBoris BREZILLON 			wdt_write(wdt, AT91_WDT_MR, wdt->mr);
1675161b31dSBoris BREZILLON 			tmp = wdt_read(wdt, AT91_WDT_MR);
1685161b31dSBoris BREZILLON 		}
169e6bb42e3SRenaud CERRATO 	}
170e6bb42e3SRenaud CERRATO 
1715161b31dSBoris BREZILLON 	if (tmp & AT91_WDT_WDDIS) {
1725161b31dSBoris BREZILLON 		if (wdt->mr & AT91_WDT_WDDIS)
1735161b31dSBoris BREZILLON 			return 0;
1745161b31dSBoris BREZILLON 		dev_err(dev, "watchdog is disabled\n");
1755161b31dSBoris BREZILLON 		return -EINVAL;
1765161b31dSBoris BREZILLON 	}
1775161b31dSBoris BREZILLON 
1785161b31dSBoris BREZILLON 	value = tmp & AT91_WDT_WDV;
1795161b31dSBoris BREZILLON 	delta = (tmp & AT91_WDT_WDD) >> 16;
1805161b31dSBoris BREZILLON 
1815161b31dSBoris BREZILLON 	if (delta < value)
1825161b31dSBoris BREZILLON 		min_heartbeat = ticks_to_hz_roundup(value - delta);
1835161b31dSBoris BREZILLON 
184f72fa00fSBoris BREZILLON 	max_heartbeat = ticks_to_hz_rounddown(value);
185f72fa00fSBoris BREZILLON 	if (!max_heartbeat) {
1865161b31dSBoris BREZILLON 		dev_err(dev,
1875161b31dSBoris BREZILLON 			"heartbeat is too small for the system to handle it correctly\n");
1885161b31dSBoris BREZILLON 		return -EINVAL;
1895161b31dSBoris BREZILLON 	}
1905161b31dSBoris BREZILLON 
191f72fa00fSBoris BREZILLON 	/*
192f72fa00fSBoris BREZILLON 	 * Try to reset the watchdog counter 4 or 2 times more often than
193f72fa00fSBoris BREZILLON 	 * actually requested, to avoid spurious watchdog reset.
194f72fa00fSBoris BREZILLON 	 * If this is not possible because of the min_heartbeat value, reset
195f72fa00fSBoris BREZILLON 	 * it at the min_heartbeat period.
196f72fa00fSBoris BREZILLON 	 */
197f72fa00fSBoris BREZILLON 	if ((max_heartbeat / 4) >= min_heartbeat)
198f72fa00fSBoris BREZILLON 		wdt->heartbeat = max_heartbeat / 4;
199f72fa00fSBoris BREZILLON 	else if ((max_heartbeat / 2) >= min_heartbeat)
200f72fa00fSBoris BREZILLON 		wdt->heartbeat = max_heartbeat / 2;
201f72fa00fSBoris BREZILLON 	else
2025161b31dSBoris BREZILLON 		wdt->heartbeat = min_heartbeat;
203f72fa00fSBoris BREZILLON 
204f72fa00fSBoris BREZILLON 	if (max_heartbeat < min_heartbeat + 4)
2055161b31dSBoris BREZILLON 		dev_warn(dev,
2065161b31dSBoris BREZILLON 			 "min heartbeat and max heartbeat might be too close for the system to handle it correctly\n");
2075161b31dSBoris BREZILLON 
2085161b31dSBoris BREZILLON 	if ((tmp & AT91_WDT_WDFIEN) && wdt->irq) {
20907bec0e0Sruanjinjie 		err = devm_request_irq(dev, wdt->irq, wdt_interrupt,
21007bec0e0Sruanjinjie 				       IRQF_SHARED | IRQF_IRQPOLL | IRQF_NO_SUSPEND,
2115161b31dSBoris BREZILLON 				       pdev->name, wdt);
2125161b31dSBoris BREZILLON 		if (err)
2135161b31dSBoris BREZILLON 			return err;
2145161b31dSBoris BREZILLON 	}
2155161b31dSBoris BREZILLON 
2165161b31dSBoris BREZILLON 	if ((tmp & wdt->mr_mask) != (wdt->mr & wdt->mr_mask))
2175161b31dSBoris BREZILLON 		dev_warn(dev,
2185161b31dSBoris BREZILLON 			 "watchdog already configured differently (mr = %x expecting %x)\n",
2195161b31dSBoris BREZILLON 			 tmp & wdt->mr_mask, wdt->mr & wdt->mr_mask);
2205161b31dSBoris BREZILLON 
221e99e88a9SKees Cook 	timer_setup(&wdt->timer, at91_ping, 0);
222a04c3f01SBoris BREZILLON 
223a04c3f01SBoris BREZILLON 	/*
224a04c3f01SBoris BREZILLON 	 * Use min_heartbeat the first time to avoid spurious watchdog reset:
225a04c3f01SBoris BREZILLON 	 * we don't know for how long the watchdog counter is running, and
226a04c3f01SBoris BREZILLON 	 *  - resetting it right now might trigger a watchdog fault reset
227a04c3f01SBoris BREZILLON 	 *  - waiting for heartbeat time might lead to a watchdog timeout
228a04c3f01SBoris BREZILLON 	 *    reset
229a04c3f01SBoris BREZILLON 	 */
230a04c3f01SBoris BREZILLON 	mod_timer(&wdt->timer, jiffies + min_heartbeat);
2315161b31dSBoris BREZILLON 
2325161b31dSBoris BREZILLON 	/* Try to set timeout from device tree first */
2335161b31dSBoris BREZILLON 	if (watchdog_init_timeout(&wdt->wdd, 0, dev))
2345161b31dSBoris BREZILLON 		watchdog_init_timeout(&wdt->wdd, heartbeat, dev);
2355161b31dSBoris BREZILLON 	watchdog_set_nowayout(&wdt->wdd, wdt->nowayout);
2365161b31dSBoris BREZILLON 	err = watchdog_register_device(&wdt->wdd);
2375161b31dSBoris BREZILLON 	if (err)
2385161b31dSBoris BREZILLON 		goto out_stop_timer;
2395161b31dSBoris BREZILLON 
2405161b31dSBoris BREZILLON 	wdt->next_heartbeat = jiffies + wdt->wdd.timeout * HZ;
241e6bb42e3SRenaud CERRATO 
242e6bb42e3SRenaud CERRATO 	return 0;
2435161b31dSBoris BREZILLON 
2445161b31dSBoris BREZILLON out_stop_timer:
2455161b31dSBoris BREZILLON 	del_timer(&wdt->timer);
2465161b31dSBoris BREZILLON 	return err;
247e6bb42e3SRenaud CERRATO }
248e6bb42e3SRenaud CERRATO 
249490ac7afSWenyou Yang /* ......................................................................... */
250490ac7afSWenyou Yang 
251e6bb42e3SRenaud CERRATO static const struct watchdog_info at91_wdt_info = {
252e6bb42e3SRenaud CERRATO 	.identity	= DRV_NAME,
253e73a7802SWim Van Sebroeck 	.options	= WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
254e73a7802SWim Van Sebroeck 						WDIOF_MAGICCLOSE,
255e6bb42e3SRenaud CERRATO };
256e6bb42e3SRenaud CERRATO 
257490ac7afSWenyou Yang static const struct watchdog_ops at91_wdt_ops = {
258e6bb42e3SRenaud CERRATO 	.owner =	THIS_MODULE,
259490ac7afSWenyou Yang 	.start =	at91_wdt_start,
260490ac7afSWenyou Yang 	.stop =		at91_wdt_stop,
261490ac7afSWenyou Yang 	.set_timeout =	at91_wdt_set_timeout,
262e6bb42e3SRenaud CERRATO };
263e6bb42e3SRenaud CERRATO 
2645161b31dSBoris BREZILLON #if defined(CONFIG_OF)
of_at91wdt_init(struct device_node * np,struct at91wdt * wdt)2655161b31dSBoris BREZILLON static int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt)
2665161b31dSBoris BREZILLON {
2675161b31dSBoris BREZILLON 	u32 min = 0;
2685161b31dSBoris BREZILLON 	u32 max = WDT_COUNTER_MAX_SECS;
2695161b31dSBoris BREZILLON 	const char *tmp;
2705161b31dSBoris BREZILLON 
2715161b31dSBoris BREZILLON 	/* Get the interrupts property */
2725161b31dSBoris BREZILLON 	wdt->irq = irq_of_parse_and_map(np, 0);
2735161b31dSBoris BREZILLON 	if (!wdt->irq)
2745161b31dSBoris BREZILLON 		dev_warn(wdt->wdd.parent, "failed to get IRQ from DT\n");
2755161b31dSBoris BREZILLON 
2765161b31dSBoris BREZILLON 	if (!of_property_read_u32_index(np, "atmel,max-heartbeat-sec", 0,
2775161b31dSBoris BREZILLON 					&max)) {
2785161b31dSBoris BREZILLON 		if (!max || max > WDT_COUNTER_MAX_SECS)
2795161b31dSBoris BREZILLON 			max = WDT_COUNTER_MAX_SECS;
2805161b31dSBoris BREZILLON 
2815161b31dSBoris BREZILLON 		if (!of_property_read_u32_index(np, "atmel,min-heartbeat-sec",
2825161b31dSBoris BREZILLON 						0, &min)) {
2835161b31dSBoris BREZILLON 			if (min >= max)
2845161b31dSBoris BREZILLON 				min = max - 1;
2855161b31dSBoris BREZILLON 		}
2865161b31dSBoris BREZILLON 	}
2875161b31dSBoris BREZILLON 
2885161b31dSBoris BREZILLON 	min = secs_to_ticks(min);
2895161b31dSBoris BREZILLON 	max = secs_to_ticks(max);
2905161b31dSBoris BREZILLON 
2915161b31dSBoris BREZILLON 	wdt->mr_mask = 0x3FFFFFFF;
2925161b31dSBoris BREZILLON 	wdt->mr = 0;
2935161b31dSBoris BREZILLON 	if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
2945161b31dSBoris BREZILLON 	    !strcmp(tmp, "software")) {
2955161b31dSBoris BREZILLON 		wdt->mr |= AT91_WDT_WDFIEN;
2965161b31dSBoris BREZILLON 		wdt->mr_mask &= ~AT91_WDT_WDRPROC;
2975161b31dSBoris BREZILLON 	} else {
2985161b31dSBoris BREZILLON 		wdt->mr |= AT91_WDT_WDRSTEN;
2995161b31dSBoris BREZILLON 	}
3005161b31dSBoris BREZILLON 
3015161b31dSBoris BREZILLON 	if (!of_property_read_string(np, "atmel,reset-type", &tmp) &&
3025161b31dSBoris BREZILLON 	    !strcmp(tmp, "proc"))
3035161b31dSBoris BREZILLON 		wdt->mr |= AT91_WDT_WDRPROC;
3045161b31dSBoris BREZILLON 
3055161b31dSBoris BREZILLON 	if (of_property_read_bool(np, "atmel,disable")) {
3065161b31dSBoris BREZILLON 		wdt->mr |= AT91_WDT_WDDIS;
3075161b31dSBoris BREZILLON 		wdt->mr_mask &= AT91_WDT_WDDIS;
3085161b31dSBoris BREZILLON 	}
3095161b31dSBoris BREZILLON 
3105161b31dSBoris BREZILLON 	if (of_property_read_bool(np, "atmel,idle-halt"))
3115161b31dSBoris BREZILLON 		wdt->mr |= AT91_WDT_WDIDLEHLT;
3125161b31dSBoris BREZILLON 
3135161b31dSBoris BREZILLON 	if (of_property_read_bool(np, "atmel,dbg-halt"))
3145161b31dSBoris BREZILLON 		wdt->mr |= AT91_WDT_WDDBGHLT;
3155161b31dSBoris BREZILLON 
3165161b31dSBoris BREZILLON 	wdt->mr |= max | ((max - min) << 16);
3175161b31dSBoris BREZILLON 
3185161b31dSBoris BREZILLON 	return 0;
3195161b31dSBoris BREZILLON }
3205161b31dSBoris BREZILLON #else
of_at91wdt_init(struct device_node * np,struct at91wdt * wdt)3215161b31dSBoris BREZILLON static inline int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt)
3225161b31dSBoris BREZILLON {
3235161b31dSBoris BREZILLON 	return 0;
3245161b31dSBoris BREZILLON }
3255161b31dSBoris BREZILLON #endif
326e6bb42e3SRenaud CERRATO 
at91wdt_probe(struct platform_device * pdev)32786aa2919SUwe Kleine-König static int at91wdt_probe(struct platform_device *pdev)
328e6bb42e3SRenaud CERRATO {
3295161b31dSBoris BREZILLON 	int err;
3305161b31dSBoris BREZILLON 	struct at91wdt *wdt;
3315161b31dSBoris BREZILLON 
3325161b31dSBoris BREZILLON 	wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
3335161b31dSBoris BREZILLON 	if (!wdt)
3345161b31dSBoris BREZILLON 		return -ENOMEM;
3355161b31dSBoris BREZILLON 
3365161b31dSBoris BREZILLON 	wdt->mr = (WDT_HW_TIMEOUT * 256) | AT91_WDT_WDRSTEN | AT91_WDT_WDD |
3375161b31dSBoris BREZILLON 		  AT91_WDT_WDDBGHLT | AT91_WDT_WDIDLEHLT;
3385161b31dSBoris BREZILLON 	wdt->mr_mask = 0x3FFFFFFF;
3395161b31dSBoris BREZILLON 	wdt->nowayout = nowayout;
3405161b31dSBoris BREZILLON 	wdt->wdd.parent = &pdev->dev;
3415161b31dSBoris BREZILLON 	wdt->wdd.info = &at91_wdt_info;
3425161b31dSBoris BREZILLON 	wdt->wdd.ops = &at91_wdt_ops;
3435161b31dSBoris BREZILLON 	wdt->wdd.timeout = WDT_HEARTBEAT;
3445161b31dSBoris BREZILLON 	wdt->wdd.min_timeout = 1;
3455161b31dSBoris BREZILLON 	wdt->wdd.max_timeout = 0xFFFF;
346e6bb42e3SRenaud CERRATO 
3470f0a6a28SGuenter Roeck 	wdt->base = devm_platform_ioremap_resource(pdev, 0);
3485161b31dSBoris BREZILLON 	if (IS_ERR(wdt->base))
3495161b31dSBoris BREZILLON 		return PTR_ERR(wdt->base);
3505161b31dSBoris BREZILLON 
3513cbb4282SJinjie Ruan 	wdt->sclk = devm_clk_get_enabled(&pdev->dev, NULL);
3523cbb4282SJinjie Ruan 	if (IS_ERR(wdt->sclk)) {
353a97a09bdSAlexandre Belloni 		dev_err(&pdev->dev, "Could not enable slow clock\n");
3543cbb4282SJinjie Ruan 		return PTR_ERR(wdt->sclk);
355a97a09bdSAlexandre Belloni 	}
356a97a09bdSAlexandre Belloni 
3575161b31dSBoris BREZILLON 	if (pdev->dev.of_node) {
3585161b31dSBoris BREZILLON 		err = of_at91wdt_init(pdev->dev.of_node, wdt);
3595161b31dSBoris BREZILLON 		if (err)
3603cbb4282SJinjie Ruan 			return err;
361c1c30a29SJean-Christophe PLAGNIOL-VILLARD 	}
362c1c30a29SJean-Christophe PLAGNIOL-VILLARD 
3635161b31dSBoris BREZILLON 	err = at91_wdt_init(pdev, wdt);
3645161b31dSBoris BREZILLON 	if (err)
3653cbb4282SJinjie Ruan 		return err;
366490ac7afSWenyou Yang 
3675161b31dSBoris BREZILLON 	platform_set_drvdata(pdev, wdt);
368e6bb42e3SRenaud CERRATO 
36927c766aaSJoe Perches 	pr_info("enabled (heartbeat=%d sec, nowayout=%d)\n",
3705161b31dSBoris BREZILLON 		wdt->wdd.timeout, wdt->nowayout);
371e6bb42e3SRenaud CERRATO 
372e6bb42e3SRenaud CERRATO 	return 0;
373e6bb42e3SRenaud CERRATO }
374e6bb42e3SRenaud CERRATO 
at91wdt_remove(struct platform_device * pdev)375*6a7b3de6SUwe Kleine-König static void at91wdt_remove(struct platform_device *pdev)
376e6bb42e3SRenaud CERRATO {
3775161b31dSBoris BREZILLON 	struct at91wdt *wdt = platform_get_drvdata(pdev);
3785161b31dSBoris BREZILLON 	watchdog_unregister_device(&wdt->wdd);
379e6bb42e3SRenaud CERRATO 
380490ac7afSWenyou Yang 	pr_warn("I quit now, hardware will probably reboot!\n");
3815161b31dSBoris BREZILLON 	del_timer(&wdt->timer);
382e6bb42e3SRenaud CERRATO }
383e6bb42e3SRenaud CERRATO 
384be49bbaeSFabio Porcedda #if defined(CONFIG_OF)
3856c41e474SArnd Bergmann static const struct of_device_id at91_wdt_dt_ids[] = {
386be49bbaeSFabio Porcedda 	{ .compatible = "atmel,at91sam9260-wdt" },
387be49bbaeSFabio Porcedda 	{ /* sentinel */ }
388be49bbaeSFabio Porcedda };
389be49bbaeSFabio Porcedda 
390be49bbaeSFabio Porcedda MODULE_DEVICE_TABLE(of, at91_wdt_dt_ids);
391be49bbaeSFabio Porcedda #endif
392be49bbaeSFabio Porcedda 
393e6bb42e3SRenaud CERRATO static struct platform_driver at91wdt_driver = {
39486aa2919SUwe Kleine-König 	.probe		= at91wdt_probe,
395*6a7b3de6SUwe Kleine-König 	.remove_new	= at91wdt_remove,
396e6bb42e3SRenaud CERRATO 	.driver		= {
397e6bb42e3SRenaud CERRATO 		.name	= "at91_wdt",
398be49bbaeSFabio Porcedda 		.of_match_table = of_match_ptr(at91_wdt_dt_ids),
399e6bb42e3SRenaud CERRATO 	},
400e6bb42e3SRenaud CERRATO };
40186aa2919SUwe Kleine-König module_platform_driver(at91wdt_driver);
402e6bb42e3SRenaud CERRATO 
403e6bb42e3SRenaud CERRATO MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
404e6bb42e3SRenaud CERRATO MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
405e6bb42e3SRenaud CERRATO MODULE_LICENSE("GPL");
406