1 // SPDX-License-Identifier: GPL-2.0-only 2 /* p9100.c: P9100 frame buffer driver 3 * 4 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net) 5 * Copyright 1999 Derrick J Brashear (shadow@dementia.org) 6 * 7 * Driver layout based loosely on tgafb.c, see that file for credits. 8 */ 9 10 #include <linux/module.h> 11 #include <linux/kernel.h> 12 #include <linux/errno.h> 13 #include <linux/string.h> 14 #include <linux/delay.h> 15 #include <linux/init.h> 16 #include <linux/fb.h> 17 #include <linux/mm.h> 18 #include <linux/of.h> 19 #include <linux/platform_device.h> 20 21 #include <asm/io.h> 22 #include <asm/fbio.h> 23 24 #include "sbuslib.h" 25 26 /* 27 * Local functions. 28 */ 29 30 static int p9100_setcolreg(unsigned, unsigned, unsigned, unsigned, 31 unsigned, struct fb_info *); 32 static int p9100_blank(int, struct fb_info *); 33 34 static int p9100_sbusfb_mmap(struct fb_info *info, struct vm_area_struct *vma); 35 static int p9100_sbusfb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg); 36 37 /* 38 * Frame buffer operations 39 */ 40 41 static const struct fb_ops p9100_ops = { 42 .owner = THIS_MODULE, 43 FB_DEFAULT_SBUS_OPS(p9100), 44 .fb_setcolreg = p9100_setcolreg, 45 .fb_blank = p9100_blank, 46 }; 47 48 /* P9100 control registers */ 49 #define P9100_SYSCTL_OFF 0x0UL 50 #define P9100_VIDEOCTL_OFF 0x100UL 51 #define P9100_VRAMCTL_OFF 0x180UL 52 #define P9100_RAMDAC_OFF 0x200UL 53 #define P9100_VIDEOCOPROC_OFF 0x400UL 54 55 /* P9100 command registers */ 56 #define P9100_CMD_OFF 0x0UL 57 58 /* P9100 framebuffer memory */ 59 #define P9100_FB_OFF 0x0UL 60 61 /* 3 bits: 2=8bpp 3=16bpp 5=32bpp 7=24bpp */ 62 #define SYS_CONFIG_PIXELSIZE_SHIFT 26 63 64 #define SCREENPAINT_TIMECTL1_ENABLE_VIDEO 0x20 /* 0 = off, 1 = on */ 65 66 struct p9100_regs { 67 /* Registers for the system control */ 68 u32 sys_base; 69 u32 sys_config; 70 u32 sys_intr; 71 u32 sys_int_ena; 72 u32 sys_alt_rd; 73 u32 sys_alt_wr; 74 u32 sys_xxx[58]; 75 76 /* Registers for the video control */ 77 u32 vid_base; 78 u32 vid_hcnt; 79 u32 vid_htotal; 80 u32 vid_hsync_rise; 81 u32 vid_hblank_rise; 82 u32 vid_hblank_fall; 83 u32 vid_hcnt_preload; 84 u32 vid_vcnt; 85 u32 vid_vlen; 86 u32 vid_vsync_rise; 87 u32 vid_vblank_rise; 88 u32 vid_vblank_fall; 89 u32 vid_vcnt_preload; 90 u32 vid_screenpaint_addr; 91 u32 vid_screenpaint_timectl1; 92 u32 vid_screenpaint_qsfcnt; 93 u32 vid_screenpaint_timectl2; 94 u32 vid_xxx[15]; 95 96 /* Registers for the video control */ 97 u32 vram_base; 98 u32 vram_memcfg; 99 u32 vram_refresh_pd; 100 u32 vram_refresh_cnt; 101 u32 vram_raslo_max; 102 u32 vram_raslo_cur; 103 u32 pwrup_cfg; 104 u32 vram_xxx[25]; 105 106 /* Registers for IBM RGB528 Palette */ 107 u32 ramdac_cmap_wridx; 108 u32 ramdac_palette_data; 109 u32 ramdac_pixel_mask; 110 u32 ramdac_palette_rdaddr; 111 u32 ramdac_idx_lo; 112 u32 ramdac_idx_hi; 113 u32 ramdac_idx_data; 114 u32 ramdac_idx_ctl; 115 u32 ramdac_xxx[1784]; 116 }; 117 118 struct p9100_cmd_parameng { 119 u32 parameng_status; 120 u32 parameng_bltcmd; 121 u32 parameng_quadcmd; 122 }; 123 124 struct p9100_par { 125 spinlock_t lock; 126 struct p9100_regs __iomem *regs; 127 128 u32 flags; 129 #define P9100_FLAG_BLANKED 0x00000001 130 131 unsigned long which_io; 132 }; 133 134 /** 135 * p9100_setcolreg - Optional function. Sets a color register. 136 * @regno: boolean, 0 copy local, 1 get_user() function 137 * @red: frame buffer colormap structure 138 * @green: The green value which can be up to 16 bits wide 139 * @blue: The blue value which can be up to 16 bits wide. 140 * @transp: If supported the alpha value which can be up to 16 bits wide. 141 * @info: frame buffer info structure 142 */ 143 static int p9100_setcolreg(unsigned regno, 144 unsigned red, unsigned green, unsigned blue, 145 unsigned transp, struct fb_info *info) 146 { 147 struct p9100_par *par = (struct p9100_par *) info->par; 148 struct p9100_regs __iomem *regs = par->regs; 149 unsigned long flags; 150 151 if (regno >= 256) 152 return 1; 153 154 red >>= 8; 155 green >>= 8; 156 blue >>= 8; 157 158 spin_lock_irqsave(&par->lock, flags); 159 160 sbus_writel((regno << 16), ®s->ramdac_cmap_wridx); 161 sbus_writel((red << 16), ®s->ramdac_palette_data); 162 sbus_writel((green << 16), ®s->ramdac_palette_data); 163 sbus_writel((blue << 16), ®s->ramdac_palette_data); 164 165 spin_unlock_irqrestore(&par->lock, flags); 166 167 return 0; 168 } 169 170 /** 171 * p9100_blank - Optional function. Blanks the display. 172 * @blank: the blank mode we want. 173 * @info: frame buffer structure that represents a single frame buffer 174 */ 175 static int 176 p9100_blank(int blank, struct fb_info *info) 177 { 178 struct p9100_par *par = (struct p9100_par *) info->par; 179 struct p9100_regs __iomem *regs = par->regs; 180 unsigned long flags; 181 u32 val; 182 183 spin_lock_irqsave(&par->lock, flags); 184 185 switch (blank) { 186 case FB_BLANK_UNBLANK: /* Unblanking */ 187 val = sbus_readl(®s->vid_screenpaint_timectl1); 188 val |= SCREENPAINT_TIMECTL1_ENABLE_VIDEO; 189 sbus_writel(val, ®s->vid_screenpaint_timectl1); 190 par->flags &= ~P9100_FLAG_BLANKED; 191 break; 192 193 case FB_BLANK_NORMAL: /* Normal blanking */ 194 case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */ 195 case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */ 196 case FB_BLANK_POWERDOWN: /* Poweroff */ 197 val = sbus_readl(®s->vid_screenpaint_timectl1); 198 val &= ~SCREENPAINT_TIMECTL1_ENABLE_VIDEO; 199 sbus_writel(val, ®s->vid_screenpaint_timectl1); 200 par->flags |= P9100_FLAG_BLANKED; 201 break; 202 } 203 204 spin_unlock_irqrestore(&par->lock, flags); 205 206 return 0; 207 } 208 209 static struct sbus_mmap_map p9100_mmap_map[] = { 210 { CG3_MMAP_OFFSET, 0, SBUS_MMAP_FBSIZE(1) }, 211 { 0, 0, 0 } 212 }; 213 214 static int p9100_sbusfb_mmap(struct fb_info *info, struct vm_area_struct *vma) 215 { 216 struct p9100_par *par = (struct p9100_par *)info->par; 217 218 return sbusfb_mmap_helper(p9100_mmap_map, 219 info->fix.smem_start, info->fix.smem_len, 220 par->which_io, vma); 221 } 222 223 static int p9100_sbusfb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) 224 { 225 /* Make it look like a cg3. */ 226 return sbusfb_ioctl_helper(cmd, arg, info, 227 FBTYPE_SUN3COLOR, 8, info->fix.smem_len); 228 } 229 230 /* 231 * Initialisation 232 */ 233 234 static void p9100_init_fix(struct fb_info *info, int linebytes, struct device_node *dp) 235 { 236 snprintf(info->fix.id, sizeof(info->fix.id), "%pOFn", dp); 237 238 info->fix.type = FB_TYPE_PACKED_PIXELS; 239 info->fix.visual = FB_VISUAL_PSEUDOCOLOR; 240 241 info->fix.line_length = linebytes; 242 243 info->fix.accel = FB_ACCEL_SUN_CGTHREE; 244 } 245 246 static int p9100_probe(struct platform_device *op) 247 { 248 struct device_node *dp = op->dev.of_node; 249 struct fb_info *info; 250 struct p9100_par *par; 251 int linebytes, err; 252 253 info = framebuffer_alloc(sizeof(struct p9100_par), &op->dev); 254 255 err = -ENOMEM; 256 if (!info) 257 goto out_err; 258 par = info->par; 259 260 spin_lock_init(&par->lock); 261 262 /* This is the framebuffer and the only resource apps can mmap. */ 263 info->fix.smem_start = op->resource[2].start; 264 par->which_io = op->resource[2].flags & IORESOURCE_BITS; 265 266 sbusfb_fill_var(&info->var, dp, 8); 267 info->var.red.length = 8; 268 info->var.green.length = 8; 269 info->var.blue.length = 8; 270 271 linebytes = of_getintprop_default(dp, "linebytes", info->var.xres); 272 info->fix.smem_len = PAGE_ALIGN(linebytes * info->var.yres); 273 274 par->regs = of_ioremap(&op->resource[0], 0, 275 sizeof(struct p9100_regs), "p9100 regs"); 276 if (!par->regs) 277 goto out_release_fb; 278 279 info->fbops = &p9100_ops; 280 info->screen_base = of_ioremap(&op->resource[2], 0, 281 info->fix.smem_len, "p9100 ram"); 282 if (!info->screen_base) 283 goto out_unmap_regs; 284 285 p9100_blank(FB_BLANK_UNBLANK, info); 286 287 if (fb_alloc_cmap(&info->cmap, 256, 0)) 288 goto out_unmap_screen; 289 290 p9100_init_fix(info, linebytes, dp); 291 292 err = register_framebuffer(info); 293 if (err < 0) 294 goto out_dealloc_cmap; 295 296 fb_set_cmap(&info->cmap, info); 297 298 dev_set_drvdata(&op->dev, info); 299 300 printk(KERN_INFO "%pOF: p9100 at %lx:%lx\n", 301 dp, 302 par->which_io, info->fix.smem_start); 303 304 return 0; 305 306 out_dealloc_cmap: 307 fb_dealloc_cmap(&info->cmap); 308 309 out_unmap_screen: 310 of_iounmap(&op->resource[2], info->screen_base, info->fix.smem_len); 311 312 out_unmap_regs: 313 of_iounmap(&op->resource[0], par->regs, sizeof(struct p9100_regs)); 314 315 out_release_fb: 316 framebuffer_release(info); 317 318 out_err: 319 return err; 320 } 321 322 static void p9100_remove(struct platform_device *op) 323 { 324 struct fb_info *info = dev_get_drvdata(&op->dev); 325 struct p9100_par *par = info->par; 326 327 unregister_framebuffer(info); 328 fb_dealloc_cmap(&info->cmap); 329 330 of_iounmap(&op->resource[0], par->regs, sizeof(struct p9100_regs)); 331 of_iounmap(&op->resource[2], info->screen_base, info->fix.smem_len); 332 333 framebuffer_release(info); 334 } 335 336 static const struct of_device_id p9100_match[] = { 337 { 338 .name = "p9100", 339 }, 340 {}, 341 }; 342 MODULE_DEVICE_TABLE(of, p9100_match); 343 344 static struct platform_driver p9100_driver = { 345 .driver = { 346 .name = "p9100", 347 .of_match_table = p9100_match, 348 }, 349 .probe = p9100_probe, 350 .remove = p9100_remove, 351 }; 352 353 static int __init p9100_init(void) 354 { 355 if (fb_get_options("p9100fb", NULL)) 356 return -ENODEV; 357 358 return platform_driver_register(&p9100_driver); 359 } 360 361 static void __exit p9100_exit(void) 362 { 363 platform_driver_unregister(&p9100_driver); 364 } 365 366 module_init(p9100_init); 367 module_exit(p9100_exit); 368 369 MODULE_DESCRIPTION("framebuffer driver for P9100 chipsets"); 370 MODULE_AUTHOR("David S. Miller <davem@davemloft.net>"); 371 MODULE_VERSION("2.0"); 372 MODULE_LICENSE("GPL"); 373