1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * linux/drivers/video/omap2/dss/sdi.c 4 * 5 * Copyright (C) 2009 Nokia Corporation 6 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> 7 */ 8 9 #define DSS_SUBSYS_NAME "SDI" 10 11 #include <linux/kernel.h> 12 #include <linux/delay.h> 13 #include <linux/err.h> 14 #include <linux/regulator/consumer.h> 15 #include <linux/export.h> 16 #include <linux/platform_device.h> 17 #include <linux/string.h> 18 #include <linux/of.h> 19 #include <linux/of_graph.h> 20 #include <linux/component.h> 21 22 #include <video/omapfb_dss.h> 23 #include "dss.h" 24 25 static struct { 26 struct platform_device *pdev; 27 28 bool update_enabled; 29 struct regulator *vdds_sdi_reg; 30 31 struct dss_lcd_mgr_config mgr_config; 32 struct omap_video_timings timings; 33 int datapairs; 34 35 struct omap_dss_device output; 36 37 bool port_initialized; 38 } sdi; 39 40 struct sdi_clk_calc_ctx { 41 unsigned long pck_min, pck_max; 42 43 unsigned long fck; 44 struct dispc_clock_info dispc_cinfo; 45 }; 46 47 static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck, 48 unsigned long pck, void *data) 49 { 50 struct sdi_clk_calc_ctx *ctx = data; 51 52 ctx->dispc_cinfo.lck_div = lckd; 53 ctx->dispc_cinfo.pck_div = pckd; 54 ctx->dispc_cinfo.lck = lck; 55 ctx->dispc_cinfo.pck = pck; 56 57 return true; 58 } 59 60 static bool dpi_calc_dss_cb(unsigned long fck, void *data) 61 { 62 struct sdi_clk_calc_ctx *ctx = data; 63 64 ctx->fck = fck; 65 66 return dispc_div_calc(fck, ctx->pck_min, ctx->pck_max, 67 dpi_calc_dispc_cb, ctx); 68 } 69 70 static int sdi_calc_clock_div(unsigned long pclk, 71 unsigned long *fck, 72 struct dispc_clock_info *dispc_cinfo) 73 { 74 int i; 75 struct sdi_clk_calc_ctx ctx; 76 77 /* 78 * DSS fclk gives us very few possibilities, so finding a good pixel 79 * clock may not be possible. We try multiple times to find the clock, 80 * each time widening the pixel clock range we look for, up to 81 * +/- 1MHz. 82 */ 83 84 for (i = 0; i < 10; ++i) { 85 bool ok; 86 87 memset(&ctx, 0, sizeof(ctx)); 88 if (pclk > 1000 * i * i * i) 89 ctx.pck_min = max(pclk - 1000 * i * i * i, 0lu); 90 else 91 ctx.pck_min = 0; 92 ctx.pck_max = pclk + 1000 * i * i * i; 93 94 ok = dss_div_calc(pclk, ctx.pck_min, dpi_calc_dss_cb, &ctx); 95 if (ok) { 96 *fck = ctx.fck; 97 *dispc_cinfo = ctx.dispc_cinfo; 98 return 0; 99 } 100 } 101 102 return -EINVAL; 103 } 104 105 static void sdi_config_lcd_manager(struct omap_dss_device *dssdev) 106 { 107 struct omap_overlay_manager *mgr = sdi.output.manager; 108 109 sdi.mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS; 110 111 sdi.mgr_config.stallmode = false; 112 sdi.mgr_config.fifohandcheck = false; 113 114 sdi.mgr_config.video_port_width = 24; 115 sdi.mgr_config.lcden_sig_polarity = 1; 116 117 dss_mgr_set_lcd_config(mgr, &sdi.mgr_config); 118 } 119 120 static int sdi_display_enable(struct omap_dss_device *dssdev) 121 { 122 struct omap_dss_device *out = &sdi.output; 123 struct omap_video_timings *t = &sdi.timings; 124 unsigned long fck; 125 struct dispc_clock_info dispc_cinfo; 126 unsigned long pck; 127 int r; 128 129 if (out->manager == NULL) { 130 DSSERR("failed to enable display: no output/manager\n"); 131 return -ENODEV; 132 } 133 134 r = regulator_enable(sdi.vdds_sdi_reg); 135 if (r) 136 goto err_reg_enable; 137 138 r = dispc_runtime_get(); 139 if (r) 140 goto err_get_dispc; 141 142 /* 15.5.9.1.2 */ 143 t->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; 144 t->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; 145 146 r = sdi_calc_clock_div(t->pixelclock, &fck, &dispc_cinfo); 147 if (r) 148 goto err_calc_clock_div; 149 150 sdi.mgr_config.clock_info = dispc_cinfo; 151 152 pck = fck / dispc_cinfo.lck_div / dispc_cinfo.pck_div; 153 154 if (pck != t->pixelclock) { 155 DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n", 156 t->pixelclock, pck); 157 158 t->pixelclock = pck; 159 } 160 161 162 dss_mgr_set_timings(out->manager, t); 163 164 r = dss_set_fck_rate(fck); 165 if (r) 166 goto err_set_dss_clock_div; 167 168 sdi_config_lcd_manager(dssdev); 169 170 /* 171 * LCLK and PCLK divisors are located in shadow registers, and we 172 * normally write them to DISPC registers when enabling the output. 173 * However, SDI uses pck-free as source clock for its PLL, and pck-free 174 * is affected by the divisors. And as we need the PLL before enabling 175 * the output, we need to write the divisors early. 176 * 177 * It seems just writing to the DISPC register is enough, and we don't 178 * need to care about the shadow register mechanism for pck-free. The 179 * exact reason for this is unknown. 180 */ 181 dispc_mgr_set_clock_div(out->manager->id, &sdi.mgr_config.clock_info); 182 183 dss_sdi_init(sdi.datapairs); 184 r = dss_sdi_enable(); 185 if (r) 186 goto err_sdi_enable; 187 mdelay(2); 188 189 r = dss_mgr_enable(out->manager); 190 if (r) 191 goto err_mgr_enable; 192 193 return 0; 194 195 err_mgr_enable: 196 dss_sdi_disable(); 197 err_sdi_enable: 198 err_set_dss_clock_div: 199 err_calc_clock_div: 200 dispc_runtime_put(); 201 err_get_dispc: 202 regulator_disable(sdi.vdds_sdi_reg); 203 err_reg_enable: 204 return r; 205 } 206 207 static void sdi_display_disable(struct omap_dss_device *dssdev) 208 { 209 struct omap_overlay_manager *mgr = sdi.output.manager; 210 211 dss_mgr_disable(mgr); 212 213 dss_sdi_disable(); 214 215 dispc_runtime_put(); 216 217 regulator_disable(sdi.vdds_sdi_reg); 218 } 219 220 static void sdi_set_timings(struct omap_dss_device *dssdev, 221 struct omap_video_timings *timings) 222 { 223 sdi.timings = *timings; 224 } 225 226 static void sdi_get_timings(struct omap_dss_device *dssdev, 227 struct omap_video_timings *timings) 228 { 229 *timings = sdi.timings; 230 } 231 232 static int sdi_check_timings(struct omap_dss_device *dssdev, 233 struct omap_video_timings *timings) 234 { 235 struct omap_overlay_manager *mgr = sdi.output.manager; 236 237 if (mgr && !dispc_mgr_timings_ok(mgr->id, timings)) 238 return -EINVAL; 239 240 if (timings->pixelclock == 0) 241 return -EINVAL; 242 243 return 0; 244 } 245 246 static void sdi_set_datapairs(struct omap_dss_device *dssdev, int datapairs) 247 { 248 sdi.datapairs = datapairs; 249 } 250 251 static int sdi_init_regulator(void) 252 { 253 struct regulator *vdds_sdi; 254 255 if (sdi.vdds_sdi_reg) 256 return 0; 257 258 vdds_sdi = devm_regulator_get(&sdi.pdev->dev, "vdds_sdi"); 259 if (IS_ERR(vdds_sdi)) { 260 if (PTR_ERR(vdds_sdi) != -EPROBE_DEFER) 261 DSSERR("can't get VDDS_SDI regulator\n"); 262 return PTR_ERR(vdds_sdi); 263 } 264 265 sdi.vdds_sdi_reg = vdds_sdi; 266 267 return 0; 268 } 269 270 static int sdi_connect(struct omap_dss_device *dssdev, 271 struct omap_dss_device *dst) 272 { 273 struct omap_overlay_manager *mgr; 274 int r; 275 276 r = sdi_init_regulator(); 277 if (r) 278 return r; 279 280 mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel); 281 if (!mgr) 282 return -ENODEV; 283 284 r = dss_mgr_connect(mgr, dssdev); 285 if (r) 286 return r; 287 288 r = omapdss_output_set_device(dssdev, dst); 289 if (r) { 290 DSSERR("failed to connect output to new device: %s\n", 291 dst->name); 292 dss_mgr_disconnect(mgr, dssdev); 293 return r; 294 } 295 296 return 0; 297 } 298 299 static void sdi_disconnect(struct omap_dss_device *dssdev, 300 struct omap_dss_device *dst) 301 { 302 WARN_ON(dst != dssdev->dst); 303 304 if (dst != dssdev->dst) 305 return; 306 307 omapdss_output_unset_device(dssdev); 308 309 if (dssdev->manager) 310 dss_mgr_disconnect(dssdev->manager, dssdev); 311 } 312 313 static const struct omapdss_sdi_ops sdi_ops = { 314 .connect = sdi_connect, 315 .disconnect = sdi_disconnect, 316 317 .enable = sdi_display_enable, 318 .disable = sdi_display_disable, 319 320 .check_timings = sdi_check_timings, 321 .set_timings = sdi_set_timings, 322 .get_timings = sdi_get_timings, 323 324 .set_datapairs = sdi_set_datapairs, 325 }; 326 327 static void sdi_init_output(struct platform_device *pdev) 328 { 329 struct omap_dss_device *out = &sdi.output; 330 331 out->dev = &pdev->dev; 332 out->id = OMAP_DSS_OUTPUT_SDI; 333 out->output_type = OMAP_DISPLAY_TYPE_SDI; 334 out->name = "sdi.0"; 335 out->dispc_channel = OMAP_DSS_CHANNEL_LCD; 336 /* We have SDI only on OMAP3, where it's on port 1 */ 337 out->port_num = 1; 338 out->ops.sdi = &sdi_ops; 339 out->owner = THIS_MODULE; 340 341 omapdss_register_output(out); 342 } 343 344 static void sdi_uninit_output(struct platform_device *pdev) 345 { 346 struct omap_dss_device *out = &sdi.output; 347 348 omapdss_unregister_output(out); 349 } 350 351 static int sdi_bind(struct device *dev, struct device *master, void *data) 352 { 353 struct platform_device *pdev = to_platform_device(dev); 354 355 sdi.pdev = pdev; 356 357 sdi_init_output(pdev); 358 359 return 0; 360 } 361 362 static void sdi_unbind(struct device *dev, struct device *master, void *data) 363 { 364 struct platform_device *pdev = to_platform_device(dev); 365 366 sdi_uninit_output(pdev); 367 } 368 369 static const struct component_ops sdi_component_ops = { 370 .bind = sdi_bind, 371 .unbind = sdi_unbind, 372 }; 373 374 static int sdi_probe(struct platform_device *pdev) 375 { 376 return component_add(&pdev->dev, &sdi_component_ops); 377 } 378 379 static void sdi_remove(struct platform_device *pdev) 380 { 381 component_del(&pdev->dev, &sdi_component_ops); 382 } 383 384 static struct platform_driver omap_sdi_driver = { 385 .probe = sdi_probe, 386 .remove = sdi_remove, 387 .driver = { 388 .name = "omapdss_sdi", 389 .suppress_bind_attrs = true, 390 }, 391 }; 392 393 int __init sdi_init_platform_driver(void) 394 { 395 return platform_driver_register(&omap_sdi_driver); 396 } 397 398 void sdi_uninit_platform_driver(void) 399 { 400 platform_driver_unregister(&omap_sdi_driver); 401 } 402 403 int sdi_init_port(struct platform_device *pdev, struct device_node *port) 404 { 405 struct device_node *ep; 406 u32 datapairs; 407 int r; 408 409 ep = of_graph_get_next_port_endpoint(port, NULL); 410 if (!ep) 411 return 0; 412 413 r = of_property_read_u32(ep, "datapairs", &datapairs); 414 if (r) { 415 DSSERR("failed to parse datapairs\n"); 416 goto err_datapairs; 417 } 418 419 sdi.datapairs = datapairs; 420 421 of_node_put(ep); 422 423 sdi.pdev = pdev; 424 425 sdi_init_output(pdev); 426 427 sdi.port_initialized = true; 428 429 return 0; 430 431 err_datapairs: 432 of_node_put(ep); 433 434 return r; 435 } 436 437 void sdi_uninit_port(struct device_node *port) 438 { 439 if (!sdi.port_initialized) 440 return; 441 442 sdi_uninit_output(sdi.pdev); 443 } 444